269 lines
6.7 KiB
C
269 lines
6.7 KiB
C
/* @(#)82 1.28 src/bos/kernel/sys/POWER/mdio.h, machdd, bos41J, bai15 4/4/95 08:27:34 */
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#ifndef _H_MDIO
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#define _H_MDIO
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/*
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* COMPONENT_NAME: (MACHDD) Machine Device Driver
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*
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* FUNCTIONS:
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*
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* ORIGINS: 27, 83
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*
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* IBM CONFIDENTIAL -- (IBM Confidential Restricted when
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* combined with the aggregated modules for this product)
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* SOURCE MATERIALS
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* (C) COPYRIGHT International Business Machines Corp. 1989, 1995
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* All Rights Reserved
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*
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* US Government Users Restricted Rights - Use, duplication or
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* disclosure restricted by GSA ADP Schedule Contract with IBM Corp.
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*/
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/*
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* LEVEL 1, 5 Years Bull Confidential Information
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*/
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#define NV_VERSION 1
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typedef struct mdio {
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ulong md_addr; /* specified address */
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ulong md_size; /* size of md_data */
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int md_incr; /* increment type: MV_BYTE, MV_WORD, MV_SHORT */
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char *md_data; /* pointer to space of size md_size */
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int md_sla; /* entry buid value, exit error code */
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ulong *md_length; /* length of data read in user buffer */
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} MACH_DD_IO;
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#define md_seqnum md_size
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#define md_type md_addr
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#define md_buid md_sla
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#define md_slaerr md_sla
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#define md_eenum md_sla
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#define md_cbnum md_addr
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#define md_cmd md_sla
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#define md_dknum md_sla
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#define md_mode md_addr
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#define md_delay md_sla
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#define md_cpunum md_addr
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#define MV_BYTE 0 /* 8 bit access */
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#define MV_WORD 1 /* 32 bit access */
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#define MV_SHORT 2 /* 16 bit access */
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#define MSLA0 0x80
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#define MSLA1 0x81
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#define MSLA2 0x82
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#define MSLA3 0x83
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#define MSLA4 0x84
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#define MSLA5 0x85
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#define MSLA6 0x86
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#define MSLA7 0x87
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/*
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* ioctl codes
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*
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*/
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#define MIOBUSGET 1
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#define MIOBUSPUT 2
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#define MIOCCGET 3
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#define MIOCCPUT 4
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#define MIONVGET 5
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#define MIONVPUT 6
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#define MIOGETPS 7
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#define MIOGETKEY 8
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#define MIOBUSMEM 9
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#define MIOBUSIO 10
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#define MIONVTEST 11
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#define MIONVLED 12
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#define MIOAIPLCB 13
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#define MIOIPLCB 14
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#define MIONVCHCK 15
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#define MSLAGET 16
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#define MSLAPUT 17
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#define MIOTODGET 18
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#define MIOTODPUT 19
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#define MIOVPDGET 20
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#define MIOCFGGET 21
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#define MIOCFGPUT 22
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#define MIORESET 23
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#define MIOSETKEY 24
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#define MIONVSTRLED 25
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#define MEEPROMGET 26
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#define MEEVPDGET 27
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#define MEEVPDPUT 28
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#define MFEPROMPUT 29
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#define MPOWERGET 30
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#define MPOWERSET 31
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#define MRDSGET 32
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#define MRDSSET 33
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#define MSURVSET 34
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#define MSURVRESET 35
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#define MCPUSET 36
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#define MCPUGET 37
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#define MDINFOSET 38
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#define MDINFOGET 39
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#define MIOKEYCONNECT 40
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#define MIOKEYDISCONNECT 41
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#define MIOPCFGET 42
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#define MIOPCFPUT 43
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#define MIOMEMGET 44
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#define MIOMEMPUT 45
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#define MIOGEARD 46
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#define MIOGEAUPD 47
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#define MIOGEAST 48
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#define MIOGEARDA 49
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/* values of status for MRDSGET/MRDSSET */
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#define MRDS_ON 1
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#define MRDS_OFF 0
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/* values of md_mode for MSURVSET */
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#define MSOFT_RESET 1
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#define MHARD_RESET 2
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/* values of cpu status for MCPUSET/MCPUGET */
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#define MCPU_START 0x9
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#define MCPU_DISABLED 0xa
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#define MCPU_ENABLED 0xb
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/* values returned by MIONVCHK */
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#define NVRAM_OK 0
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#define NVRAM_RESET 1
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#define NVRAM_BAD 2
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/*
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* Segment Regs
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*
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*/
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#define MIOMEMSYS 0x0
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#define MIOMEMBUS 0x00020
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#define MIOMEMRT 0x00060
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#define MIOMEMADDR 0x40000
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struct dsc_disk {
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char disk0;
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};
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struct dsc_native {
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char nat0;
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char nat1;
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};
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struct dsc_exp {
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char exp0;
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char exp1;
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};
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struct dsc_pvid {
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struct unique_id pvid;
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};
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struct dsc_scsi {
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char buid; /* Bus ID */
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char loc; /* location 'I' = Internal, 'E' = External */
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char slot; /* slot number */
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char adp_sid; /* adapter scsi ID */
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char type; /* type ?? */
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char target_sid; /* target device scsi ID */
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char lun; /* lun ID */
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};
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struct dsc_pvscsi {
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struct unique_id pvid;
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char stype;
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struct dsc_scsi d_scsi;
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};
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struct dsc_sla {
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uchar sla[5];
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};
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struct dsc_general {
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uchar gen;
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};
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struct devdesc {
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char dsc_length;
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char dsc_type;
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union {
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struct dsc_disk d_disk; /* type = 'N' */
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struct dsc_native d_native; /* type = 'K' */
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struct dsc_exp d_exp; /* type = 'R' */
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struct dsc_pvid d_pvid; /* type = 'V' */
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struct dsc_scsi d_scsi; /* type = 'S' */
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struct dsc_pvscsi d_pvscsi; /* type = 'V', length = 25 */
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struct dsc_sla d_sla; /* type = 'L' */
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struct dsc_general d_general; /* type = 'G' */
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} dsc;
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char dsc_unused[8];
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};
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struct drv_desc {
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ushort drv_magic; /* ( 2) A5A5 */
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short drv_length; /* ( 2) */
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ulong drv_start; /* ( 4) */
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ulong drv_crc; /* ( 4) */
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uchar drv_unused0[12]; /* (12) */
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/* (24) TOTAL */
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};
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struct ros_cb {
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long rcb_unused0; /* ( 4) 0 */
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long nv_size; /* ( 4) 4 */
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long nv_version; /* ( 4) 8 */
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long rcb_unused1; /* ( 4) C */
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uchar scsi_adap_id[16]; /* ( 16) 10, 14, 18, 1C */
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long mem_config[56]; /* ( 224) 20 - FC */
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uchar mem_data[256]; /* ( 256) 100 - 1FC */
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struct devdesc prevdev; /* ( 36) 200 - 220 */
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uchar norm_dev_list[84]; /* ( 84) 224 - 274 */
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uchar serv_dev_list[84]; /* ( 84) 278 - 2C8 */
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struct drv_desc drv0; /* ( 24) 2CC - 2E0 */
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struct drv_desc drv1; /* ( 24) 2E4 - 2F8 */
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ulong ros_crc; /* ( 4) 2FC */
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/* () */
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};
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struct gea_attrib {
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long gea_length; /* 4/0 num bytes in the GEArea */
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long gea_used; /* 4/4 num bytes used in the GEArea */
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long gea_thresh; /* 4/8 GEArea threshhold value */
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};
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/*
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* Macros
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*
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* POSREG(p, slot) : returns addr appropriate for MACH_DD_IO md_addr
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* p = POS Register number
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* slot = card slot in microchannel
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*/
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#define POSREG(p, slot) (((slot) << 16) | (p))
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#ifdef _KERNEL
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#define NVREAD 1
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#define NVWRITE 0
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#define nvread(t,p,s,l) nvrw(NVREAD, t, p, s, l)
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#define nvwrite(t,p,s,l) nvrw(NVWRITE, t, p, s, l)
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extern int nvrw(int rbarw, int type, uchar *dptr, int dstart, int dlen);
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/*
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* led display values are 0-9 for hex digits 0-9, and A-E are displayed below:
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* hex digit '8' '9' 'A' 'B' 'C' 'D' 'E'
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* +--+ +--+ + + +--+ +
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* | | | | | | | |
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* +--+ +--+ +--+ +--+ +--+ +--+ +--+
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* | | | | | |
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* +--+ + +--+ +--+ +--+ +--+
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* hex digit '8' '9' 'A' 'B' 'C' 'D' 'E'
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*
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* hex digit 'F' is blank, eg. '8F8' would display '8 8'
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*/
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/* 0<=ledvalue<=0xFFFF (only lower 3 nybbles significant) */
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extern int nvled(ulong ledv);
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#endif /* _KERNEL */
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#endif /* _H_MDIO */
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