174 lines
6.4 KiB
C
174 lines
6.4 KiB
C
/* @(#)61 1.6 src/bos/kernel/sys/POWER/sys_resource.h, sysios, bos411, 9428A410j 6/9/94 06:52:14 */
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#ifndef _H_SYS_RESOURCE
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#define _H_SYS_RESOURCE
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/*
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* COMPONENT_NAME: (SYSIOS) I/O Subsystem
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*
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* FUNCTIONS: Architected System Resources
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*
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* ORIGINS: 27, 83
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*
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* (C) COPYRIGHT International Business Machines Corp. 1993
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* All Rights Reserved
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* Licensed Materials - Property of IBM
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*
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* US Government Users Restricted Rights - Use, duplication or
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* disclosure restricted by GSA ADP Schedule Contract with IBM Corp.
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*/
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/*
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* LEVEL 1, 5 Years Bull Confidential Information
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*/
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#ifdef _POWER_PC
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/*
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* Following is a data structure representing the entire 16MB of
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* the architected system space
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*/
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struct sys_resource {
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/*
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* Architected System Registers, 0xFF000000 - 0xFF0000FC
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*/
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struct sys_registers {
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uint reserved1; /* reserved, starts at 0xFF000000*/
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uint arbiter_cntl; /* Arbiter Control Register */
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uint phys_id; /* Physical Identifier Register */
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uint bus_slot_cfg; /* Bus Slot Configuration Register */
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uint bus_slot_reset[16]; /* Bus Slot Reset Registers */
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uint reserved2[28]; /* reserved */
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uint time_of_day[8]; /* time of day registers */
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#define TOD_INDX_PPC 0 /* index for time of day index reg */
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#define TOD_DATA_PPC 1 /* index for time of day data reg */
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uint reset_status; /* Reset Status Register */
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uint pwr_key_status; /* Power/Keylock Status Register */
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uint pwr_on_reset_cr; /* Power On Reset Control Register */
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uint pwr_off_cr; /* Power Off Control Register */
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uint reserved3[4]; /* reserved, pad up to 0xFF000100*/
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} sys_regs;
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/*
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* Reserved Space, 0xFF000100 - 0xFF000FFF
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*/
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uint reserved1[0x3C0];
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/*
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* System Specific Registers, 0xFF001000 - 0xFF001FFF
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*/
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uint sys_specific_regs[0x400]; /* implementation dependent */
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/*
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* Reserved Space, 0xFF002000 - 0xFF0FFFFF
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*/
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uint reserved2[0x3F800];
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/*
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* System Interrupt Registers, 0xFF100000 - 0xFF17FFFF
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*/
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struct sys_interrupt_space {
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/*
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* Interrupt Registers, 256 sets, 0xFF100000 - 0xFF107FFF
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*/
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struct sys_interrupt_regs {
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uint xirr_poll; /* XIRR with no side effects */
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union {
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uint xirr; /* XIRR with side effects */
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struct {
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uchar cppr; /* CPPR */
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uchar xisr[3]; /* XISR */
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} xirr_u;
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} _u;
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uint dsier; /* Direct Store Interrupt Err*/
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uchar mfrr; /* Most Favored Request */
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uchar pad[3]; /* pad to next word */
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uint opt_mfrr[0x1C]; /* Optional MFRRs */
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} sys_intr_regs[0x100]; /* 255 possible processors */
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/*
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* Additional Optional MFRRs, 0xFF108000 - 0xFF17FFFF
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*/
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uint opt_mfrr[0x1E000];
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} sys_interrupt_space;
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/*
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* Reserved Space, 0xFF180000 - 0xFF1FFFFF
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*/
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uint reserved3[0x20000];
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/*
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* Standard Configuration Registers, 0xFF200000 - 0xFF200FFF
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*/
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struct standard_cfg_regs {
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uint device_charac_reg; /* Device Characteristics Reg */
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#define DEV_TYPE_MASK 0xF0000000 /* mask to get device type */
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#define DEV_TYPE_NOT_READY 0x00000000 /* device present, not ready*/
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#define DEV_TYPE_MEMORY 0x10000000 /* device is memory */
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#define DEV_TYPE_PROCESSOR 0x20000000 /* device is processor */
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#define DEV_TYPE_IO 0x30000000 /* device is I/O */
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#define DEV_TYPE_NONE 0xF0000000 /* no device present */
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#define DEV_CFG_INCREMENT_MASK 0x000001C0 /* mask to get data increment */
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#define DEV_CFG_INCR_4 0x00000000 /* data increment is 4 bytes */
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#define DEV_CFG_INCR_8 0x00000040 /* data increment is 8 bytes */
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union {
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uchar data[0xFFC]; /* used if increment != 4 */
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struct device_cfg { /* used if increment == 4 */
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uint dev_id; /* Device ID register */
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uint buid[4];/* Assigned BUIDs, up to 4 */
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uint mem_addr0; /* memory address (control)*/
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uint mem_addr1; /* memory address (data) */
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uint reserved[0x3F8]; /* reserved space */
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} r;
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} _u;
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} cfg_regs;
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/*
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* Device Specific Configuration Registers, 0xFF201000 - 0xFF201FFF
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*/
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uint dev_specific_cfg_regs[0x400]; /* device dependent */
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/*
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* Reserved Space, 0xFF202000 - 0xFF5FFFFF
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*/
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uint reserved4[0xFF800];
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/*
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* NVRAM space, 0xFF600000 - 0xFF7FFFFF
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*/
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uint nvram[0x80000];
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/*
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* Reserved Space, 0xFF800000 - 0xFF9FFFFF
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*/
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uint reserved5[0x80000];
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/*
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* Feature/VPD ROM Space, 0xFFA00000 - 0xFFBFFFFF
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*/
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uint feature_vpd_rom[0x80000];
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/*
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* Reserved Space, 0xFFC00000 - 0xFFDFFFFF
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*/
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uint reserved6[0x80000];
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/*
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* Boot ROM, 0xFFE00000 - 0xFFFFFFFF
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*/
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uint boot_rom[0x80000];
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};
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extern volatile struct sys_resource sys_resource;
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extern volatile struct sys_resource *sys_resource_ptr;
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#ifdef _RS6K_SMP_MCA
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/*
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* Pegasus has non-conformant addresses for these
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*/
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extern volatile uint *rsr_addr; /* Reset Status Register */
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extern volatile uint *pksr_addr; /* Power/Keylock Status Register */
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extern volatile uint *prcr_addr; /* Power On Reset Control Register */
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extern volatile uint *spocr_addr;/* Power Off Control Register */
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#endif /* _RS6K_SMP_MCA */
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#endif /* _POWER_PC */
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#endif /* _H_SYS_RESOURCE */
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