109 lines
3.6 KiB
C
Executable File
109 lines
3.6 KiB
C
Executable File
/* Copyright (c) 1984, 1986, 1987, 1988, 1989 AT&T */
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/* All Rights Reserved */
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/* THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF AT&T */
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/* The copyright notice above does not evidence any */
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/* actual or intended publication of such source code. */
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#ifndef _SYS_TERMIOX_H
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#define _SYS_TERMIOX_H
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#pragma ident "@(#)termiox.h 1.9 92/07/14 SMI" /* SVr4.0 1.4 */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* This structure provides an extended terminal interface. */
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/* Features of this interface are optional and may not be */
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/* implemented on all machines. */
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#define NFF 5
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/* hardware flow control modes */
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#define RTSXOFF 0000001 /* Enable RTS hardware flow control on input */
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#define CTSXON 0000002 /* Enable CTS hardware flow control on output */
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#define DTRXOFF 0000004 /* Enable DTR hardware flow control on input */
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#define CDXON 0000010 /* Enable CD hardware flow control on output */
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#define ISXOFF 0000020 /* Enable isochronous hardware flow control on input */
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/* clock modes */
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#define XMTCLK 0000007 /* Transmit Clock Source: */
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#define XCIBRG 0000000 /* Get transmit clock from */
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/* internal baud rate generator */
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#define XCTSET 0000001 /* Get transmit clock from */
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/* transmitter signal element */
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/* timing (DCE source) lead, */
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/* CCITT V.24 circuit 114, */
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/* EIA-232-D pin 15 */
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#define XCRSET 0000002 /* Get transmit clock from */
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/* receiver signal element */
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/* timing (DCE source) lead, */
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/* CCITT V.24 circuit 115, */
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/* EIA-232-D pin 17 */
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#define RCVCLK 0000070 /* Receive Clock Source: */
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#define RCIBRG 0000000 /* get receive clock from internal */
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/* baud rate generator */
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#define RCTSET 0000010 /* Get receive clock from */
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/* transmitter signal element */
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/* timing (DCE source) lead, */
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/* CCITT V.24 circuit 114, */
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/* EIA-232-D pin 15 */
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#define RCRSET 0000020 /* Get receive clock from */
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/* receiver signal element */
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/* timing (DCE source) lead, */
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/* CCITT V.24 circuit 115, */
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/* EIA-232-D pin 17 */
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#define TSETCLK 0000700 /* Transmitter Signal Element */
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/* timing (DTE source) lead, */
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/* CCITT V.24 circuit 113, */
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/* EIA-232-D pin 24, clock source: */
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#define TSETCOFF 0000000 /* TSET clock not provided */
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#define TSETCRBRG 0000100 /* Output receive baud rate generator */
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/* on circuit 113 */
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#define TSETCTBRG 0000200 /* Output transmit baud rate generator */
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/* on circuit 113 */
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#define TSETCTSET 0000300 /* Output transmitter signal element */
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/* timing (DCE source) on circuit 113 */
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#define TSETCRSET 0000400 /* Output receiver signal element */
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/* timing (DCE source) on circuit 113 */
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#define RSETCLK 0007000 /* Receiver Signal Element */
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/* timing (DTE source) lead, */
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/* CCITT V.24 circuit 128, */
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/* no EIA-232-D pin, clock source: */
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#define RSETCOFF 0000000 /* RSET clock not provided */
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#define RSETCRBRG 0001000 /* Output receive baud rate generator */
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/* on circuit 128 */
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#define RSETCTBRG 0002000 /* Output transmit baud rate generator */
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/* on circuit 128 */
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#define RSETCTSET 0003000 /* Output transmitter signal element */
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/* timing (DCE source) on circuit 128 */
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#define RSETCRSET 0004000 /* Output receiver signal element */
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/* timing (DCE source) on circuit 128 */
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struct termiox {
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unsigned short x_hflag; /* hardware flow control modes */
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unsigned short x_cflag; /* clock modes */
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unsigned short x_rflag[NFF]; /* reserved modes */
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unsigned short x_sflag; /* spare modes */
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};
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#define XIOC ('X'<<8)
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#define TCGETX (XIOC|1)
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#define TCSETX (XIOC|2)
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#define TCSETXW (XIOC|3)
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#define TCSETXF (XIOC|4)
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SYS_TERMIOX_H */
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