169 lines
4.7 KiB
C
Executable File
169 lines
4.7 KiB
C
Executable File
/*
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* Copyright (c) 1988 by Sun Microsystems, Inc.
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*/
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#ifndef _SYS_SYSERR_H
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#define _SYS_SYSERR_H
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#pragma ident "@(#)syserr.h 1.17 94/08/10 SMI" /* SunOS-4.1 1.9 */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* various external error handling routines
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*/
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extern int bb_ctl_get_ecsr(u_int cpu_id);
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extern void bb_ctl_set_ecsr(u_int cpu_id, u_int value);
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extern int intr_bb_status1(void);
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extern unsigned int jtag_ctl_get_ecsr(int);
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extern int jtag_cmd_get_ecsr(unsigned int);
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extern void jtag_cmd_set_ecsr(unsigned int, int);
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extern u_longlong_t intr_mxcc_error_get(void);
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extern void intr_mxcc_error_set(u_longlong_t);
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extern int intr_get_pend_local(void);
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extern int intr_clear_pend_local(int level);
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extern int intr_get_table(int sbus_level);
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extern void intr_clear_mask_bits(int mask);
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extern void intr_clear_mask_bits_ecsr(int mask, u_int cpu);
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extern int intr_clear_table(int sbus_level, int mask);
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extern int intr_get_table_bwb(int sbus_level);
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extern int intr_clear_table_bwb(int sbus_level, int mask);
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extern int bw_compid_get(int cpuid, int busid);
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extern int timeout(void (*func) (), caddr_t arg, long delta);
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extern u_int xdb_bb_status2_get(void);
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extern void xmit_cpu_intr(u_int cpu_id, u_int pri);
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extern u_int syserr_handler(caddr_t);
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/*
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* External Data
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*/
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extern u_int n_xdbus; /* Number of XDBus's in system */
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extern int good_xdbus; /* Number of working XDBus's */
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extern u_int n_bootbus; /* Number of working bootbus's */
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extern u_int bootbusses; /* bit mask for CPU's which own bootbus */
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extern u_int memerr_ready;
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extern u_int disable_acfail; /* override for /etc/system */
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extern u_int disable_tempfail; /* override for /etc/system */
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extern u_int disable_fanfail; /* override for /etc/system */
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extern u_int disable_powerfail; /* override for /etc/system */
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extern u_int disable_sbifail; /* override for /etc/system */
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/*
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* The model defines are for sun4d platforms. They are set early on
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* during boot by counting the number of xdbus's and also looking
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* at the OBP banner if necessary. They are used to setup the
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* memory error handlers and dual power supply interrupt handlers.
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*/
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#define MODEL_SC2000 0x2000
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#define MODEL_SC1000 0x1000
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#define MODEL_UNKNOWN -1
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extern int sun4d_model;
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/*
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* The STATUS defines all refer to bits in the boot bus status registers.
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*/
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#define STATUS1_YL_LED (1 << 1)
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#define STATUS2_AC_INT (1 << 2)
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#define STATUS2_TMP_INT (1 << 4)
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#define STATUS2_FAN_INT (1 << 5)
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#define STATUS2_PWR_INT (1 << 6)
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/*
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* The following defines refer to the number of seconds the callback
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* delay for the specific handler is set for. Every time the
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* corresponding handler is called, it sets itself up to be called
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* again n seconds later.
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*/
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#define SOFTINT_FAN_TIMEOUT_SEC 8
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#define SOFTINT_PWR_TIMEOUT_SEC 8
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#define SOFTINT_AC_TIMEOUT_SEC 1
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#define OVEN_TIMEOUT_SEC 8
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/*
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* In order to indicate that we are in an environmental chamber, or
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* oven, the test people will set the 'testarea' property in the
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* options node to 192 decimal. Therefore we have the following define.
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*/
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#define CHAMBER_VALUE "192"
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#define INTTABLE_MQH_CE (1 << 2)
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#define INTTABLE_MQH_UE (1 << 3)
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#define INTTABLE_MQH_UE_CE (1 << 4)
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#define INTTABLE_SBI_XPT (1 << 5)
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#define INTTABLE_ECC (INTTABLE_MQH_CE | INTTABLE_MQH_UE | INTTABLE_MQH_UE_CE)
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/*
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* Component ID of Bus Watcher model with timer design bug
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*/
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#define BW_BAD 0x10ADB07D
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/*
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* MXCC.ERR.CCOP.DCMD
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* MXCC ERRor register Cache Controller Operation Data CoMmanD field
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*/
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#define DCMD_BC_MR 0x5
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#define DCMD_BC_MW 0xF
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#define DCMD_IOW 0x13
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#define DCMD_BC_IOR 0x15
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#define DCMD_BC_IOW 0x17
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#define DCMD_SBUS_SR 0x4
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#define DCMD_WB 0x6
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#define DCMD_CFR 0xc
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#define DCMD_FECSRR 0x10
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/*
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* Boot bus control bits for enabling and disabling environmental
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* interrupts. Power is for the dual power supply failure interrupts.
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* The rest should be self-explanatory.
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*/
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#define BBUS_CTL_POWER_BIT (1 << 4)
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#define BBUS_CTL_TEMP_BIT (1 << 5)
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#define BBUS_CTL_FAN_BIT (1 << 6)
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#define BITSET 1
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#define BITCLR 0
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#define UNMASK_15 0
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#define MASK_15 1
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#ifdef DEBUG
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#define DEBUG_INC(x) (++(x))
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#else
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#define DEBUG_INC(x)
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#endif /* DEBUG */
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/*
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* syserr_handler() is compiled directly into vectorlist[]
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* at these levels. Note that zs output above IPL6 is not immediate.
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*/
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#define SOFTERR_IPL_HIGH 8
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#define SOFTERR_IPL_MED 4
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#define SOFTERR_IPL_LOW 1
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#define IPL_AC SOFTERR_IPL_MED
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#define IPL_TEMP SOFTERR_IPL_MED
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#define IPL_FAN SOFTERR_IPL_LOW
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#define IPL_POWER SOFTERR_IPL_LOW
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#define IPL_MXCC SOFTERR_IPL_MED
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#define IPL_SBI SOFTERR_IPL_LOW
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#define IPL_ECC_UE SOFTERR_IPL_MED
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#define IPL_ECC_CE SOFTERR_IPL_LOW
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#define IPL_ECC IPL_ECC_UE
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extern lock_t syserr_req[]; /* set this before requesting softint */
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SYS_SYSERR_H */
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