93 lines
3.1 KiB
C
Executable File
93 lines
3.1 KiB
C
Executable File
/*
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* Copyright (c) 1988-1991 by Sun Microsystems, Inc.
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*/
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#ifndef _SYS_MEMERR_H
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#define _SYS_MEMERR_H
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#pragma ident "@(#)memerr.h 1.9 93/05/26 SMI" /* SunOS-4.1.1 1.12 */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* All Sun-4e implementations have memory parity error detection.
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* The memory error register consists of a control register. If an error
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* occurs, the control register stores information relevant to the error.
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* The address of the word in error is stored in one of the error
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* address registers; the SEVAR for synchronous errors and the ASEVAR for
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* asynchronous errors. The byte(s) in error are identified by the
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* memory error register.
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* Errors are reported either by a trap (for synchronous errors) or a
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* non-maskable level 15 interrupt (for asynchronous errors).
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* If a second error occurs before the first one has been processed,
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* the MULTI bit will be on in the memory error register, and the
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* address of the first (for asynchronous errors) or last (for
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* synchronous errors) error will be stored in the appropriate error
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* address register.
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* The interrupt is cleared by toggling the "enable all interrupts" bit
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* in the interrupt control register.
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* The information bits in the memory error register are cleared by
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* reading it.
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*/
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#define OBIO_MEMERR_ADDR 0xE8000000 /* address of memerr in obio space */
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#define MEMERR_ADDR 0xFFFFC000 /* virtual address we map memerr to */
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#define MEMERR_ADDR2 0xFFFFC008 /* v.a. of expansion card parity reg */
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#define MEMEXP_START 0x08000000 /* start of expansion card memory */
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#ifdef _ASM
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#define MEMERR MEMERR_ADDR /* v.a. to which we map memerr */
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#define MEMERR2 MEMERR_ADDR2
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#else
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#if defined(_KERNEL)
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struct memerr {
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u_int me_err; /* memory error register */
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#define me_per me_err /* parity error register */
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};
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#define MEMERR ((struct memerr *)(MEMERR_ADDR))
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#define MEMERR2 ((struct memerr *)(MEMERR_ADDR2))
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struct regs;
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struct pte;
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struct eccreg;
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void memerr_init(void);
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void memerr(u_int, u_int, caddr_t, unsigned, struct regs *);
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void memerr_70(u_int, u_int, caddr_t, u_int, u_int);
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int parerr_reset(caddr_t, struct pte *);
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void asyncerr(u_int, caddr_t, u_int, caddr_t);
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void ecc_init(void);
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void ecc_memlog(struct eccreg *, int);
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int ecc_uncorrectable(caddr_t);
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int ecc_correctable(void);
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void ecc_enableint(struct eccreg *);
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#endif /* defined(_KERNEL) */
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#endif /* _ASM */
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/*
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* Bits for the memory error register when used as parity error register
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*/
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#define PER_ERROR 0x80 /* r/o - 1 = parity error detected */
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#define PER_MULTI 0x40 /* r/o - 1 = second error detected */
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#define PER_TEST 0x20 /* r/w - 1 = write inverse parity */
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#define PER_CHECK 0x10 /* r/w - 1 = enable parity checking */
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#define PER_ERR00 0x08 /* r/o - 1 = parity error <0..7> */
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#define PER_ERR08 0x04 /* r/o - 1 = parity error <8..15> */
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#define PER_ERR16 0x02 /* r/o - 1 = parity error <16..23> */
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#define PER_ERR24 0x01 /* r/o - 1 = parity error <24..31> */
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#define PER_ERRS 0x0F /* r/o - mask for specific error bits */
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#define PARERR_BITS \
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"\20\10ERROR\7MULTI\6TEST\5CHECK\4ERR00\3ERR08\2ERR16\1ERR24"
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SYS_MEMERR_H */
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