61 lines
1.9 KiB
C
61 lines
1.9 KiB
C
/* @(#)buserr.h 1.1 92/07/30 SMI */
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/*
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* Copyright (c) 1985 by Sun Microsystems, Inc.
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*/
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/*
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* Definitions and structures related to 68020 bus error handling for Sun-3.
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*/
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#ifndef _sun3_buserr_h
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#define _sun3_buserr_h
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#include <m68k/excframe.h>
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/*
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* The System Bus Error Register captures the state of the
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* system as of the last bus error. The Bus Error Register
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* always latches the cause of the most recent bus error.
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* Thus, in the case of stacked bus errors, the information
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* relating to the earlier bus errors is lost. The Bus Error
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* register is read-only and is addressed in FC_MAP space.
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* The Bus Error Register is clocked for bus errors for CPU Cycles
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* line. The Bus Error Register is not clocked for DVMA cycles
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* or for CPU accesses to the floating point chip with the
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* chip not enabled.
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*
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* The be_proterr bit is set only if the valid bit was set AND the
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* page protection does not allow the kind of operation attempted.
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* The rest of the bits are 1 if they caused the error.
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*/
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#ifndef LOCORE
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struct buserrorreg {
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u_int be_invalid :1; /* Page map Valid bit was off */
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u_int be_proterr :1; /* Protection error */
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u_int be_timeout :1; /* Bus access timed out */
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u_int be_vmeberr :1; /* VMEbus bus error */
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u_int be_fpaberr :1; /* FPA bus error */
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u_int be_fpaena :1; /* FPA enable error */
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u_int :1;
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u_int be_watchdog :1; /* Watchdog reset */
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};
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#endif !LOCORE
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/*
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* Equivalent bits.
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*/
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#define BE_INVALID 0x80 /* page map was invalid */
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#define BE_PROTERR 0x40 /* protection error */
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#define BE_TIMEOUT 0x20 /* bus access timed out */
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#define BE_VMEBERR 0x10 /* VMEbus bus error */
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#define BE_FPABERR 0x08 /* FPA bus error */
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#define BE_FPAENA 0x04 /* FPA enable error */
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#define BE_WATCHDOG 0x01 /* Watchdog reset */
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#define BUSERRREG 0x60000000 /* addr of buserr reg in FC_MAP space */
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#define BUSERR_BITS "\20\10INVALID\7PROTERR\6TIMEOUT\5VMEBERR\4FPABERR\3FPAENA\1WATCHDOG"
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#endif /*!_sun3_buserr_h*/
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