Init
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seta75D
278
sys/boot/lib/common/tm.c
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278
sys/boot/lib/common/tm.c
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#ifndef lint
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static char sccsid[] = "@(#)tm.c 1.1 94/10/31 Copyr 1985 Sun Micro";
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#endif
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/*
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* Copyright (c) 1985 by Sun Microsystems, Inc.
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*/
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/*
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* Standalone driver for Ciprico TapeMaster Multibus tape controller
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*/
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#include <stand/saio.h>
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#include <sundev/tmreg.h>
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#include <mon/cpu.map.h>
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#include <mon/cpu.addrs.h>
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/*
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* Standard addresses for this board
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*/
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#define NTMADDR 2
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unsigned long tmstd[] = { 0xA0, 0xA2 };
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/*
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* Structure of our dma space
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*/
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#define MAXTMREC (20*1024) /* max size tape rec allowed */
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struct tmdma {
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struct tm_mbinfo tm_mbinfo; /* Multibus IOPB crap */
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char tmbuf[MAXTMREC];/* Block of data */
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};
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#define MB_DMA_ADDR_MASK 0x000FFFFF /* Low meg */
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/*
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* Driver definition
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*/
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struct devinfo tminfo = {
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sizeof(struct tmdevice), /* Size of device registers */
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sizeof(struct tmdma), /* DMA space required */
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0, /* Local variable space */
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NTMADDR, /* # of standard addresses */
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tmstd, /* Standard addr vector */
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MAP_MBIO, /* Map type of device regs */
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MAXTMREC, /* transfer size */
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};
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/*
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* What facilities we export to the world
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*/
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int tmstrategy(), tmopen(), tmclose();
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extern int ttboot();
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extern int nullsys();
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struct boottab mtdriver = {
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"mt", nullsys, ttboot, tmopen, tmclose, tmstrategy,
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"mt: TapeMaster 9-track tape", &tminfo,
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};
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/*
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* Open a tape drive
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*/
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tmopen(sip)
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register struct saioreq *sip;
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{
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register skip;
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if (tminit(sip) == -1)
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return (-1);
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tmcmd(sip, TM_REWINDX);
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skip = sip->si_boff;
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while (skip--) {
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sip->si_cc = 0;
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tmcmd(sip, TM_SEARCH);
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}
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return (0);
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}
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/*ARGSUSED*/
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tmclose(sip)
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struct saioreq *sip;
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{
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/*tmcmd(sip, TM_REWINDX);*/
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}
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tmstrategy(sip, rw)
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register struct saioreq *sip;
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int rw;
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{
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int func = (rw == WRITE) ? TM_WRITE : TM_READ;
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return tmcmd(sip, func);
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}
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#define NOTZERO 1 /* don't care value-but not zero (clr inst botch) */
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#define ATTN(c) (((struct tmdevice *)c)->tmdev_attn=NOTZERO)
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#define RESET(c) (((struct tmdevice *)c)->tmdev_reset=NOTZERO)
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#define clrtpb(tp) bzero((caddr_t)(tp), sizeof *(tp));
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tmcmd(sip, func)
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register struct saioreq *sip;
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{
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# define tmdmap ((struct tmdma *)sip->si_dmaaddr)
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# define tmb (&tmdmap->tm_mbinfo)
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register struct tmdevice *tmaddr =
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(struct tmdevice *)sip->si_devaddr;
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register struct tpb *tpb = &tmb->tmb_tpb;
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int count = 1;
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int size = 0;
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struct tmstat tms;
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int err;
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switch (func) {
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case TM_READ:
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size = sip->si_cc;
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break;
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case TM_WRITE:
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size = sip->si_cc;
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swab((char *)sip->si_ma, tmdmap->tmbuf, size);
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break;
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}
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clrtpb(tpb);
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tpb->tm_cmd = func &~ TM_DIRBIT;
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tpb->tm_ctl.tmc_rev = func & TM_DIRBIT;
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tpb->tm_ctl.tmc_width = 1;
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tpb->tm_ctl.tmc_speed = sip->si_unit & 010;
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tpb->tm_ctl.tmc_tape = sip->si_unit & 03;
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tpb->tm_rcount = count;
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tpb->tm_bsize = size;
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c68t86((long)tmdmap->tmbuf, &tpb->tm_baddr);
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tmb->tmb_ccb.tmccb_gate = TMG_CLOSED;
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/* Start the command and wait for completion */
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ATTN(tmaddr);
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while (tmb->tmb_ccb.tmccb_gate == TMG_CLOSED)
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;
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tms = tpb->tm_stat;
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err = tms.tms_error;
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/*
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* An operation completed... record status
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*/
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if (err == E_EOT && tms.tms_load)
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err = E_NOERROR;
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/*
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* Check for errors.
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*/
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if (err != E_NOERROR && err != E_SHORTREC) {
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if (err == E_EOF || err == E_EOT)
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return (0);
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/* Note: TapeMaster does retries for us */
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printf("tm hard err %x\n", err);
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return (-1);
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}
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if (func == TM_READ)
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swab(tmdmap->tmbuf, sip->si_ma, tpb->tm_count);
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return (tpb->tm_count);
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# undef tmdma
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# undef tmb
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}
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#define SPININIT 1000000
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/*
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* Initialize a controller
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* Reset it, set up SCP, SCB, and CCB,
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* and give it an attention.
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* Make sure its there by waiting for the gate to open
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* Once initialization is done, issue CONFIG just to be safe.
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*/
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tminit(sip)
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register struct saioreq *sip;
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{
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register struct tm_mbinfo *tmb =
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&((struct tmdma *)(sip->si_dmaaddr))->tm_mbinfo;
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register struct tmdevice *tmaddr =
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(struct tmdevice *)sip->si_devaddr;
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register struct tpb *tpb = &tmb->tmb_tpb;
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bzero((caddr_t)tmb, sizeof (struct tm_mbinfo));
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RESET(tmaddr);
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/* setup System Configuration Block */
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tmb->tmb_scb.tmscb_03 = tmb->tmb_scb.tmscb_03x = TMSCB_CONS;
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c68t86((long)&tmb->tmb_ccb, &tmb->tmb_scb.tmccb_ptr);
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/* setup Channel Control Block */
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tmb->tmb_ccb.tmccb_gate = TMG_CLOSED;
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{
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register struct tmscp *tmscp;
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char *temp;
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register int spin;
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int v1, v2;
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/* Snatch the dma space that this screwy Intel device needs */
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/* get the virtual address */
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tmscp = (struct tmscp *)(DVMA_BASE + TM_SCPADDR);
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v1 = getpgmap((char *)tmscp);
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v2 = getpgmap((char *)tmb);
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if (v1 != v2) {
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/* get random page */
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temp = resalloc(RES_MAINMEM, sizeof (struct tmscp));
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/* point virt at new page */
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setpgmap((char *)tmscp, getpgmap(temp));
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}
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/* setup System Configuration Pointer */
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tmscp->tmscb_bus = tmscp->tmscb_busx = TMSCB_BUS16;
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c68t86((long)&tmb->tmb_scb, &tmscp->tmscb_ptr);
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/* Start the TapeMaster and wait til it says "done" */
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ATTN(tmaddr);
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for (spin = SPININIT; tmb->tmb_ccb.tmccb_gate != TMG_OPEN; )
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if (--spin <= 0)
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break;
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if (v1 != v2) {
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/*
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* Give back the dma space this screwy Intel
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* device needs
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*/
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setpgmap((char *)tmscp, v1);
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}
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if (spin <= 0) {
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printf("tm: no response from ctlr %x\n", sip->si_ctlr);
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return (-1);
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}
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}
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/* Finish CCB, point it at TPB */
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tmb->tmb_ccb.tmccb_ccw = TMC_NORMAL;
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c68t86((long)tpb, &tmb->tmb_ccb.tmtpb_ptr);
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/* Issue CONFIG command */
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clrtpb(tpb);
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tpb->tm_cmd = TM_CONFIG;
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tpb->tm_cmd2 = 0;
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tpb->tm_ctl.tmc_width = 1;
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/* Get the gate */
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while (tmb->tmb_ccb.tmccb_gate != TMG_OPEN)
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;
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tmb->tmb_ccb.tmccb_gate = TMG_CLOSED;
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/* Start the command and wait for completion */
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ATTN(tmaddr);
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while (tmb->tmb_ccb.tmccb_gate == TMG_CLOSED)
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;
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/* Check and report errors */
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if (tpb->tm_stat.tms_error) {
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printf("tm: error %d during config of ctlr %x\n",
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tpb->tm_stat.tms_error, sip->si_ctlr);
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tpb->tm_stat.tms_error = 0;
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return (-1);
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}
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return (0);
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}
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/*
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* Convert a 68000 address into a 8086 address
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* This involves translating a virtual address into a
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* physical multibus address and converting the 20 bit result
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* into a two word base and offset.
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*/
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static c68t86(a68, a86)
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long a68;
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ptr86_t *a86;
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{
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a68 &= MB_DMA_ADDR_MASK;
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a86->a_offset = a68 & 0xFFFF;
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a86->a_base = (a68 & 0xF0000) >> 4;
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}
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