121 lines
3.5 KiB
C
121 lines
3.5 KiB
C
/*
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* @(#)screg.h 1.1 94/10/31 SMI
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*
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* Copyright (C) 1989, Sun Microsystems Inc.
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*
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* Hardware and Software definitions for the SCSI-2 Host Adapter.
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*
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*/
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#ifndef _scsi_adapters_scsitwo_h
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#define _scsi_adapters_scsitwo_h
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/*
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* Since we are a non-arbitrating, non-disconnecting
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* host adapter (initiator), these are for reference
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* only:
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*/
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#define HOST_ADDR 0x80 /* bit pattern representation */
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#define HOST_ID 0x07 /* number of My ID */
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#define SC_RESET_DELAY 4000000 /* 1 us ( 4 Sec.) */
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#define SC_LONG_WAIT 3000000 /* 10 us (30 Sec.) */
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#define SC_WAIT_COUNT 1000000 /* 10 us (10 Sec.) */
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#define SC_SHORT_WAIT 25000 /* 10 us (.25 Sec.) */
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#if defined(sun2) || defined(sun3) || defined(sun3x)
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/*
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* SCSI Sun host adapter control registers for Sun-2 and Sun-3.
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*/
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#define SET_DMA_ADDR(har,val) (har)->dma_addr = val;
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#define GET_DMA_ADDR(har) (har)->dma_addr;
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struct screg { /* host adapter (I/O space) registers */
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u_char data; /* data register */
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u_char unused;
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u_char cmd_stat; /* command/status register */
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u_char unused2;
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u_short icr; /* interface control register */
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u_short unused3;
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u_long dma_addr; /* dma base address */
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u_short dma_count; /* dma count register */
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u_char unused4;
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u_char intvec; /* interrupt vector for VMEbus versions */
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};
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#endif defined(sun2) || defined(sun3) || defined(sun3x)
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#ifdef sun4
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/*
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* SCSI Sun host adapter control registers for Sun-4.
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*/
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#define SET_DMA_ADDR(har,val) (har)->dma_addrh = (val >> 16);\
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(har)->dma_addrl = (val & 0xffff);
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#define GET_DMA_ADDR(har) (((har)->dma_addrh << 16) | ((har)->dma_addrl))
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struct screg { /* host adapter (I/O space) registers */
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u_char data; /* data register */
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u_char unused;
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u_char cmd_stat; /* command/status register */
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u_char unused2;
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u_short icr; /* interface control register */
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u_short unused3;
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u_short dma_addrh; /* dma base address */
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u_short dma_addrl;
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u_short dma_count; /* dma count register */
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u_char unused4;
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u_char intvec; /* interrupt vector for VMEbus versions */
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};
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#endif sun4
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/*
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* bits in the interface control register
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*/
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#define ICR_PARITY_ERROR 0x8000
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#define ICR_BUS_ERROR 0x4000
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#define ICR_ODD_LENGTH 0x2000
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#define ICR_INTERRUPT_REQUEST 0x1000
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#define ICR_REQUEST 0x0800
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#define ICR_MESSAGE 0x0400
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#define ICR_COMMAND_DATA 0x0200 /* command=1, data=0 */
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#define ICR_INPUT_OUTPUT 0x0100 /* input=1, output=0 */
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#define ICR_PARITY 0x0080
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#define ICR_BUSY 0x0040
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/* Only the following bits may usefully be set by the CPU */
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#define ICR_SELECT 0x0020
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#define ICR_RESET 0x0010
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#define ICR_PARITY_ENABLE 0x0008
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#define ICR_WORD_MODE 0x0004
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#define ICR_DMA_ENABLE 0x0002
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#define ICR_INTERRUPT_ENABLE 0x0001
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/*
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* Compound conditions of icr bits message, command/data and input/output.
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*/
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#define ICR_COMMAND (ICR_COMMAND_DATA)
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#define ICR_STATUS (ICR_COMMAND_DATA | ICR_INPUT_OUTPUT)
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#define ICR_MESSAGE_IN (ICR_MESSAGE | ICR_COMMAND_DATA | ICR_INPUT_OUTPUT)
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#define ICR_BITS (ICR_MESSAGE | ICR_COMMAND_DATA | ICR_INPUT_OUTPUT)
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/*
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* 'soft' structure, per host adapter
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*/
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struct scsitwo {
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/*
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* This structure must come first, as we retrieve it's address
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* and figure out which host adapter controller number we are
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* talking to based upon it...
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*/
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struct scsi_transport sc_tran; /* transport vector */
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struct screg *sc_reg; /* hardware registers */
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struct scsi_cmd *sc_que; /* waiting list */
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u_char sc_cmdid; /* id of command */
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u_char sc_busy; /* h/a busy */
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u_char sc_msgin; /* last message in */
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};
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#endif _scsi_adapters_scsitwo_h
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