68 lines
2.0 KiB
C
68 lines
2.0 KiB
C
/* @(#)isdev.h 1.1 10/31/94 SMI */
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/*
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* Device registers for the Sun VME IPI String Controller or Channel.
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*/
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#ifndef _isdev_h
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#define _isdev_h
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#define ISC_MAX_CMD 64 /* maximum command packet size */
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#define ISC_MAX_RESP 72 /* maximum response packet size */
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#define ISC_REG_SIZE 0x400 /* size of shared memory */
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struct is_reg {
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u_long dev_bir; /* Board ID register */
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u_long dev_csr; /* CSR - Status register */
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u_long dev_cmdreg; /* Command register */
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u_long dev_resp; /* Response register (read only) */
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u_long dev_vector; /* VME interrupt vector */
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u_long dev_aux[3]; /* reserved */
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u_long dev_cmd_pkt[ISC_MAX_CMD/sizeof(u_long)];
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/* command packet */
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u_long dev_resp_pkt[ISC_MAX_RESP/sizeof(u_long)];
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/* response packet */
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u_char reserved[ISC_REG_SIZE - 8*sizeof(long)
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- ISC_MAX_CMD - ISC_MAX_RESP]; /* reserved */
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};
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/*
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* Board ID for Panther-.
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*/
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#define PM_ID (('P'<<24) | ('A'<<16) | ('N'<<8) | '-')
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/*
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* CSR Bit Definitions
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*/
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#define CSR_RESET 0x01 /* reset - other bits not valid */
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#define CSR_EICRNB 0x02 /* En int on cmd register not busy */
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#define CSR_EIRRV 0x04 /* En int on response register valid */
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#define CSR_CRBUSY 0x08 /* Command Register Busy */
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#define CSR_RRVLID 0x10 /* Response Register Valid */
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#define CSR_ERROR 0x0100 /* Error */
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#define CSR_MRINFO 0x0200 /* More Info */
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#define CSR_FAULT 0xff0000 /* mask for fault code */
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#define CSR_FAULT_SHIFT 16 /* shift for fault code */
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/*
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* Error codes in CSR_FAULT field. Valid if CSR_ERROR set.
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*/
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#define CSR_FAULT_VME_B 1 /* Can't DMA - VME Bus error*/
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#define CSR_FAULT_VME_T 2 /* Can't DMA - VME Timeout */
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#define CSR_INVAL_CMD 3 /* Invalid command register write */
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#define CSR_LED0 0x01000000 /* LED 0 */
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#define CSR_LED1 0x02000000
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#define CSR_LED2 0x04000000
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#define CSR_LED3 0x08000000
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#define CSR_LED4 0x10000000
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#define CSR_LED5 0x20000000
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#define CSR_LED6 0x40000000
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#define CSR_LED7 0x80000000 /* LED 7 */
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#endif /* !_isdev_h */
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