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https://github.com/DoctorWkt/unix-jun72.git
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281 lines
4.3 KiB
C
281 lines
4.3 KiB
C
/* double.c - Double operand instructions.
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*
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* $Revision: 2.11 $
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* $Date: 1999/12/27 10:19:40 $
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*/
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#include "defines.h"
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static u_int32_t templong;
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/* mov() - Move Instruction. Move operations with registers as the source
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* and/or destination have been inlined. */
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void
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mov()
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{
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if (SRC_MODE) {
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load_src(); dstword=srcword;
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} else {
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dstword = regs[SRC_REG];
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}
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CHG_CC_N(dstword);
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CHG_CC_Z(dstword);
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CLR_CC_V();
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if (DST_MODE) {
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store_dst();
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} else {
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regs[DST_REG] = dstword;
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}
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}
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/* movsreg(), movsreg1() and movsreg1pc() can all be replaced with
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* mov() above. I've broken them out in an attempt to improve
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* performance.
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*/
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void
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movsreg()
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{
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dstword = regs[SRC_REG];
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CHG_CC_N(dstword);
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CHG_CC_Z(dstword);
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CLR_CC_V();
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if (DST_MODE) {
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store_dst();
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} else {
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regs[DST_REG] = dstword;
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}
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}
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void
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movsreg1()
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{
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ll_word(regs[SRC_REG], dstword);
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CHG_CC_N(dstword);
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CHG_CC_Z(dstword);
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CLR_CC_V();
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if (DST_MODE) {
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store_dst();
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} else {
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regs[DST_REG] = dstword;
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}
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}
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void
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movsreg1pc()
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{
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lli_word(regs[PC], dstword)
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CHG_CC_N(dstword);
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CHG_CC_Z(dstword);
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CLR_CC_V();
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if (DST_MODE) {
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store_dst();
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} else {
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regs[DST_REG] = dstword;
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}
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}
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/* cmp() - Compare Instruction. */
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void
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cmp()
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{
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load_src();
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load_dst();
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tmpword = ~dstword;
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templong = ((u_int32_t) srcword) + ((u_int32_t) (tmpword)) + 1;
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tmpword = LOW16(templong);
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CHG_CC_N(tmpword);
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CHG_CC_Z(tmpword);
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CHG_CC_VC(srcword, dstword, tmpword); /* was CHG_CC_V */
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CHG_CC_IC(templong);
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}
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/* add() - Add Instruction. */
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void
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add()
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{
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load_src();
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load_dst();
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templong = ((u_int32_t) srcword) + ((u_int32_t) dstword);
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tmpword = LOW16(templong);
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CHG_CC_N(tmpword);
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CHG_CC_Z(tmpword);
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CHG_CC_V(srcword, dstword, tmpword);
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CHG_CC_C(templong);
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dstword=tmpword; store_dst_2();
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}
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/* Subtract Instruction. */
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void
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sub()
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{
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load_src();
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load_dst();
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tmpword = ~srcword;
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templong = ((u_int32_t) dstword) + ((u_int32_t) tmpword) + 1;
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tmpword = LOW16(templong);
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CHG_CC_N(tmpword);
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CHG_CC_Z(tmpword);
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CHG_CC_VS(srcword, dstword, tmpword); /* was CHG_CC_V */
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CHG_CC_IC(templong);
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dstword=tmpword; store_dst_2();
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}
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/* bit() - Bit Test Instruction. */
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void
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bit()
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{
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load_src();
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load_dst();
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dstword = srcword & dstword;
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CHG_CC_N(dstword);
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CHG_CC_Z(dstword);
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CLR_CC_V();
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}
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/* bic() - Bit Clear Instruction. */
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void
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bic()
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{
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load_src();
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load_dst();
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dstword = (~srcword) & dstword;
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CHG_CC_N(dstword);
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CHG_CC_Z(dstword);
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CLR_CC_V();
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store_dst_2();
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}
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/* bis() - Bit Set Instruction. */
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void
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bis()
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{
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load_src();
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load_dst();
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dstword = srcword | dstword;
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CHG_CC_N(dstword);
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CHG_CC_Z(dstword);
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CLR_CC_V();
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store_dst_2();
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}
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/* movb() - Move Byte Instruction. Move operations with registers as the
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* source and/or destination have been inlined. */
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void
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movb()
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{
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if (SRC_MODE) {
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loadb_src();
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} else {
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srcbyte = LOW8(regs[SRC_REG]);
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}
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CHGB_CC_N(srcbyte);
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CHGB_CC_Z(srcbyte);
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CLR_CC_V();
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/* move byte to a register causes sign extension */
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if (DST_MODE) {
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storeb_dst();
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} else {
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if (srcbyte & SIGN_B)
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regs[DST_REG] = (u_int16_t)0177400 + (u_int16_t)srcbyte;
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else
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regs[DST_REG] = (u_int16_t)srcbyte;
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}
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}
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/* cmpb() - Compare Byte Instruction. */
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void
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cmpb()
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{
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u_int8_t data3;
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loadb_src();
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loadb_dst();
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data3 = (u_int8_t)~dstbyte;
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tmpword = ((u_int16_t) srcbyte) + ((u_int16_t) (data3)) + 1;
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data3 = LOW8(tmpword);
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CHGB_CC_N(data3);
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CHGB_CC_Z(data3);
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CHGB_CC_VC(srcbyte, dstbyte, data3);
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CHGB_CC_IC(tmpword);
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}
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/* bitb() - Bit Test Byte Instruction. */
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void
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bitb()
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{
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loadb_src();
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loadb_dst();
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dstbyte = srcbyte & dstbyte;
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CHGB_CC_N(dstbyte);
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CHGB_CC_Z(dstbyte);
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CLR_CC_V();
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}
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/* bicb() - Bit Clear Byte Instruction. */
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void
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bicb()
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{
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loadb_src();
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loadb_dst();
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dstbyte = (u_int8_t)((~srcbyte) & dstbyte);
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CHGB_CC_N(dstbyte);
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CHGB_CC_Z(dstbyte);
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CLR_CC_V();
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storeb_dst_2();
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}
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/* bisb() - Bit Set Byte Instruction. */
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void
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bisb()
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{
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loadb_src();
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loadb_dst();
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dstbyte = srcbyte | dstbyte;
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CHGB_CC_N(dstbyte);
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CHGB_CC_Z(dstbyte);
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CLR_CC_V();
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storeb_dst_2();
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}
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