diff --git a/Arcade_MiST/Gottlieb Qbert/Qbert.qsf b/Arcade_MiST/Gottlieb Qbert/Qbert.qsf index 8a7b59db..7ee78f04 100644 --- a/Arcade_MiST/Gottlieb Qbert/Qbert.qsf +++ b/Arcade_MiST/Gottlieb Qbert/Qbert.qsf @@ -154,7 +154,7 @@ set_global_assignment -name USE_CONFIGURATION_DEVICE OFF # SignalTap II Assignments # ======================== set_global_assignment -name ENABLE_SIGNALTAP OFF -set_global_assignment -name USE_SIGNALTAP_FILE output_files/snd.stp +set_global_assignment -name USE_SIGNALTAP_FILE output_files/spin.stp # Power Estimation Assignments # ============================ @@ -236,6 +236,7 @@ set_global_assignment -name VERILOG_SHOW_LMF_MAPPING_MESSAGES OFF set_global_assignment -name VERILOG_MACRO "EXT_ROM=" set_global_assignment -name FORCE_SYNCH_CLEAR ON set_global_assignment -name SYSTEMVERILOG_FILE rtl/Qbert_MiST.sv +set_global_assignment -name VHDL_FILE rtl/spinner.vhd set_global_assignment -name SYSTEMVERILOG_FILE rtl/sdram.sv set_global_assignment -name QIP_FILE rtl/pll.qip set_global_assignment -name SYSTEMVERILOG_FILE rtl/m6532.sv @@ -248,4 +249,6 @@ set_global_assignment -name QIP_FILE ../../common/CPU/8088/8088.qip set_global_assignment -name QIP_FILE ../../common/CPU/T65/T65.qip set_global_assignment -name QIP_FILE ../../common/mist/mist.qip set_global_assignment -name SIGNALTAP_FILE output_files/snd.stp +set_global_assignment -name SIGNALTAP_FILE output_files/nvram.stp +set_global_assignment -name SIGNALTAP_FILE output_files/spin.stp set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/Arcade_MiST/Gottlieb Qbert/rtl/Qbert_MiST.sv b/Arcade_MiST/Gottlieb Qbert/rtl/Qbert_MiST.sv index 5e8f19d1..06fcdaa1 100644 --- a/Arcade_MiST/Gottlieb Qbert/rtl/Qbert_MiST.sv +++ b/Arcade_MiST/Gottlieb Qbert/rtl/Qbert_MiST.sv @@ -106,17 +106,28 @@ localparam mod_curvebal = 4; localparam mod_tylz = 5; localparam mod_insector = 6; -wire [5:0] OP2720; -wire [7:0] IP1710; -wire [7:0] IP4740; -wire [7:0] IPA1J2; +wire [7:0] spinner_pos; +wire spinner_reset; +spinner spinner ( + .clock_40(clk_sys), + .reset(spinner_reset), + .btn_left(m_fireC | m_leftB), + .btn_right(m_fireD | m_rightB), + .ctc_zc_to_2(vb), + .spin_angle(spinner_pos) +); + +reg [5:0] OP2720; +reg [7:0] IP1710; +reg [7:0] IP4740; +reg [7:0] IPA1J2; always @(*) begin - IPA1J2 <= 8'd0; - IP4740 <= 8'd0; + IPA1J2 = 8'd0; + IP4740 = 8'd0; - IP1710 <= { + IP1710 = { m_fireA, // test 1 ~service, // test 2 2'b0, @@ -127,7 +138,7 @@ always @(*) begin }; if (~diagonal) begin - IP4740 <= { + IP4740 = { m_down2, m_up2, m_left2, @@ -138,7 +149,7 @@ always @(*) begin m_right }; end else begin - IP4740 <= { + IP4740 = { m_down2 & m_left2, // down + left m_up2 & m_right2, // up + right m_left2 & m_up2, // left + up @@ -161,7 +172,7 @@ always @(*) begin mod_mplanets: begin - IP1710 <= { + IP1710 = { ~service, // test 2 m_fireA, // test 1 4'd0, @@ -169,7 +180,7 @@ always @(*) begin m_coin1 }; - IP4740 <= { + IP4740 = { m_fireB,// button 2 m_two_players, // p2 @@ -182,12 +193,12 @@ always @(*) begin m_up }; - //IPA1J2 <= spinner_0[7:0]; + IPA1J2 = spinner_pos; end mod_krull: begin - IP1710 <= { + IP1710 = { m_two_players, m_one_player, 2'b00, @@ -196,7 +207,7 @@ always @(*) begin m_fireA, // select in test mode ~service }; - IP4740 <= { + IP4740 = { m_left, // left joystick m_down, m_right, @@ -210,7 +221,7 @@ always @(*) begin mod_curvebal: begin - IP1710 <= { + IP1710 = { 4'd0, m_coin2, m_coin1, // coin 1 @@ -218,7 +229,7 @@ always @(*) begin ~service, // test 2 }; - IP4740 <= { + IP4740 = { 1'b0, // n/a m_fireD | m_down, // bunt 1'b0, // n/a @@ -232,7 +243,7 @@ always @(*) begin mod_tylz: begin - IP1710 <= { // IN1 + IP1710 = { // IN1 4'd0, m_coin1, m_coin2, @@ -240,7 +251,7 @@ always @(*) begin ~service }; - IP4740 <= { // IN4 + IP4740 = { // IN4 1'b0, m_two_players, // p2 m_one_player, // p1 @@ -255,7 +266,7 @@ always @(*) begin mod_insector: begin - IP1710 <= { // IN1 + IP1710 = { // IN1 1'b0, ~service, m_fire2B, @@ -266,7 +277,7 @@ always @(*) begin m_fireA }; - IP4740 <= { // IN4 + IP4740 = { // IN4 m_left2, m_down2, m_right2, @@ -444,6 +455,7 @@ mylstar_board mylstar_board .IPA1J2(IPA1J2), .OP2720(OP2720), .OP3337(), + .trackball_reset(spinner_reset), .dip_switch(dip_sw), diff --git a/Arcade_MiST/Gottlieb Qbert/rtl/mylstar_board.v b/Arcade_MiST/Gottlieb Qbert/rtl/mylstar_board.v index d15ba349..9bc27385 100644 --- a/Arcade_MiST/Gottlieb Qbert/rtl/mylstar_board.v +++ b/Arcade_MiST/Gottlieb Qbert/rtl/mylstar_board.v @@ -25,6 +25,7 @@ module mylstar_board output [5:0] OP2720, output [4:0] OP3337, output [7:0] OP4740, + output trackball_reset, //op1 input [7:0] dip_switch, @@ -57,6 +58,7 @@ assign blue = G14_Q; assign OP2720 = A10[5:0]; assign OP4740 = A9[7:0]; assign OP3337 = A8[4:0]; +assign trackball_reset = op1_sel; reg CLK5; wire IOM; @@ -127,7 +129,7 @@ end // CPU/RAM/ROM // //////////////////////// -wire [7:0] A1J2 = trackball_sel ? IPA1J2 : 8'd0; +wire [7:0] A1J2 = (trackball0_sel | trackball1_sel) ? IPA1J2 : 8'd0; wire [7:0] ram_dout = C5_Q | C6_Q | C7_Q | C9_10_Q | C8_9_Q | C10_11_Q; wire [7:0] rom_dout; @@ -220,18 +222,20 @@ always @(*) begin: B9 endcase end -reg dip_sel, IP1710_sel, IP4740_sel, trackball_sel; +reg dip_sel, IP1710_sel, IP4740_sel, trackball0_sel, trackball1_sel; always @(*) begin : B10 // IO read selects dip_sel = 0; IP1710_sel = 0; IP4740_sel = 0; - trackball_sel = 0; + trackball0_sel = 0; + trackball1_sel = 0; if (~RD_n & ram_io_ce & addr[12:11] == 2'b11 & ~addr[3]) case (addr[2:0]) 3'd0: dip_sel = 1; 3'd1: IP1710_sel = 1; - 3'd2: trackball_sel = 1; + 3'd2: trackball0_sel = 1; + 3'd3: trackball1_sel = 1; 3'd4: IP4740_sel = 1; default: ; endcase diff --git a/Arcade_MiST/Gottlieb Qbert/rtl/spinner.vhd b/Arcade_MiST/Gottlieb Qbert/rtl/spinner.vhd new file mode 100644 index 00000000..bc841af7 --- /dev/null +++ b/Arcade_MiST/Gottlieb Qbert/rtl/spinner.vhd @@ -0,0 +1,46 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.std_logic_unsigned.all; +use ieee.numeric_std.all; + +entity spinner is +port( + clock_40 : in std_logic; + reset : in std_logic; + btn_left : in std_logic; + btn_right : in std_logic; + btn_acc : in std_logic; -- speed up button + ctc_zc_to_2 : in std_logic; + spin_angle : out std_logic_vector(7 downto 0) +); +end spinner; + +architecture rtl of spinner is + +signal ctc_zc_to_2_r : std_logic; +signal spin_count : std_logic_vector(9 downto 0); + +begin + +spin_angle <= spin_count(9 downto 2); + +process (clock_40, reset) +begin + if reset = '1' then + spin_count <= (others => '0'); + elsif rising_edge(clock_40) then + ctc_zc_to_2_r <= ctc_zc_to_2; + + if ctc_zc_to_2_r ='0' and ctc_zc_to_2 = '1' then + if btn_acc = '0' then -- space -- speed up + if btn_left = '1' then spin_count <= spin_count - 3; end if; -- left + if btn_right = '1' then spin_count <= spin_count + 3; end if; -- right + else + if btn_left = '1' then spin_count <= spin_count - 55; end if; + if btn_right = '1' then spin_count <= spin_count + 55; end if; + end if; + end if; + end if; +end process; + +end rtl; \ No newline at end of file