diff --git a/Arcade_MiST/Scramble Hardware/Amidar_MiST/Amidar.qsf b/Arcade_MiST/Scramble Hardware/Amidar_MiST/Amidar.qsf
index a61f9bf0..1ff0d766 100644
--- a/Arcade_MiST/Scramble Hardware/Amidar_MiST/Amidar.qsf	
+++ b/Arcade_MiST/Scramble Hardware/Amidar_MiST/Amidar.qsf	
@@ -1,6 +1,6 @@
 # -------------------------------------------------------------------------- #
 #
-# Copyright (C) 1991-2013 Altera Corporation
+# Copyright (C) 1991-2014 Altera Corporation
 # Your use of Altera Corporation's design tools, logic functions 
 # and other software and tools, and its AMPP partner logic 
 # functions, and any output files from any of the foregoing 
@@ -17,8 +17,8 @@
 # -------------------------------------------------------------------------- #
 #
 # Quartus II 64-Bit
-# Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
-# Date created = 05:08:48  November 15, 2017
+# Version 13.1.4 Build 182 03/12/2014 SJ Web Edition
+# Date created = 17:10:48  March 08, 2019
 #
 # -------------------------------------------------------------------------- #
 #
@@ -45,6 +45,35 @@ set_global_assignment -name PROJECT_CREATION_TIME_DATE "01:53:30  APRIL 20, 2017
 set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
 set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
 set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
+set_global_assignment -name SYSTEMVERILOG_FILE rtl/Amidar.sv
+set_global_assignment -name VHDL_FILE rtl/scramble_top.vhd
+set_global_assignment -name VHDL_FILE rtl/scramble.vhd
+set_global_assignment -name VHDL_FILE rtl/scramble_video.vhd
+set_global_assignment -name VHDL_FILE rtl/scramble_audio.vhd
+set_global_assignment -name VHDL_FILE rtl/MULT18X18.vhd
+set_global_assignment -name VHDL_FILE rtl/i82c55.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80sed.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80_Reg.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80_Pack.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80_MCode.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80_ALU.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_2.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_1.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_0.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_PGM.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_OBJ_1.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_OBJ_0.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_LUT.vhd
+set_global_assignment -name QIP_FILE rtl/pll.qip
+set_global_assignment -name VHDL_FILE rtl/dpram.vhd
+set_global_assignment -name VHDL_FILE rtl/YM2149_linmix_sep.vhd
+set_global_assignment -name VERILOG_FILE rtl/mist_io.v
+set_global_assignment -name VERILOG_FILE rtl/scandoubler.v
+set_global_assignment -name VERILOG_FILE rtl/osd.v
+set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
+set_global_assignment -name VHDL_FILE rtl/dac.vhd
+set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
 
 # Pin & Location Assignments
 # ==========================
@@ -80,28 +109,54 @@ set_location_assignment PIN_91 -to SPI_SS3
 set_location_assignment PIN_13 -to CONF_DATA0
 set_location_assignment PLL_1 -to "pll:pll|altpll:altpll_component"
 
+# Classic Timing Assignments
+# ==========================
+set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
+set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
+
 # Analysis & Synthesis Assignments
 # ================================
 set_global_assignment -name FAMILY "Cyclone III"
 set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
 set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
+set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
 set_global_assignment -name TOP_LEVEL_ENTITY Amidar
 
 # Fitter Assignments
 # ==================
 set_global_assignment -name DEVICE EP3C25E144C8
+set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
+set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
+set_global_assignment -name ENABLE_NCE_PIN OFF
+set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
+set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
+set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
+set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
+set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
+set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
+set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
+set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
+set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
 
 # Assembler Assignments
 # =====================
 set_global_assignment -name GENERATE_RBF_FILE ON
+set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
 
 # Power Estimation Assignments
 # ============================
 set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
 set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
 
-# ----------------------
-# start ENTITY(Scramble)
+# Advanced I/O Timing Assignments
+# ===============================
+set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
+set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
+set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
+set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
+
+# --------------------
+# start ENTITY(Amidar)
 
 	# start DESIGN_PARTITION(Top)
 	# ---------------------------
@@ -115,56 +170,6 @@ set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
 	# end DESIGN_PARTITION(Top)
 	# -------------------------
 
-# end ENTITY(Scramble)
-# --------------------
-set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
-set_global_assignment -name VERILOG_FILE rtl/scandoubler.v
-set_global_assignment -name VERILOG_FILE rtl/osd.v
-set_global_assignment -name VERILOG_FILE rtl/keyboard.v
-set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
-set_global_assignment -name VHDL_FILE rtl/dac.vhd
-set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
-set_global_assignment -name VHDL_FILE rtl/cpu/T80sed.vhd
-set_global_assignment -name VHDL_FILE rtl/cpu/T80_Reg.vhd
-set_global_assignment -name VHDL_FILE rtl/cpu/T80_Pack.vhd
-set_global_assignment -name VHDL_FILE rtl/cpu/T80_MCode.vhd
-set_global_assignment -name VHDL_FILE rtl/cpu/T80_ALU.vhd
-set_global_assignment -name VHDL_FILE rtl/cpu/T80.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_2.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_1.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_0.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_PGM.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_OBJ_1.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_OBJ_0.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_LUT.vhd
-set_global_assignment -name QIP_FILE rtl/pll.qip
-set_global_assignment -name VHDL_FILE rtl/MULT18X18.vhd
-set_global_assignment -name VHDL_FILE rtl/i82c55.vhd
-set_global_assignment -name VHDL_FILE rtl/dpram.vhd
-set_global_assignment -name VERILOG_FILE rtl/build_id.v
-set_global_assignment -name VHDL_FILE rtl/YM2149_linmix_sep.vhd
-set_global_assignment -name VHDL_FILE rtl/scramble_video.vhd
-set_global_assignment -name VHDL_FILE rtl/scramble_top.vhd
-set_global_assignment -name VHDL_FILE rtl/scramble_audio.vhd
-set_global_assignment -name VHDL_FILE rtl/scramble.vhd
-set_global_assignment -name SYSTEMVERILOG_FILE rtl/Amidar.sv
-set_global_assignment -name VERILOG_FILE rtl/mist_io.v
-set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
-set_global_assignment -name ENABLE_NCE_PIN OFF
-set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
-set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
-set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
-set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
-set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
-set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
-set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
-set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
-set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
-set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
-set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
-set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
-set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
-set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
-set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
-set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
+# end ENTITY(Amidar)
+# ------------------
 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
diff --git a/Arcade_MiST/Scramble Hardware/Amidar_MiST/README.txt b/Arcade_MiST/Scramble Hardware/Amidar_MiST/README.txt
index df8b7083..3435faa0 100644
--- a/Arcade_MiST/Scramble Hardware/Amidar_MiST/README.txt	
+++ b/Arcade_MiST/Scramble Hardware/Amidar_MiST/README.txt	
@@ -8,7 +8,7 @@
 -- Copyright (c) MikeJ - Feb 2007
 ---------------------------------------------------------------------------------
 -- 
--- Only controls are rotated on VGA output.
+-- Only controls and OSD are rotated on Video output.
 -- 
 -- 
 -- Keyboard inputs :
diff --git a/Arcade_MiST/Scramble Hardware/Amidar_MiST/Release/Amidar.rbf b/Arcade_MiST/Scramble Hardware/Amidar_MiST/Release/Amidar.rbf
index c3501900..82167ace 100644
Binary files a/Arcade_MiST/Scramble Hardware/Amidar_MiST/Release/Amidar.rbf and b/Arcade_MiST/Scramble Hardware/Amidar_MiST/Release/Amidar.rbf differ
diff --git a/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/Amidar.sv b/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/Amidar.sv
index 40a982bd..5a9e8bac 100644
--- a/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/Amidar.sv	
+++ b/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/Amidar.sv	
@@ -42,37 +42,33 @@ module Amidar
 
 localparam CONF_STR = {
 	"Amidar;;",
-	"O2,Joystick Control,Upright,Normal;",
-	"O34,Scandoubler Fx,None,HQ2x,CRT 25%,CRT 50%;",
+//	"O1,Service ,On,Off;",
+	"O2,Rotate Controls,Off,On;",
+	"O34,Scanlines,Off,25%,50%,75%;",
 	"T6,Reset;",
-	"V,v1.00.",`BUILD_DATE
+	"V,v1.20.",`BUILD_DATE
 };
 
-
-////////////////////   CLOCKS   ///////////////////
+assign LED = 1;
+assign AUDIO_R = AUDIO_L;
 
 wire clk_sys;
 wire pll_locked;
-
-pll pll
-(
+pll pll(
 	.inclk0(CLOCK_27),
 	.areset(0),
 	.c0(clk_sys),
 	.locked(pll_locked)
-);
+	);
 
 reg ce_6p, ce_6n, ce_12, ce_1p79;
 always @(negedge clk_sys) begin
-	reg [1:0] div = 0;
-	reg [3:0] div179 = 0;
-	
+reg [1:0] div = 0;
+reg [3:0] div179 = 0;	
 	div <= div + 1'd1;
-
 	ce_12 <= div[0];
 	ce_6p <= div[0] & ~div[1];
-	ce_6n <= div[0] &  div[1];
-	
+	ce_6n <= div[0] &  div[1];	
    ce_1p79 <= 0;
    div179 <= div179 - 1'd1;
    if(!div179) begin
@@ -87,28 +83,46 @@ wire  [1:0] switches;
 wire  [9:0] kbjoy;
 wire  [7:0] joystick_0;
 wire  [7:0] joystick_1;
-wire        scandoubler_disable;
+wire        scandoublerD;
 wire        ypbpr;
-wire        ps2_kbd_clk, ps2_kbd_data;
+wire [10:0] ps2_key;
 wire [9:0] audio;
-wire hsync,vsync;
-assign LED = 1;
-wire blankn = ~(hblank | vblank);
-wire hblank, vblank;
 wire hs, vs;
+wire blankn = ~(hb | vb);
+wire hb, vb;
 wire [3:0] r,b,g;
 
-video_mixer #(.LINE_LENGTH(640), .HALF_DEPTH(0)) video_mixer
-(
+scramble_top scramble(
+	.O_VIDEO_R(r),
+	.O_VIDEO_G(g),
+	.O_VIDEO_B(b),
+	.O_HSYNC(hs),
+	.O_VSYNC(vs),
+   .O_HBLANK(hb),
+   .O_VBLANK(vb),
+	.O_AUDIO(audio),
+	.button_in1(~{btn_one_player, m_fire, m_bomb, m_left, m_right, m_up, m_down}),
+	.button_in2(~{btn_two_players, m_fire, m_bomb, m_left, m_right, m_up, m_down}),
+	.Coin_in(~btn_coin),
+	.Service_in(~status[1]),
+	.RESET(status[0] | status[6] | buttons[1]),
+	.clk(clk_sys),
+	.ena_12(ce_12),
+	.ena_6(ce_6p),
+	.ena_6b(ce_6n),
+	.ena_1_79(ce_1p79)
+	);
+
+video_mixer video_mixer(
 	.clk_sys(clk_sys),
 	.ce_pix(ce_6p),
 	.ce_pix_actual(ce_6p),
 	.SPI_SCK(SPI_SCK),
 	.SPI_SS3(SPI_SS3),
 	.SPI_DI(SPI_DI),
-	.R({r,r[1:0]}),
-	.G({g,g[1:0]}),
-	.B({b,b[1:0]}),
+	.R(blankn ? {r,r[1:0]} : 0),
+	.G(blankn ? {g,g[1:0]} : 0),
+	.B(blankn ? {b,b[1:0]} : 0),
 	.HSync(hs),
 	.VSync(vs),
 	.VGA_R(VGA_R),
@@ -116,13 +130,14 @@ video_mixer #(.LINE_LENGTH(640), .HALF_DEPTH(0)) video_mixer
 	.VGA_B(VGA_B),
 	.VGA_VS(VGA_VS),
 	.VGA_HS(VGA_HS),
-	.scandoubler_disable(scandoubler_disable),
-	.scanlines(scandoubler_disable ? 2'b00 : {status[4:3] == 3, status[4:3] == 2}),
-	.hq2x(status[4:3]==1),
+	.rotate({1'b1,status[2]}),
+	.scandoublerD(scandoublerD),
+	.scanlines(scandoublerD ? 2'b00 : status[4:3]),
+	.ypbpr(ypbpr),
 	.ypbpr_full(1),
 	.line_start(0),
 	.mono(0)
-);
+	);
 
 mist_io #(.STRLEN(($size(CONF_STR)>>3))) mist_io
 (
@@ -135,69 +150,59 @@ mist_io #(.STRLEN(($size(CONF_STR)>>3))) mist_io
 	.SPI_DI         (SPI_DI         ),
 	.buttons        (buttons        ),
 	.switches   	 (switches       ),
-	.scandoubler_disable(scandoubler_disable),
+	.scandoublerD	 (scandoublerD	  ),
 	.ypbpr          (ypbpr          ),
-	.ps2_kbd_clk    (ps2_kbd_clk    ),
-	.ps2_kbd_data   (ps2_kbd_data   ),
+	.ps2_key			 (ps2_key        ),
 	.joystick_0   	 (joystick_0     ),
 	.joystick_1     (joystick_1     ),
 	.status         (status         )
-);
-
-
-
-keyboard keyboard(
-	.clk(clk_sys),
-	.reset(),
-	.ps2_kbd_clk(ps2_kbd_clk),
-	.ps2_kbd_data(ps2_kbd_data),
-	.joystick(kbjoy)
 	);
-	
-wire m_up     = status[2] ? kbjoy[6] | joystick_0[1] | joystick_1[1] : kbjoy[4] | joystick_0[3] | joystick_1[3];
-wire m_down   = status[2] ? kbjoy[7] | joystick_0[0] | joystick_1[0] : kbjoy[5] | joystick_0[2] | joystick_1[2];
-wire m_left   = status[2] ? kbjoy[5] | joystick_0[2] | joystick_1[2] : kbjoy[6] | joystick_0[1] | joystick_1[1];
-wire m_right  = status[2] ? kbjoy[4] | joystick_0[3] | joystick_1[3] : kbjoy[7] | joystick_0[0] | joystick_1[0];
 
-wire m_fire   = kbjoy[0] | joystick_0[4] | joystick_1[4];
-wire m_start1 = kbjoy[1];
-wire m_start2 = kbjoy[2];
-wire m_coin   = kbjoy[3];
-wire m_bomb   = kbjoy[8];
-wire m_Serv   = kbjoy[9];
-
-scramble_top scramble
-(
-	.O_VIDEO_R(r),
-	.O_VIDEO_G(g),
-	.O_VIDEO_B(b),
-	.O_HSYNC(hs),
-	.O_VSYNC(vs),
-   .O_HBLANK(hblank),
-   .O_VBLANK(vblank),
-
-	.O_AUDIO(audio),
-
-	.button_in1(~{m_start1, m_fire, m_bomb, m_left, m_right, m_up, m_down}),
-	.button_in2(~{m_start2, m_fire, m_bomb, m_left, m_right, m_up, m_down}),
-	.Coin_in(~m_coin),
-	.Service_in(~m_Serv),
-	.RESET(status[0] | status[6] | buttons[1]),
-	.clk(clk_sys),
-	.ena_12(ce_12),
-	.ena_6(ce_6p),
-	.ena_6b(ce_6n),
-	.ena_1_79(ce_1p79)
-);
-dac dac
-(
+dac dac(
 	.clk_i(clk_sys),
 	.res_n_i(1),
 	.dac_i(audio),
 	.dac_o(AUDIO_L)
 	);
+//											Rotated														Normal
+wire m_up     = ~status[2] ? btn_left | joystick_0[1] | joystick_1[1] : btn_up | joystick_0[3] | joystick_1[3];
+wire m_down   = ~status[2] ? btn_right | joystick_0[0] | joystick_1[0] : btn_down | joystick_0[2] | joystick_1[2];
+wire m_left   = ~status[2] ? btn_down | joystick_0[2] | joystick_1[2] : btn_left | joystick_0[1] | joystick_1[1];
+wire m_right  = ~status[2] ? btn_up | joystick_0[3] | joystick_1[3] : btn_right | joystick_0[0] | joystick_1[0];
 
-assign AUDIO_R = AUDIO_L;
+wire m_fire   = btn_fire1 | joystick_0[4] | joystick_1[4];
+wire m_bomb   = btn_fire2 | joystick_0[5] | joystick_1[5];
 
+reg btn_one_player = 0;
+reg btn_two_players = 0;
+reg btn_left = 0;
+reg btn_right = 0;
+reg btn_down = 0;
+reg btn_up = 0;
+reg btn_fire1 = 0;
+reg btn_fire2 = 0;
+reg btn_fire3 = 0;
+reg btn_coin  = 0;
+wire       pressed = ps2_key[9];
+wire [7:0] code    = ps2_key[7:0];	
 
-endmodule
+always @(posedge clk_sys) begin
+	reg old_state;
+	old_state <= ps2_key[10];
+	if(old_state != ps2_key[10]) begin
+		case(code)
+			'h75: btn_up         	<= pressed; // up
+			'h72: btn_down        	<= pressed; // down
+			'h6B: btn_left      		<= pressed; // left
+			'h74: btn_right       	<= pressed; // right
+			'h76: btn_coin				<= pressed; // ESC
+			'h05: btn_one_player   	<= pressed; // F1
+			'h06: btn_two_players  	<= pressed; // F2
+			'h14: btn_fire3 			<= pressed; // ctrl
+			'h11: btn_fire2 			<= pressed; // alt
+			'h29: btn_fire1   		<= pressed; // Space
+		endcase
+	end
+end
+
+endmodule 
\ No newline at end of file
diff --git a/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/build_id.v b/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/build_id.v
index 7a9ccfc6..09adf1db 100644
--- a/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/build_id.v	
+++ b/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/build_id.v	
@@ -1,2 +1,2 @@
-`define BUILD_DATE "171117"
-`define BUILD_TIME "104831"
+`define BUILD_DATE "190308"
+`define BUILD_TIME "171334"
diff --git a/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/keyboard.v b/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/keyboard.v
deleted file mode 100644
index c2b7b86e..00000000
--- a/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/keyboard.v	
+++ /dev/null
@@ -1,82 +0,0 @@
-
-
-module keyboard
-(
-	input  clk,
-	input  reset,
-	input  ps2_kbd_clk,
-	input  ps2_kbd_data,
-
-	output reg[9:0] joystick
-);
-
-reg [11:0] shift_reg = 12'hFFF;
-wire[11:0] kdata = {ps2_kbd_data,shift_reg[11:1]};
-wire [7:0] kcode = kdata[9:2];
-reg        release_btn = 0;
-
-reg  [7:0] code;
-reg        input_strobe = 0;
-
-always @(negedge clk) begin
-	reg old_reset = 0;
-
-	old_reset <= reset;
-
-	if(~old_reset & reset)begin
-		joystick <= 0;
-	end
-
-	if(input_strobe) begin
-		case(code)
-			'h16: joystick[1] <= ~release_btn; // 1
-			'h1E: joystick[2] <= ~release_btn; // 2
-
-			'h75: joystick[4] <= ~release_btn; // arrow up
-			'h72: joystick[5] <= ~release_btn; // arrow down
-			'h6B: joystick[6] <= ~release_btn; // arrow left
-			'h74: joystick[7] <= ~release_btn; // arrow right
-
-			'h29: joystick[0] <= ~release_btn; // Space
-			'h11: joystick[8] <= ~release_btn; // Left Alt
-			'h0d: joystick[9] <= ~release_btn; // Tab
-			'h76: joystick[3] <= ~release_btn; // Escape
-		endcase
-	end
-end
-
-always @(posedge clk) begin
-	reg [3:0] prev_clk  = 0;
-	reg       old_reset = 0;
-	reg       action = 0;
-
-	old_reset <= reset;
-	input_strobe <= 0;
-
-	if(~old_reset & reset)begin
-		prev_clk  <= 0;
-		shift_reg <= 12'hFFF;
-	end else begin
-		prev_clk <= {ps2_kbd_clk,prev_clk[3:1]};
-		if(prev_clk == 1) begin
-			if (kdata[11] & ^kdata[10:2] & ~kdata[1] & kdata[0]) begin
-				shift_reg <= 12'hFFF;
-				if (kcode == 8'he0) ;
-				// Extended key code follows
-				else if (kcode == 8'hf0)
-					// Release code follows
-					action <= 1;
-				else begin
-					// Cancel extended/release flags for next time
-					action <= 0;
-					release_btn <= action;
-					code <= kcode;
-					input_strobe <= 1;
-				end
-			end else begin
-				shift_reg <= kdata;
-			end
-		end
-	end
-end
-endmodule
diff --git a/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/mist_io.v b/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/mist_io.v
index ad233a3b..2f41221f 100644
--- a/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/mist_io.v	
+++ b/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/mist_io.v	
@@ -5,6 +5,7 @@
 // http://code.google.com/p/mist-board/
 //
 // Copyright (c) 2014 Till Harbaum <till@harbaum.org>
+// Copyright (c) 2015-2017 Sorgelig
 //
 // This source file is free software: you can redistribute it and/or modify
 // it under the terms of the GNU General Public License as published
@@ -47,13 +48,16 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
 	output            SPI_DO,
 	input             SPI_DI,
 
-	output reg  [7:0] joystick_0,
-	output reg  [7:0] joystick_1,
+	output reg [7:0] joystick_0,
+	output reg [7:0] joystick_1,
+//	output reg [31:0] joystick_2,
+//	output reg [31:0] joystick_3,
+//	output reg [31:0] joystick_4,
 	output reg [15:0] joystick_analog_0,
 	output reg [15:0] joystick_analog_1,
 	output      [1:0] buttons,
 	output      [1:0] switches,
-	output            scandoubler_disable,
+	output            scandoublerD,
 	output            ypbpr,
 
 	output reg [31:0] status,
@@ -61,13 +65,13 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
 	// SD config
 	input             sd_conf,
 	input             sd_sdhc,
-	output            img_mounted, // signaling that new image has been mounted
+	output      [1:0] img_mounted, // signaling that new image has been mounted
 	output reg [31:0] img_size,    // size of image in bytes
 
 	// SD block level access
 	input      [31:0] sd_lba,
-	input             sd_rd,
-	input             sd_wr,
+	input       [1:0] sd_rd,
+	input       [1:0] sd_wr,
 	output reg        sd_ack,
 	output reg        sd_ack_conf,
 
@@ -82,192 +86,222 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
 	output reg        ps2_kbd_data,
 	output            ps2_mouse_clk,
 	output reg        ps2_mouse_data,
-	input             ps2_caps_led,
+
+	// ps2 alternative interface. 
+
+	// [8] - extended, [9] - pressed, [10] - toggles with every press/release
+	output reg [10:0] ps2_key = 0,
+
+	// [24] - toggles with every event
+	output reg [24:0] ps2_mouse = 0,
 
 	// ARM -> FPGA download
+	input             ioctl_ce,
 	output reg        ioctl_download = 0, // signal indicating an active download
 	output reg  [7:0] ioctl_index,        // menu index used to upload the file
-	output            ioctl_wr,
+	output reg        ioctl_wr = 0,
 	output reg [24:0] ioctl_addr,
 	output reg  [7:0] ioctl_dout
 );
 
-reg [7:0] b_data;
-reg [6:0] sbuf;
-reg [7:0] cmd;
-reg [2:0] bit_cnt;    // counts bits 0-7 0-7 ...
-reg [9:0] byte_cnt;   // counts bytes
 reg [7:0] but_sw;
 reg [2:0] stick_idx;
 
-reg    mount_strobe = 0;
+reg [1:0] mount_strobe = 0;
 assign img_mounted  = mount_strobe;
 
 assign buttons = but_sw[1:0];
 assign switches = but_sw[3:2];
-assign scandoubler_disable = but_sw[4];
+assign scandoublerD = but_sw[4];
 assign ypbpr = but_sw[5];
 
-wire [7:0] spi_dout = { sbuf, SPI_DI};
-
 // this variant of user_io is for 8 bit cores (type == a4) only
 wire [7:0] core_type = 8'ha4;
 
 // command byte read by the io controller
-wire [7:0] sd_cmd = { 4'h5, sd_conf, sd_sdhc, sd_wr, sd_rd };
+wire       drive_sel = sd_rd[1] | sd_wr[1];
+wire [7:0] sd_cmd = { 4'h6, sd_conf, sd_sdhc, sd_wr[drive_sel], sd_rd[drive_sel] };
+
+reg [7:0] cmd;
+reg [2:0] bit_cnt;    // counts bits 0-7 0-7 ...
+reg [9:0] byte_cnt;   // counts bytes
 
 reg spi_do;
 assign SPI_DO = CONF_DATA0 ? 1'bZ : spi_do;
 
-wire [7:0] kbd_led = { 2'b01, 4'b0000, ps2_caps_led, 1'b1};
+reg [7:0] spi_data_out;
 
-// drive MISO only when transmitting core id
-always@(negedge SPI_SCK) begin
-	if(!CONF_DATA0) begin
-		// first byte returned is always core type, further bytes are 
-		// command dependent
-      if(byte_cnt == 0) begin
-		  spi_do <= core_type[~bit_cnt];
+// SPI transmitter
+always@(negedge SPI_SCK) spi_do <= spi_data_out[~bit_cnt];
 
-		end else begin
-			case(cmd)
-				// reading config string
-				8'h14: begin
-					// returning a byte from string
-						if(byte_cnt < STRLEN + 1) spi_do <= conf_str[{STRLEN - byte_cnt,~bit_cnt}];
-							else spi_do <= 0;
-					end
-
-				// reading sd card status
-				8'h16: begin
-						if(byte_cnt == 1) spi_do <= sd_cmd[~bit_cnt];
-						else if((byte_cnt >= 2) && (byte_cnt < 6)) spi_do <= sd_lba[{5-byte_cnt, ~bit_cnt}];
-						else spi_do <= 0;
-					end
-
-				// reading sd card write data
-				8'h18:
-						spi_do <= b_data[~bit_cnt];
-
-				// reading keyboard LED status
-				8'h1f:
-						spi_do <= kbd_led[~bit_cnt];
-
-				default:
-						spi_do <= 0;
-			endcase
-		end
-   end
-end
-
-reg b_wr2,b_wr3;
-always @(negedge clk_sys) begin
-	b_wr3      <= b_wr2;
-	sd_buff_wr <= b_wr3;
-end
+reg [7:0] spi_data_in;
+reg       spi_data_ready = 0;
 
 // SPI receiver
 always@(posedge SPI_SCK or posedge CONF_DATA0) begin
+	reg [6:0]  sbuf;
+	reg [31:0] sd_lba_r;
+	reg        drive_sel_r;
 
 	if(CONF_DATA0) begin
-		b_wr2 <= 0;
 	   bit_cnt <= 0;
 	   byte_cnt <= 0;
-		sd_ack <= 0;
-		sd_ack_conf <= 0;
-	end else begin
-		b_wr2 <= 0;
-
-		sbuf <= spi_dout[6:0];
+		spi_data_out <= core_type;
+	end
+	else
+	begin
 		bit_cnt <= bit_cnt + 1'd1;
-		if(bit_cnt == 5) begin
-			if (byte_cnt == 0) sd_buff_addr <= 0;
-			if((byte_cnt != 0) & (sd_buff_addr != 511)) sd_buff_addr <= sd_buff_addr + 1'b1;
-			if((byte_cnt == 1) & ((cmd == 8'h17) | (cmd == 8'h19))) sd_buff_addr <= 0;
-		end
+		sbuf <= {sbuf[5:0], SPI_DI};
 
 		// finished reading command byte
       if(bit_cnt == 7) begin
+			if(!byte_cnt) cmd <= {sbuf, SPI_DI};
+
+			spi_data_in <= {sbuf, SPI_DI};
+			spi_data_ready <= ~spi_data_ready;
 			if(~&byte_cnt) byte_cnt <= byte_cnt + 8'd1;
-			if(byte_cnt == 0) begin
-				cmd <= spi_dout;
-
-				if(spi_dout == 8'h19) begin
-					sd_ack_conf  <= 1;
-					sd_buff_addr <= 0;
-				end
-				if((spi_dout == 8'h17) || (spi_dout == 8'h18)) begin
-					sd_ack       <= 1;
-					sd_buff_addr <= 0;
-				end
-				if(spi_dout == 8'h18) b_data <= sd_buff_din;
-
-				mount_strobe <= 0;
-
-			end else begin
 			
-				case(cmd)
-					// buttons and switches
-					8'h01: but_sw <= spi_dout; 
-					8'h02: joystick_0 <= spi_dout;
-					8'h03: joystick_1 <= spi_dout;
+			spi_data_out <= 0;
+			case({(!byte_cnt) ? {sbuf, SPI_DI} : cmd})
+				// reading config string
+				8'h14: if(byte_cnt < STRLEN) spi_data_out <= conf_str[(STRLEN - byte_cnt - 1)<<3 +:8];
 
-					// store incoming ps2 mouse bytes 
-					8'h04: begin
-							ps2_mouse_fifo[ps2_mouse_wptr] <= spi_dout; 
-							ps2_mouse_wptr <= ps2_mouse_wptr + 1'd1;
-						end
+				// reading sd card status
+				8'h16: if(byte_cnt == 0) begin
+							spi_data_out <= sd_cmd;
+							sd_lba_r <= sd_lba;
+							drive_sel_r <= drive_sel;
+						end else if (byte_cnt == 1) begin
+							spi_data_out <= drive_sel_r;
+						end else if(byte_cnt < 6) spi_data_out <= sd_lba_r[(5-byte_cnt)<<3 +:8];
 
-					// store incoming ps2 keyboard bytes 
-					8'h05: begin
-							ps2_kbd_fifo[ps2_kbd_wptr] <= spi_dout; 
-							ps2_kbd_wptr <= ps2_kbd_wptr + 1'd1;
-						end
-				
-					8'h15: status[7:0] <= spi_dout;
-				
-					// send SD config IO -> FPGA
-					// flag that download begins
-					// sd card knows data is config if sd_dout_strobe is asserted
-					// with sd_ack still being inactive (low)
-					8'h19,
-					// send sector IO -> FPGA
-					// flag that download begins
-					8'h17: begin
-							sd_buff_dout <= spi_dout;
-							b_wr2 <= 1;
-						end
+				// reading sd card write data
+				8'h18: spi_data_out <= sd_buff_din;
+			endcase
+		end
+	end
+end
 
-					8'h18: b_data <= sd_buff_din;
+reg [31:0] ps2_key_raw = 0;
+wire       pressed  = (ps2_key_raw[15:8] != 8'hf0);
+wire       extended = (~pressed ? (ps2_key_raw[23:16] == 8'he0) : (ps2_key_raw[15:8] == 8'he0));
 
-					// joystick analog
-					8'h1a: begin
-							// first byte is joystick index
-							if(byte_cnt == 1) stick_idx <= spi_dout[2:0];
-							else if(byte_cnt == 2) begin
-								// second byte is x axis
-								if(stick_idx == 0) joystick_analog_0[15:8] <= spi_dout;
-									else if(stick_idx == 1) joystick_analog_1[15:8] <= spi_dout;
-							end else if(byte_cnt == 3) begin
-								// third byte is y axis
-								if(stick_idx == 0) joystick_analog_0[7:0] <= spi_dout;
-									else if(stick_idx == 1) joystick_analog_1[7:0] <= spi_dout;
-							end
-						end
+// transfer to clk_sys domain
+always@(posedge clk_sys) begin
+	reg old_ss1, old_ss2;
+	reg old_ready1, old_ready2;
+	reg [2:0] b_wr;
+	reg       got_ps2 = 0;
 
-					// notify image selection
-					8'h1c: mount_strobe <= 1;
+	old_ss1 <= CONF_DATA0;
+	old_ss2 <= old_ss1;
+	old_ready1 <= spi_data_ready;
+	old_ready2 <= old_ready1;
+	
+	sd_buff_wr <= b_wr[0];
+	if(b_wr[2] && (~&sd_buff_addr)) sd_buff_addr <= sd_buff_addr + 1'b1;
+	b_wr <= (b_wr<<1);
 
-					// send image info
-					8'h1d: if(byte_cnt<5) img_size[(byte_cnt-1)<<3 +:8] <= spi_dout;
-
-					// status, 32bit version
-					8'h1e: if(byte_cnt<5) status[(byte_cnt-1)<<3 +:8] <= spi_dout;
-					default: ;
-				endcase
+	if(old_ss2) begin
+		got_ps2      <= 0;
+		sd_ack       <= 0;
+		sd_ack_conf  <= 0;
+		sd_buff_addr <= 0;
+		if(got_ps2) begin
+			if(cmd == 4) ps2_mouse[24] <= ~ps2_mouse[24]; 
+			if(cmd == 5) begin
+				ps2_key <= {~ps2_key[10], pressed, extended, ps2_key_raw[7:0]};
+				if(ps2_key_raw == 'hE012E07C) ps2_key[9:0] <= 'h37C; // prnscr pressed
+				if(ps2_key_raw == 'h7CE0F012) ps2_key[9:0] <= 'h17C; // prnscr released
+				if(ps2_key_raw == 'hF014F077) ps2_key[9:0] <= 'h377; // pause  pressed
 			end
 		end
 	end
+	else
+	if(old_ready2 ^ old_ready1) begin
+
+		if(cmd == 8'h18 && ~&sd_buff_addr) sd_buff_addr <= sd_buff_addr + 1'b1;
+
+		if(byte_cnt < 2) begin
+
+			if (cmd == 8'h19) sd_ack_conf  <= 1;
+			if((cmd == 8'h17) || (cmd == 8'h18)) sd_ack <= 1;
+			mount_strobe <= 0;
+
+			if(cmd == 5) ps2_key_raw <= 0;
+		end else begin
+		
+			case(cmd)
+				// buttons and switches
+				8'h01: but_sw <= spi_data_in; 
+				8'h02: joystick_0 <= spi_data_in;
+				8'h03: joystick_1 <= spi_data_in;
+//				8'h60: if (byte_cnt < 5) joystick_0[(byte_cnt-1)<<3 +:8] <= spi_data_in;
+//				8'h61: if (byte_cnt < 5) joystick_1[(byte_cnt-1)<<3 +:8] <= spi_data_in;
+//				8'h62: if (byte_cnt < 5) joystick_2[(byte_cnt-1)<<3 +:8] <= spi_data_in;
+//				8'h63: if (byte_cnt < 5) joystick_3[(byte_cnt-1)<<3 +:8] <= spi_data_in;
+//				8'h64: if (byte_cnt < 5) joystick_4[(byte_cnt-1)<<3 +:8] <= spi_data_in;
+				// store incoming ps2 mouse bytes 
+				8'h04: begin
+						got_ps2 <= 1;
+						case(byte_cnt)
+							2: ps2_mouse[7:0]   <= spi_data_in;
+							3: ps2_mouse[15:8]  <= spi_data_in;
+							4: ps2_mouse[23:16] <= spi_data_in;
+						endcase 
+						ps2_mouse_fifo[ps2_mouse_wptr] <= spi_data_in; 
+						ps2_mouse_wptr <= ps2_mouse_wptr + 1'd1;
+					end
+
+				// store incoming ps2 keyboard bytes 
+				8'h05: begin
+						got_ps2 <= 1;
+						ps2_key_raw[31:0] <= {ps2_key_raw[23:0], spi_data_in}; 						
+						ps2_kbd_fifo[ps2_kbd_wptr] <= spi_data_in; 
+						ps2_kbd_wptr <= ps2_kbd_wptr + 1'd1;
+					end
+			
+				8'h15: status[7:0] <= spi_data_in;
+			
+				// send SD config IO -> FPGA
+				// flag that download begins
+				// sd card knows data is config if sd_dout_strobe is asserted
+				// with sd_ack still being inactive (low)
+				8'h19,
+				// send sector IO -> FPGA
+				// flag that download begins
+				8'h17: begin
+						sd_buff_dout <= spi_data_in;
+						b_wr <= 1;
+					end
+
+				// joystick analog
+				8'h1a: begin
+						// first byte is joystick index
+						if(byte_cnt == 2) stick_idx <= spi_data_in[2:0];
+						else if(byte_cnt == 3) begin
+							// second byte is x axis
+							if(stick_idx == 0) joystick_analog_0[15:8] <= spi_data_in;
+								else if(stick_idx == 1) joystick_analog_1[15:8] <= spi_data_in;
+						end else if(byte_cnt == 4) begin
+							// third byte is y axis
+							if(stick_idx == 0) joystick_analog_0[7:0] <= spi_data_in;
+								else if(stick_idx == 1) joystick_analog_1[7:0] <= spi_data_in;
+						end
+					end
+
+				// notify image selection
+				8'h1c: mount_strobe[spi_data_in[0]] <= 1;
+
+				// send image info
+				8'h1d: if(byte_cnt<6) img_size[(byte_cnt-2)<<3 +:8] <= spi_data_in;
+
+				// status, 32bit version
+				8'h1e: if(byte_cnt<6) status[(byte_cnt-2)<<3 +:8] <= spi_data_in;
+				default: ;
+			endcase
+		end
+	end
 end
 
 
@@ -422,6 +456,8 @@ localparam UIO_FILE_TX      = 8'h53;
 localparam UIO_FILE_TX_DAT  = 8'h54;
 localparam UIO_FILE_INDEX   = 8'h55;
 
+reg        rdownload = 0;
+
 // data_io has its own SPI interface to the io controller
 always@(posedge SPI_SCK, posedge SPI_SS2) begin
 	reg  [6:0] sbuf;
@@ -431,15 +467,10 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
 
 	if(SPI_SS2) cnt <= 0;
 	else begin
-		rclk <= 0;
-
 		// don't shift in last bit. It is evaluated directly
 		// when writing to ram
 		if(cnt != 15) sbuf <= { sbuf[5:0], SPI_DI};
 
-		// increase target address after write
-		if(rclk) addr <= addr + 1'd1;
-
 		// count 0-7 8-15 8-15 ... 
 		if(cnt < 15) cnt <= cnt + 1'd1;
 			else cnt <= 8;
@@ -451,11 +482,15 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
 		if((cmd == UIO_FILE_TX) && (cnt == 15)) begin
 			// prepare 
 			if(SPI_DI) begin
-				addr <= 0;
-				ioctl_download <= 1; 
+				case(ioctl_index[4:0]) 
+							1: addr <= 25'h200000; // TRD buffer  at 2MB
+							2: addr <= 25'h400000; // tape buffer at 4MB 
+					default: addr <= 25'h150000; // boot rom
+				endcase
+				rdownload <= 1; 
 			end else begin
 				addr_w <= addr;
-				ioctl_download <= 0;
+				rdownload <= 0;
 			end
 		end
 
@@ -463,7 +498,8 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
 		if((cmd == UIO_FILE_TX_DAT) && (cnt == 15)) begin
 			addr_w <= addr;
 			data_w <= {sbuf, SPI_DI};
-			rclk <= 1;
+			addr <= addr + 1'd1;
+			rclk <= ~rclk;
 		end
 
       // expose file (menu) index
@@ -471,21 +507,24 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
 	end
 end
 
-assign ioctl_wr = |ioctl_wrd;
-reg [1:0] ioctl_wrd;
-
-always@(negedge clk_sys) begin
+// transfer to ioctl_clk domain.
+// ioctl_index is set before ioctl_download, so it's stable already
+always@(posedge clk_sys) begin
 	reg        rclkD, rclkD2;
 
-	rclkD    <= rclk;
-	rclkD2   <= rclkD;
-	ioctl_wrd<= {ioctl_wrd[0],1'b0};
+	if(ioctl_ce) begin
+		ioctl_download <= rdownload;
 
-	if(rclkD & ~rclkD2) begin
-		ioctl_dout <= data_w;
-		ioctl_addr <= addr_w;
-		ioctl_wrd  <= 2'b11;
+		rclkD    <= rclk;
+		rclkD2   <= rclkD;
+		ioctl_wr <= 0;
+
+		if(rclkD != rclkD2) begin
+			ioctl_dout <= data_w;
+			ioctl_addr <= addr_w;
+			ioctl_wr   <= 1;
+		end
 	end
 end
 
-endmodule
+endmodule 
\ No newline at end of file
diff --git a/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/osd.v b/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/osd.v
index c62c10af..b9181763 100644
--- a/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/osd.v	
+++ b/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/osd.v	
@@ -11,13 +11,15 @@ module osd (
 	input        SPI_SS3,
 	input        SPI_DI,
 
+	input  [1:0] rotate, //[0] - rotate [1] - left or right
+
 	// VGA signals coming from core
 	input  [5:0] R_in,
 	input  [5:0] G_in,
 	input  [5:0] B_in,
 	input        HSync,
 	input        VSync,
-	
+
 	// VGA signals going to video connector
 	output [5:0] R_out,
 	output [5:0] G_out,
@@ -59,7 +61,7 @@ always@(posedge SPI_SCK, posedge SPI_SS3) begin
 
 		if(cnt == 7) begin
 			cmd <= {sbuf[6:0], SPI_DI};
-      
+
 			// lower three command bits are line address
 			bcnt <= {sbuf[1:0], SPI_DI, 8'h00};
 
@@ -91,7 +93,7 @@ reg  [9:0] vs_low, vs_high;
 wire       vs_pol = vs_high < vs_low;
 wire [9:0] dsp_height = vs_pol ? vs_low : vs_high;
 
-wire doublescan = (dsp_height>350); 
+wire doublescan = (dsp_height>350);
 
 reg ce_pix;
 always @(negedge clk_sys) begin
@@ -124,13 +126,13 @@ always @(posedge clk_sys) begin
 		hsD2 <= hsD;
 
 		// falling edge of HSync
-		if(!hsD && hsD2) begin	
+		if(!hsD && hsD2) begin
 			h_cnt <= 0;
 			hs_high <= h_cnt;
 		end
 
 		// rising edge of HSync
-		else if(hsD && !hsD2) begin	
+		else if(hsD && !hsD2) begin
 			h_cnt <= 0;
 			hs_low <= h_cnt;
 			v_cnt <= v_cnt + 1'd1;
@@ -142,13 +144,13 @@ always @(posedge clk_sys) begin
 		vsD2 <= vsD;
 
 		// falling edge of VSync
-		if(!vsD && vsD2) begin	
+		if(!vsD && vsD2) begin
 			v_cnt <= 0;
 			vs_high <= v_cnt;
 		end
 
 		// rising edge of VSync
-		else if(vsD && !vsD2) begin	
+		else if(vsD && !vsD2) begin
 			v_cnt <= 0;
 			vs_low <= v_cnt;
 		end
@@ -160,17 +162,30 @@ wire [9:0] h_osd_start = ((dsp_width - OSD_WIDTH)>> 1) + OSD_X_OFFSET;
 wire [9:0] h_osd_end   = h_osd_start + OSD_WIDTH;
 wire [9:0] v_osd_start = ((dsp_height- (OSD_HEIGHT<<doublescan))>> 1) + OSD_Y_OFFSET;
 wire [9:0] v_osd_end   = v_osd_start + (OSD_HEIGHT<<doublescan);
-wire [9:0] osd_hcnt    = h_cnt - h_osd_start + 1'd1;  // one pixel offset for osd_byte register
+wire [9:0] osd_hcnt    = h_cnt - h_osd_start;
 wire [9:0] osd_vcnt    = v_cnt - v_osd_start;
+wire [9:0] osd_hcnt_next  = osd_hcnt + 2'd1;  // one pixel offset for osd pixel
+wire [9:0] osd_hcnt_next2 = osd_hcnt + 2'd2;  // two pixel offset for osd byte address register
 
-wire osd_de = osd_enable && 
+wire osd_de = osd_enable &&
               (HSync != hs_pol) && (h_cnt >= h_osd_start) && (h_cnt < h_osd_end) &&
               (VSync != vs_pol) && (v_cnt >= v_osd_start) && (v_cnt < v_osd_end);
 
-reg  [7:0] osd_byte; 
-always @(posedge clk_sys) if(ce_pix) osd_byte <= osd_buffer[{doublescan ? osd_vcnt[7:5] : osd_vcnt[6:4], osd_hcnt[7:0]}];
+reg [10:0] osd_buffer_addr;
+wire [7:0] osd_byte = osd_buffer[osd_buffer_addr];
+reg        osd_pixel;
 
-wire osd_pixel = osd_byte[doublescan ? osd_vcnt[4:2] : osd_vcnt[3:1]];
+always @(posedge clk_sys) begin
+    if(ce_pix) begin
+		osd_buffer_addr <= rotate[0] ? {rotate[1] ? osd_hcnt_next2[7:5] : ~osd_hcnt_next2[7:5],
+		                                rotate[1] ? (doublescan ? ~osd_vcnt[7:0] : ~{osd_vcnt[6:0], 1'b0}) :
+										            (doublescan ?  osd_vcnt[7:0]  : {osd_vcnt[6:0], 1'b0})} :
+		                               {doublescan ? osd_vcnt[7:5] : osd_vcnt[6:4], osd_hcnt_next2[7:0]};
+
+		osd_pixel <= rotate[0]  ? osd_byte[rotate[1] ? osd_hcnt_next[4:2] : ~osd_hcnt_next[4:2]] :
+		                          osd_byte[doublescan ? osd_vcnt[4:2] : osd_vcnt[3:1]];
+	end
+end
 
 assign R_out = !osd_de ? R_in : {osd_pixel, osd_pixel, OSD_COLOR[2], R_in[5:3]};
 assign G_out = !osd_de ? G_in : {osd_pixel, osd_pixel, OSD_COLOR[1], G_in[5:3]};
diff --git a/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/video_mixer.sv b/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/video_mixer.sv
index 04cfd4ba..126ca276 100644
--- a/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/video_mixer.sv	
+++ b/Arcade_MiST/Scramble Hardware/Amidar_MiST/rtl/video_mixer.sv	
@@ -50,7 +50,7 @@ module video_mixer
 	input  [1:0] scanlines,
 
 	// 0 = HVSync 31KHz, 1 = CSync 15KHz
-	input        scandoubler_disable,
+	input        scandoublerD,
 
 	// High quality 2x scaling
 	input        hq2x,
@@ -60,7 +60,7 @@ module video_mixer
 
 	// 0 = 16-240 range. 1 = 0-255 range. (only for YPbPr color space)
 	input        ypbpr_full,
-
+	input  [1:0] rotate, //[0] - rotate [1] - left or right
 	// color
 	input [DWIDTH:0] R,
 	input [DWIDTH:0] G,
@@ -113,9 +113,9 @@ scandoubler #(.LENGTH(LINE_LENGTH), .HALF_DEPTH(HALF_DEPTH)) scandoubler
 	.b_out(B_sd)
 );
 
-wire [DWIDTH:0] rt  = (scandoubler_disable ? R : R_sd);
-wire [DWIDTH:0] gt  = (scandoubler_disable ? G : G_sd);
-wire [DWIDTH:0] bt  = (scandoubler_disable ? B : B_sd);
+wire [DWIDTH:0] rt  = (scandoublerD ? R : R_sd);
+wire [DWIDTH:0] gt  = (scandoublerD ? G : G_sd);
+wire [DWIDTH:0] bt  = (scandoublerD ? B : B_sd);
 
 generate
 	if(HALF_DEPTH) begin
@@ -129,8 +129,8 @@ generate
 	end
 endgenerate
 
-wire       hs = (scandoubler_disable ? HSync : hs_sd);
-wire       vs = (scandoubler_disable ? VSync : vs_sd);
+wire       hs = (scandoublerD ? HSync : hs_sd);
+wire       vs = (scandoublerD ? VSync : vs_sd);
 
 reg scanline = 0;
 always @(posedge clk_sys) begin
@@ -182,6 +182,7 @@ osd #(OSD_X_OFFSET, OSD_Y_OFFSET, OSD_COLOR) osd
 	.B_in(b_out),
 	.HSync(hs),
 	.VSync(vs),
+	.rotate(rotate),
 
 	.R_out(red),
 	.G_out(green),
@@ -236,7 +237,7 @@ wire [7:0] pr = (pr_8[17:8] < 16) ? 8'd16 : (pr_8[17:8] > 240) ? 8'd240 : pr_8[1
 assign VGA_R  = ypbpr ? (ypbpr_full ? yuv_full[pr-8'd16] : pr[7:2]) :   red;
 assign VGA_G  = ypbpr ? (ypbpr_full ? yuv_full[y -8'd16] :  y[7:2]) : green;
 assign VGA_B  = ypbpr ? (ypbpr_full ? yuv_full[pb-8'd16] : pb[7:2]) :  blue;
-assign VGA_VS = (scandoubler_disable | ypbpr) ? 1'b1 : ~vs_sd;
-assign VGA_HS = scandoubler_disable ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
+assign VGA_VS = (scandoublerD | ypbpr) ? 1'b1 : ~vs_sd;
+assign VGA_HS = scandoublerD ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
 
 endmodule
diff --git a/Arcade_MiST/Scramble Hardware/Frogger_MiST/Frogger.qsf b/Arcade_MiST/Scramble Hardware/Frogger_MiST/Frogger.qsf
index 3486921b..975096e3 100644
--- a/Arcade_MiST/Scramble Hardware/Frogger_MiST/Frogger.qsf	
+++ b/Arcade_MiST/Scramble Hardware/Frogger_MiST/Frogger.qsf	
@@ -1,6 +1,6 @@
 # -------------------------------------------------------------------------- #
 #
-# Copyright (C) 1991-2013 Altera Corporation
+# Copyright (C) 1991-2014 Altera Corporation
 # Your use of Altera Corporation's design tools, logic functions 
 # and other software and tools, and its AMPP partner logic 
 # functions, and any output files from any of the foregoing 
@@ -17,15 +17,15 @@
 # -------------------------------------------------------------------------- #
 #
 # Quartus II 64-Bit
-# Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
-# Date created = 05:08:48  November 15, 2017
+# Version 13.1.4 Build 182 03/12/2014 SJ Web Edition
+# Date created = 17:33:03  March 08, 2019
 #
 # -------------------------------------------------------------------------- #
 #
 # Notes:
 #
 # 1) The default values for assignments are stored in the file:
-#		Arcade-Frogger_assignment_defaults.qdf
+#		Frogger_assignment_defaults.qdf
 #    If this file doesn't exist, see file:
 #		assignment_defaults.qdf
 #
@@ -45,6 +45,35 @@ set_global_assignment -name PROJECT_CREATION_TIME_DATE "01:53:30  APRIL 20, 2017
 set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
 set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
 set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
+set_global_assignment -name SYSTEMVERILOG_FILE rtl/FroggerMist.sv
+set_global_assignment -name VHDL_FILE rtl/scramble_top.vhd
+set_global_assignment -name VHDL_FILE rtl/scramble.vhd
+set_global_assignment -name VHDL_FILE rtl/scramble_video.vhd
+set_global_assignment -name VHDL_FILE rtl/scramble_audio.vhd
+set_global_assignment -name VHDL_FILE rtl/YM2149_linmix_sep.vhd
+set_global_assignment -name VHDL_FILE rtl/MULT18X18.vhd
+set_global_assignment -name VHDL_FILE rtl/i82c55.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80sed.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80_Reg.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80_Pack.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80_MCode.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80_ALU.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_2.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_1.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_0.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_PGM.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_OBJ_1.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_OBJ_0.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_LUT.vhd
+set_global_assignment -name QIP_FILE rtl/pll.qip
+set_global_assignment -name VHDL_FILE rtl/dpram.vhd
+set_global_assignment -name VERILOG_FILE rtl/mist_io.v
+set_global_assignment -name VERILOG_FILE rtl/scandoubler.v
+set_global_assignment -name VERILOG_FILE rtl/osd.v
+set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
+set_global_assignment -name VHDL_FILE rtl/dac.vhd
+set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
 
 # Pin & Location Assignments
 # ==========================
@@ -80,28 +109,54 @@ set_location_assignment PIN_91 -to SPI_SS3
 set_location_assignment PIN_13 -to CONF_DATA0
 set_location_assignment PLL_1 -to "pll:pll|altpll:altpll_component"
 
+# Classic Timing Assignments
+# ==========================
+set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
+set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
+
 # Analysis & Synthesis Assignments
 # ================================
 set_global_assignment -name FAMILY "Cyclone III"
 set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
 set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
 set_global_assignment -name TOP_LEVEL_ENTITY FroggerMist
+set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
 
 # Fitter Assignments
 # ==================
 set_global_assignment -name DEVICE EP3C25E144C8
+set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
+set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
+set_global_assignment -name ENABLE_NCE_PIN OFF
+set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
+set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
+set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
+set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
+set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
+set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
+set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
+set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
+set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
 
 # Assembler Assignments
 # =====================
 set_global_assignment -name GENERATE_RBF_FILE ON
+set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
 
 # Power Estimation Assignments
 # ============================
 set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
 set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
 
-# ----------------------
-# start ENTITY(Scramble)
+# Advanced I/O Timing Assignments
+# ===============================
+set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
+set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
+set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
+set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
+
+# -------------------------
+# start ENTITY(FroggerMist)
 
 	# start DESIGN_PARTITION(Top)
 	# ---------------------------
@@ -115,57 +170,6 @@ set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
 	# end DESIGN_PARTITION(Top)
 	# -------------------------
 
-# end ENTITY(Scramble)
-# --------------------
-set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
-set_global_assignment -name VERILOG_FILE rtl/scandoubler.v
-set_global_assignment -name VERILOG_FILE rtl/osd.v
-set_global_assignment -name VERILOG_FILE rtl/keyboard.v
-set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
-set_global_assignment -name VHDL_FILE rtl/dac.vhd
-set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
-set_global_assignment -name VHDL_FILE rtl/cpu/T80sed.vhd
-set_global_assignment -name VHDL_FILE rtl/cpu/T80_Reg.vhd
-set_global_assignment -name VHDL_FILE rtl/cpu/T80_Pack.vhd
-set_global_assignment -name VHDL_FILE rtl/cpu/T80_MCode.vhd
-set_global_assignment -name VHDL_FILE rtl/cpu/T80_ALU.vhd
-set_global_assignment -name VHDL_FILE rtl/cpu/T80.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_2.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_1.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_0.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_PGM.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_OBJ_1.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_OBJ_0.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_LUT.vhd
-set_global_assignment -name QIP_FILE rtl/pll.qip
-set_global_assignment -name VHDL_FILE rtl/MULT18X18.vhd
-set_global_assignment -name VHDL_FILE rtl/i82c55.vhd
-set_global_assignment -name VHDL_FILE rtl/dpram.vhd
-set_global_assignment -name VERILOG_FILE rtl/build_id.v
-set_global_assignment -name VHDL_FILE rtl/YM2149_linmix_sep.vhd
-set_global_assignment -name VHDL_FILE rtl/scramble_video.vhd
-set_global_assignment -name VHDL_FILE rtl/scramble_top.vhd
-set_global_assignment -name VHDL_FILE rtl/scramble_audio.vhd
-set_global_assignment -name VHDL_FILE rtl/scramble.vhd
-set_global_assignment -name SYSTEMVERILOG_FILE rtl/FroggerMist.sv
-set_global_assignment -name VERILOG_FILE rtl/mist_io.v
-set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
-set_global_assignment -name ENABLE_NCE_PIN OFF
-set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
-set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
-set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
-set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
-set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
-set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
-set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
-set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
-set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
-set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
-set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
-set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
-set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
-set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
-set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
-set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
-
+# end ENTITY(FroggerMist)
+# -----------------------
 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
diff --git a/Arcade_MiST/Scramble Hardware/Frogger_MiST/README.txt b/Arcade_MiST/Scramble Hardware/Frogger_MiST/README.txt
index aa348b1d..f8ca21ad 100644
--- a/Arcade_MiST/Scramble Hardware/Frogger_MiST/README.txt	
+++ b/Arcade_MiST/Scramble Hardware/Frogger_MiST/README.txt	
@@ -8,7 +8,7 @@
 -- Copyright (c) MikeJ - Feb 2007
 ---------------------------------------------------------------------------------
 -- 
--- Only controls are rotated on VGA output.
+-- Only controls and OSD are rotated on Video output.
 -- 
 -- 
 -- Keyboard inputs :
diff --git a/Arcade_MiST/Scramble Hardware/Frogger_MiST/Release/Frogger.rbf b/Arcade_MiST/Scramble Hardware/Frogger_MiST/Release/Frogger.rbf
index 9c55eb65..21d95fa4 100644
Binary files a/Arcade_MiST/Scramble Hardware/Frogger_MiST/Release/Frogger.rbf and b/Arcade_MiST/Scramble Hardware/Frogger_MiST/Release/Frogger.rbf differ
diff --git a/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/FroggerMist.sv b/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/FroggerMist.sv
index 5caf3f1b..e0919dce 100644
--- a/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/FroggerMist.sv	
+++ b/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/FroggerMist.sv	
@@ -42,37 +42,32 @@ module FroggerMist
 
 localparam CONF_STR = {
 	"Frogger;;",
-	"O2,Joystick Control,Upright,Normal;",
-	"O34,Scandoubler Fx,None,HQ2x,CRT 25%,CRT 50%;",
+	"O2,Rotate Controls,Off,On;",
+	"O34,Scanlines,Off,25%,50%,75%;",
 	"T6,Reset;",
-	"V,v1.00.",`BUILD_DATE
+	"V,v1.20.",`BUILD_DATE
 };
 
-
-////////////////////   CLOCKS   ///////////////////
+assign LED = 1;
+assign AUDIO_R = AUDIO_L;
 
 wire clk_sys;
 wire pll_locked;
-
-pll pll
-(
+pll pll(
 	.inclk0(CLOCK_27),
 	.areset(0),
 	.c0(clk_sys),
 	.locked(pll_locked)
-);
+	);
 
 reg ce_6p, ce_6n, ce_12, ce_1p79;
 always @(negedge clk_sys) begin
-	reg [1:0] div = 0;
-	reg [3:0] div179 = 0;
-	
+reg [1:0] div = 0;
+reg [3:0] div179 = 0;
 	div <= div + 1'd1;
-
 	ce_12 <= div[0];
 	ce_6p <= div[0] & ~div[1];
-	ce_6n <= div[0] &  div[1];
-	
+	ce_6n <= div[0] &  div[1];	
    ce_1p79 <= 0;
    div179 <= div179 - 1'd1;
    if(!div179) begin
@@ -84,31 +79,45 @@ end
 wire [31:0] status;
 wire  [1:0] buttons;
 wire  [1:0] switches;
-wire  [7:0] kbjoy;
 wire  [7:0] joystick_0;
 wire  [7:0] joystick_1;
-wire        scandoubler_disable;
+wire        scandoublerD;
 wire        ypbpr;
-wire        ps2_kbd_clk, ps2_kbd_data;
-wire [9:0] audio;
-wire hsync,vsync;
-assign LED = 1;
-wire blankn = ~(hblank | vblank);
-wire hblank, vblank;
-wire hs, vs;
-wire [3:0] r,b,g;
+wire [10:0] ps2_key;
+wire  [9:0] audio;
+wire 			hs, vs;
+wire 			blankn = ~(hb | vb);
+wire 			hb, vb;
+wire  [3:0] r,b,g;
 
-video_mixer #(.LINE_LENGTH(640), .HALF_DEPTH(0)) video_mixer
-(
+scramble_top scramble(
+	.O_VIDEO_R(r),
+	.O_VIDEO_G(g),
+	.O_VIDEO_B(b),
+	.O_HSYNC(hs),
+	.O_VSYNC(vs),
+   .O_HBLANK(hb),
+   .O_VBLANK(vb),
+	.O_AUDIO(audio),
+	.button_in(~{btn_two_players, m_fire, btn_coin, btn_one_player, m_right, m_left, m_down, m_up}),
+	.RESET(status[0] | status[6] | buttons[1]),
+	.clk(clk_sys),
+	.ena_12(ce_12),
+	.ena_6(ce_6p),
+	.ena_6b(ce_6n),
+	.ena_1_79(ce_1p79)
+	);
+
+video_mixer video_mixer(
 	.clk_sys(clk_sys),
 	.ce_pix(ce_6p),
 	.ce_pix_actual(ce_6p),
 	.SPI_SCK(SPI_SCK),
 	.SPI_SS3(SPI_SS3),
 	.SPI_DI(SPI_DI),
-	.R({r,r[1:0]}),
-	.G({g,g[1:0]}),
-	.B({b,b[1:0]}),
+	.R(blankn ? {r,r[1:0]} : 0),
+	.G(blankn ? {g,g[1:0]} : 0),
+	.B(blankn ? {b,b[1:0]} : 0),
 	.HSync(hs),
 	.VSync(vs),
 	.VGA_R(VGA_R),
@@ -116,16 +125,18 @@ video_mixer #(.LINE_LENGTH(640), .HALF_DEPTH(0)) video_mixer
 	.VGA_B(VGA_B),
 	.VGA_VS(VGA_VS),
 	.VGA_HS(VGA_HS),
-	.scandoubler_disable(scandoubler_disable),
-	.scanlines(scandoubler_disable ? 2'b00 : {status[4:3] == 3, status[4:3] == 2}),
-	.hq2x(status[4:3]==1),
+	.rotate({1'b1,status[2]}),
+	.scandoublerD(scandoublerD),
+	.scanlines(scandoublerD ? 2'b00 : status[4:3]),
+	.ypbpr(ypbpr),
 	.ypbpr_full(1),
 	.line_start(0),
 	.mono(0)
-);
+	);
 
-mist_io #(.STRLEN(($size(CONF_STR)>>3))) mist_io
-(
+mist_io #(
+	.STRLEN(($size(CONF_STR)>>3)))
+mist_io(
 	.clk_sys        (clk_sys        ),
 	.conf_str       (CONF_STR       ),
 	.SPI_SCK        (SPI_SCK        ),
@@ -135,67 +146,59 @@ mist_io #(.STRLEN(($size(CONF_STR)>>3))) mist_io
 	.SPI_DI         (SPI_DI         ),
 	.buttons        (buttons        ),
 	.switches   	 (switches       ),
-	.scandoubler_disable(scandoubler_disable),
+	.scandoublerD	 (scandoublerD	  ),
 	.ypbpr          (ypbpr          ),
-	.ps2_kbd_clk    (ps2_kbd_clk    ),
-	.ps2_kbd_data   (ps2_kbd_data   ),
+	.ps2_key			 (ps2_key        ),
 	.joystick_0   	 (joystick_0     ),
 	.joystick_1     (joystick_1     ),
 	.status         (status         )
-);
-
-
-
-keyboard keyboard(
-	.clk(clk_sys),
-	.reset(),
-	.ps2_kbd_clk(ps2_kbd_clk),
-	.ps2_kbd_data(ps2_kbd_data),
-	.joystick(kbjoy)
 	);
 	
-wire m_up     = status[2] ? kbjoy[6] | joystick_0[1] | joystick_1[1] : kbjoy[4] | joystick_0[3] | joystick_1[3];
-wire m_down   = status[2] ? kbjoy[7] | joystick_0[0] | joystick_1[0] : kbjoy[5] | joystick_0[2] | joystick_1[2];
-wire m_left   = status[2] ? kbjoy[5] | joystick_0[2] | joystick_1[2] : kbjoy[6] | joystick_0[1] | joystick_1[1];
-wire m_right  = status[2] ? kbjoy[4] | joystick_0[3] | joystick_1[3] : kbjoy[7] | joystick_0[0] | joystick_1[0];
-
-wire m_fire   = kbjoy[0] | joystick_0[4] | joystick_1[4];
-wire m_start1 = kbjoy[1];
-wire m_start2 = kbjoy[2];
-wire m_coin   = kbjoy[3];
-
-
-scramble_top scramble
-(
-	.O_VIDEO_R(r),
-	.O_VIDEO_G(g),
-	.O_VIDEO_B(b),
-	.O_HSYNC(hs),
-	.O_VSYNC(vs),
-   .O_HBLANK(hblank),
-   .O_VBLANK(vblank),
-
-	.O_AUDIO(audio),
-
-	.button_in(~{m_start2, m_fire, m_coin, m_start1, m_right, m_left, m_down, m_up}),
-
-	.RESET(status[0] | status[6] | buttons[1]),
-	.clk(clk_sys),
-	.ena_12(ce_12),
-	.ena_6(ce_6p),
-	.ena_6b(ce_6n),
-	.ena_1_79(ce_1p79)
-);
-dac dac
-(
+dac dac(
 	.clk_i(clk_sys),
 	.res_n_i(1),
 	.dac_i(audio),
 	.dac_o(AUDIO_L)
 	);
+//											Rotated														Normal
+wire m_up     = ~status[2] ? btn_left | joystick_0[1] | joystick_1[1] : btn_up | joystick_0[3] | joystick_1[3];
+wire m_down   = ~status[2] ? btn_right | joystick_0[0] | joystick_1[0] : btn_down | joystick_0[2] | joystick_1[2];
+wire m_left   = ~status[2] ? btn_down | joystick_0[2] | joystick_1[2] : btn_left | joystick_0[1] | joystick_1[1];
+wire m_right  = ~status[2] ? btn_up | joystick_0[3] | joystick_1[3] : btn_right | joystick_0[0] | joystick_1[0];
 
-assign AUDIO_R = AUDIO_L;
+wire m_fire   = btn_fire1 | joystick_0[4] | joystick_1[4];
+wire m_bomb   = btn_fire2 | joystick_0[5] | joystick_1[5];
 
+reg btn_one_player = 0;
+reg btn_two_players = 0;
+reg btn_left = 0;
+reg btn_right = 0;
+reg btn_down = 0;
+reg btn_up = 0;
+reg btn_fire1 = 0;
+reg btn_fire2 = 0;
+reg btn_fire3 = 0;
+reg btn_coin  = 0;
+wire       pressed = ps2_key[9];
+wire [7:0] code    = ps2_key[7:0];	
 
-endmodule
+always @(posedge clk_sys) begin
+	reg old_state;
+	old_state <= ps2_key[10];
+	if(old_state != ps2_key[10]) begin
+		case(code)
+			'h75: btn_up         	<= pressed; // up
+			'h72: btn_down        	<= pressed; // down
+			'h6B: btn_left      		<= pressed; // left
+			'h74: btn_right       	<= pressed; // right
+			'h76: btn_coin				<= pressed; // ESC
+			'h05: btn_one_player   	<= pressed; // F1
+			'h06: btn_two_players  	<= pressed; // F2
+			'h14: btn_fire3 			<= pressed; // ctrl
+			'h11: btn_fire2 			<= pressed; // alt
+			'h29: btn_fire1   		<= pressed; // Space
+		endcase
+	end
+end
 
+endmodule 
\ No newline at end of file
diff --git a/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/build_id.v b/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/build_id.v
index 629dd9aa..9a9c7924 100644
--- a/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/build_id.v	
+++ b/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/build_id.v	
@@ -1,2 +1,2 @@
-`define BUILD_DATE "171117"
-`define BUILD_TIME "105138"
+`define BUILD_DATE "190308"
+`define BUILD_TIME "173550"
diff --git a/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/keyboard.v b/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/keyboard.v
deleted file mode 100644
index 89f7e34e..00000000
--- a/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/keyboard.v	
+++ /dev/null
@@ -1,82 +0,0 @@
-
-
-module keyboard
-(
-	input  clk,
-	input  reset,
-	input  ps2_kbd_clk,
-	input  ps2_kbd_data,
-
-	output reg[7:0] joystick
-);
-
-reg [11:0] shift_reg = 12'hFFF;
-wire[11:0] kdata = {ps2_kbd_data,shift_reg[11:1]};
-wire [7:0] kcode = kdata[9:2];
-reg        release_btn = 0;
-
-reg  [7:0] code;
-reg        input_strobe = 0;
-
-always @(negedge clk) begin
-	reg old_reset = 0;
-
-	old_reset <= reset;
-
-	if(~old_reset & reset)begin
-		joystick <= 0;
-	end
-
-	if(input_strobe) begin
-		case(code)
-			'h16: joystick[1] <= ~release_btn; // 1
-			'h1E: joystick[2] <= ~release_btn; // 2
-
-			'h75: joystick[4] <= ~release_btn; // arrow up
-			'h72: joystick[5] <= ~release_btn; // arrow down
-			'h6B: joystick[6] <= ~release_btn; // arrow left
-			'h74: joystick[7] <= ~release_btn; // arrow right
-
-			'h29: joystick[0] <= ~release_btn; // Space
-			'h11: joystick[1] <= ~release_btn; // Left Alt
-			'h0d: joystick[2] <= ~release_btn; // Tab
-			'h76: joystick[3] <= ~release_btn; // Escape
-		endcase
-	end
-end
-
-always @(posedge clk) begin
-	reg [3:0] prev_clk  = 0;
-	reg       old_reset = 0;
-	reg       action = 0;
-
-	old_reset <= reset;
-	input_strobe <= 0;
-
-	if(~old_reset & reset)begin
-		prev_clk  <= 0;
-		shift_reg <= 12'hFFF;
-	end else begin
-		prev_clk <= {ps2_kbd_clk,prev_clk[3:1]};
-		if(prev_clk == 1) begin
-			if (kdata[11] & ^kdata[10:2] & ~kdata[1] & kdata[0]) begin
-				shift_reg <= 12'hFFF;
-				if (kcode == 8'he0) ;
-				// Extended key code follows
-				else if (kcode == 8'hf0)
-					// Release code follows
-					action <= 1;
-				else begin
-					// Cancel extended/release flags for next time
-					action <= 0;
-					release_btn <= action;
-					code <= kcode;
-					input_strobe <= 1;
-				end
-			end else begin
-				shift_reg <= kdata;
-			end
-		end
-	end
-end
-endmodule
diff --git a/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/mist_io.v b/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/mist_io.v
index ad233a3b..2f41221f 100644
--- a/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/mist_io.v	
+++ b/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/mist_io.v	
@@ -5,6 +5,7 @@
 // http://code.google.com/p/mist-board/
 //
 // Copyright (c) 2014 Till Harbaum <till@harbaum.org>
+// Copyright (c) 2015-2017 Sorgelig
 //
 // This source file is free software: you can redistribute it and/or modify
 // it under the terms of the GNU General Public License as published
@@ -47,13 +48,16 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
 	output            SPI_DO,
 	input             SPI_DI,
 
-	output reg  [7:0] joystick_0,
-	output reg  [7:0] joystick_1,
+	output reg [7:0] joystick_0,
+	output reg [7:0] joystick_1,
+//	output reg [31:0] joystick_2,
+//	output reg [31:0] joystick_3,
+//	output reg [31:0] joystick_4,
 	output reg [15:0] joystick_analog_0,
 	output reg [15:0] joystick_analog_1,
 	output      [1:0] buttons,
 	output      [1:0] switches,
-	output            scandoubler_disable,
+	output            scandoublerD,
 	output            ypbpr,
 
 	output reg [31:0] status,
@@ -61,13 +65,13 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
 	// SD config
 	input             sd_conf,
 	input             sd_sdhc,
-	output            img_mounted, // signaling that new image has been mounted
+	output      [1:0] img_mounted, // signaling that new image has been mounted
 	output reg [31:0] img_size,    // size of image in bytes
 
 	// SD block level access
 	input      [31:0] sd_lba,
-	input             sd_rd,
-	input             sd_wr,
+	input       [1:0] sd_rd,
+	input       [1:0] sd_wr,
 	output reg        sd_ack,
 	output reg        sd_ack_conf,
 
@@ -82,192 +86,222 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
 	output reg        ps2_kbd_data,
 	output            ps2_mouse_clk,
 	output reg        ps2_mouse_data,
-	input             ps2_caps_led,
+
+	// ps2 alternative interface. 
+
+	// [8] - extended, [9] - pressed, [10] - toggles with every press/release
+	output reg [10:0] ps2_key = 0,
+
+	// [24] - toggles with every event
+	output reg [24:0] ps2_mouse = 0,
 
 	// ARM -> FPGA download
+	input             ioctl_ce,
 	output reg        ioctl_download = 0, // signal indicating an active download
 	output reg  [7:0] ioctl_index,        // menu index used to upload the file
-	output            ioctl_wr,
+	output reg        ioctl_wr = 0,
 	output reg [24:0] ioctl_addr,
 	output reg  [7:0] ioctl_dout
 );
 
-reg [7:0] b_data;
-reg [6:0] sbuf;
-reg [7:0] cmd;
-reg [2:0] bit_cnt;    // counts bits 0-7 0-7 ...
-reg [9:0] byte_cnt;   // counts bytes
 reg [7:0] but_sw;
 reg [2:0] stick_idx;
 
-reg    mount_strobe = 0;
+reg [1:0] mount_strobe = 0;
 assign img_mounted  = mount_strobe;
 
 assign buttons = but_sw[1:0];
 assign switches = but_sw[3:2];
-assign scandoubler_disable = but_sw[4];
+assign scandoublerD = but_sw[4];
 assign ypbpr = but_sw[5];
 
-wire [7:0] spi_dout = { sbuf, SPI_DI};
-
 // this variant of user_io is for 8 bit cores (type == a4) only
 wire [7:0] core_type = 8'ha4;
 
 // command byte read by the io controller
-wire [7:0] sd_cmd = { 4'h5, sd_conf, sd_sdhc, sd_wr, sd_rd };
+wire       drive_sel = sd_rd[1] | sd_wr[1];
+wire [7:0] sd_cmd = { 4'h6, sd_conf, sd_sdhc, sd_wr[drive_sel], sd_rd[drive_sel] };
+
+reg [7:0] cmd;
+reg [2:0] bit_cnt;    // counts bits 0-7 0-7 ...
+reg [9:0] byte_cnt;   // counts bytes
 
 reg spi_do;
 assign SPI_DO = CONF_DATA0 ? 1'bZ : spi_do;
 
-wire [7:0] kbd_led = { 2'b01, 4'b0000, ps2_caps_led, 1'b1};
+reg [7:0] spi_data_out;
 
-// drive MISO only when transmitting core id
-always@(negedge SPI_SCK) begin
-	if(!CONF_DATA0) begin
-		// first byte returned is always core type, further bytes are 
-		// command dependent
-      if(byte_cnt == 0) begin
-		  spi_do <= core_type[~bit_cnt];
+// SPI transmitter
+always@(negedge SPI_SCK) spi_do <= spi_data_out[~bit_cnt];
 
-		end else begin
-			case(cmd)
-				// reading config string
-				8'h14: begin
-					// returning a byte from string
-						if(byte_cnt < STRLEN + 1) spi_do <= conf_str[{STRLEN - byte_cnt,~bit_cnt}];
-							else spi_do <= 0;
-					end
-
-				// reading sd card status
-				8'h16: begin
-						if(byte_cnt == 1) spi_do <= sd_cmd[~bit_cnt];
-						else if((byte_cnt >= 2) && (byte_cnt < 6)) spi_do <= sd_lba[{5-byte_cnt, ~bit_cnt}];
-						else spi_do <= 0;
-					end
-
-				// reading sd card write data
-				8'h18:
-						spi_do <= b_data[~bit_cnt];
-
-				// reading keyboard LED status
-				8'h1f:
-						spi_do <= kbd_led[~bit_cnt];
-
-				default:
-						spi_do <= 0;
-			endcase
-		end
-   end
-end
-
-reg b_wr2,b_wr3;
-always @(negedge clk_sys) begin
-	b_wr3      <= b_wr2;
-	sd_buff_wr <= b_wr3;
-end
+reg [7:0] spi_data_in;
+reg       spi_data_ready = 0;
 
 // SPI receiver
 always@(posedge SPI_SCK or posedge CONF_DATA0) begin
+	reg [6:0]  sbuf;
+	reg [31:0] sd_lba_r;
+	reg        drive_sel_r;
 
 	if(CONF_DATA0) begin
-		b_wr2 <= 0;
 	   bit_cnt <= 0;
 	   byte_cnt <= 0;
-		sd_ack <= 0;
-		sd_ack_conf <= 0;
-	end else begin
-		b_wr2 <= 0;
-
-		sbuf <= spi_dout[6:0];
+		spi_data_out <= core_type;
+	end
+	else
+	begin
 		bit_cnt <= bit_cnt + 1'd1;
-		if(bit_cnt == 5) begin
-			if (byte_cnt == 0) sd_buff_addr <= 0;
-			if((byte_cnt != 0) & (sd_buff_addr != 511)) sd_buff_addr <= sd_buff_addr + 1'b1;
-			if((byte_cnt == 1) & ((cmd == 8'h17) | (cmd == 8'h19))) sd_buff_addr <= 0;
-		end
+		sbuf <= {sbuf[5:0], SPI_DI};
 
 		// finished reading command byte
       if(bit_cnt == 7) begin
+			if(!byte_cnt) cmd <= {sbuf, SPI_DI};
+
+			spi_data_in <= {sbuf, SPI_DI};
+			spi_data_ready <= ~spi_data_ready;
 			if(~&byte_cnt) byte_cnt <= byte_cnt + 8'd1;
-			if(byte_cnt == 0) begin
-				cmd <= spi_dout;
-
-				if(spi_dout == 8'h19) begin
-					sd_ack_conf  <= 1;
-					sd_buff_addr <= 0;
-				end
-				if((spi_dout == 8'h17) || (spi_dout == 8'h18)) begin
-					sd_ack       <= 1;
-					sd_buff_addr <= 0;
-				end
-				if(spi_dout == 8'h18) b_data <= sd_buff_din;
-
-				mount_strobe <= 0;
-
-			end else begin
 			
-				case(cmd)
-					// buttons and switches
-					8'h01: but_sw <= spi_dout; 
-					8'h02: joystick_0 <= spi_dout;
-					8'h03: joystick_1 <= spi_dout;
+			spi_data_out <= 0;
+			case({(!byte_cnt) ? {sbuf, SPI_DI} : cmd})
+				// reading config string
+				8'h14: if(byte_cnt < STRLEN) spi_data_out <= conf_str[(STRLEN - byte_cnt - 1)<<3 +:8];
 
-					// store incoming ps2 mouse bytes 
-					8'h04: begin
-							ps2_mouse_fifo[ps2_mouse_wptr] <= spi_dout; 
-							ps2_mouse_wptr <= ps2_mouse_wptr + 1'd1;
-						end
+				// reading sd card status
+				8'h16: if(byte_cnt == 0) begin
+							spi_data_out <= sd_cmd;
+							sd_lba_r <= sd_lba;
+							drive_sel_r <= drive_sel;
+						end else if (byte_cnt == 1) begin
+							spi_data_out <= drive_sel_r;
+						end else if(byte_cnt < 6) spi_data_out <= sd_lba_r[(5-byte_cnt)<<3 +:8];
 
-					// store incoming ps2 keyboard bytes 
-					8'h05: begin
-							ps2_kbd_fifo[ps2_kbd_wptr] <= spi_dout; 
-							ps2_kbd_wptr <= ps2_kbd_wptr + 1'd1;
-						end
-				
-					8'h15: status[7:0] <= spi_dout;
-				
-					// send SD config IO -> FPGA
-					// flag that download begins
-					// sd card knows data is config if sd_dout_strobe is asserted
-					// with sd_ack still being inactive (low)
-					8'h19,
-					// send sector IO -> FPGA
-					// flag that download begins
-					8'h17: begin
-							sd_buff_dout <= spi_dout;
-							b_wr2 <= 1;
-						end
+				// reading sd card write data
+				8'h18: spi_data_out <= sd_buff_din;
+			endcase
+		end
+	end
+end
 
-					8'h18: b_data <= sd_buff_din;
+reg [31:0] ps2_key_raw = 0;
+wire       pressed  = (ps2_key_raw[15:8] != 8'hf0);
+wire       extended = (~pressed ? (ps2_key_raw[23:16] == 8'he0) : (ps2_key_raw[15:8] == 8'he0));
 
-					// joystick analog
-					8'h1a: begin
-							// first byte is joystick index
-							if(byte_cnt == 1) stick_idx <= spi_dout[2:0];
-							else if(byte_cnt == 2) begin
-								// second byte is x axis
-								if(stick_idx == 0) joystick_analog_0[15:8] <= spi_dout;
-									else if(stick_idx == 1) joystick_analog_1[15:8] <= spi_dout;
-							end else if(byte_cnt == 3) begin
-								// third byte is y axis
-								if(stick_idx == 0) joystick_analog_0[7:0] <= spi_dout;
-									else if(stick_idx == 1) joystick_analog_1[7:0] <= spi_dout;
-							end
-						end
+// transfer to clk_sys domain
+always@(posedge clk_sys) begin
+	reg old_ss1, old_ss2;
+	reg old_ready1, old_ready2;
+	reg [2:0] b_wr;
+	reg       got_ps2 = 0;
 
-					// notify image selection
-					8'h1c: mount_strobe <= 1;
+	old_ss1 <= CONF_DATA0;
+	old_ss2 <= old_ss1;
+	old_ready1 <= spi_data_ready;
+	old_ready2 <= old_ready1;
+	
+	sd_buff_wr <= b_wr[0];
+	if(b_wr[2] && (~&sd_buff_addr)) sd_buff_addr <= sd_buff_addr + 1'b1;
+	b_wr <= (b_wr<<1);
 
-					// send image info
-					8'h1d: if(byte_cnt<5) img_size[(byte_cnt-1)<<3 +:8] <= spi_dout;
-
-					// status, 32bit version
-					8'h1e: if(byte_cnt<5) status[(byte_cnt-1)<<3 +:8] <= spi_dout;
-					default: ;
-				endcase
+	if(old_ss2) begin
+		got_ps2      <= 0;
+		sd_ack       <= 0;
+		sd_ack_conf  <= 0;
+		sd_buff_addr <= 0;
+		if(got_ps2) begin
+			if(cmd == 4) ps2_mouse[24] <= ~ps2_mouse[24]; 
+			if(cmd == 5) begin
+				ps2_key <= {~ps2_key[10], pressed, extended, ps2_key_raw[7:0]};
+				if(ps2_key_raw == 'hE012E07C) ps2_key[9:0] <= 'h37C; // prnscr pressed
+				if(ps2_key_raw == 'h7CE0F012) ps2_key[9:0] <= 'h17C; // prnscr released
+				if(ps2_key_raw == 'hF014F077) ps2_key[9:0] <= 'h377; // pause  pressed
 			end
 		end
 	end
+	else
+	if(old_ready2 ^ old_ready1) begin
+
+		if(cmd == 8'h18 && ~&sd_buff_addr) sd_buff_addr <= sd_buff_addr + 1'b1;
+
+		if(byte_cnt < 2) begin
+
+			if (cmd == 8'h19) sd_ack_conf  <= 1;
+			if((cmd == 8'h17) || (cmd == 8'h18)) sd_ack <= 1;
+			mount_strobe <= 0;
+
+			if(cmd == 5) ps2_key_raw <= 0;
+		end else begin
+		
+			case(cmd)
+				// buttons and switches
+				8'h01: but_sw <= spi_data_in; 
+				8'h02: joystick_0 <= spi_data_in;
+				8'h03: joystick_1 <= spi_data_in;
+//				8'h60: if (byte_cnt < 5) joystick_0[(byte_cnt-1)<<3 +:8] <= spi_data_in;
+//				8'h61: if (byte_cnt < 5) joystick_1[(byte_cnt-1)<<3 +:8] <= spi_data_in;
+//				8'h62: if (byte_cnt < 5) joystick_2[(byte_cnt-1)<<3 +:8] <= spi_data_in;
+//				8'h63: if (byte_cnt < 5) joystick_3[(byte_cnt-1)<<3 +:8] <= spi_data_in;
+//				8'h64: if (byte_cnt < 5) joystick_4[(byte_cnt-1)<<3 +:8] <= spi_data_in;
+				// store incoming ps2 mouse bytes 
+				8'h04: begin
+						got_ps2 <= 1;
+						case(byte_cnt)
+							2: ps2_mouse[7:0]   <= spi_data_in;
+							3: ps2_mouse[15:8]  <= spi_data_in;
+							4: ps2_mouse[23:16] <= spi_data_in;
+						endcase 
+						ps2_mouse_fifo[ps2_mouse_wptr] <= spi_data_in; 
+						ps2_mouse_wptr <= ps2_mouse_wptr + 1'd1;
+					end
+
+				// store incoming ps2 keyboard bytes 
+				8'h05: begin
+						got_ps2 <= 1;
+						ps2_key_raw[31:0] <= {ps2_key_raw[23:0], spi_data_in}; 						
+						ps2_kbd_fifo[ps2_kbd_wptr] <= spi_data_in; 
+						ps2_kbd_wptr <= ps2_kbd_wptr + 1'd1;
+					end
+			
+				8'h15: status[7:0] <= spi_data_in;
+			
+				// send SD config IO -> FPGA
+				// flag that download begins
+				// sd card knows data is config if sd_dout_strobe is asserted
+				// with sd_ack still being inactive (low)
+				8'h19,
+				// send sector IO -> FPGA
+				// flag that download begins
+				8'h17: begin
+						sd_buff_dout <= spi_data_in;
+						b_wr <= 1;
+					end
+
+				// joystick analog
+				8'h1a: begin
+						// first byte is joystick index
+						if(byte_cnt == 2) stick_idx <= spi_data_in[2:0];
+						else if(byte_cnt == 3) begin
+							// second byte is x axis
+							if(stick_idx == 0) joystick_analog_0[15:8] <= spi_data_in;
+								else if(stick_idx == 1) joystick_analog_1[15:8] <= spi_data_in;
+						end else if(byte_cnt == 4) begin
+							// third byte is y axis
+							if(stick_idx == 0) joystick_analog_0[7:0] <= spi_data_in;
+								else if(stick_idx == 1) joystick_analog_1[7:0] <= spi_data_in;
+						end
+					end
+
+				// notify image selection
+				8'h1c: mount_strobe[spi_data_in[0]] <= 1;
+
+				// send image info
+				8'h1d: if(byte_cnt<6) img_size[(byte_cnt-2)<<3 +:8] <= spi_data_in;
+
+				// status, 32bit version
+				8'h1e: if(byte_cnt<6) status[(byte_cnt-2)<<3 +:8] <= spi_data_in;
+				default: ;
+			endcase
+		end
+	end
 end
 
 
@@ -422,6 +456,8 @@ localparam UIO_FILE_TX      = 8'h53;
 localparam UIO_FILE_TX_DAT  = 8'h54;
 localparam UIO_FILE_INDEX   = 8'h55;
 
+reg        rdownload = 0;
+
 // data_io has its own SPI interface to the io controller
 always@(posedge SPI_SCK, posedge SPI_SS2) begin
 	reg  [6:0] sbuf;
@@ -431,15 +467,10 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
 
 	if(SPI_SS2) cnt <= 0;
 	else begin
-		rclk <= 0;
-
 		// don't shift in last bit. It is evaluated directly
 		// when writing to ram
 		if(cnt != 15) sbuf <= { sbuf[5:0], SPI_DI};
 
-		// increase target address after write
-		if(rclk) addr <= addr + 1'd1;
-
 		// count 0-7 8-15 8-15 ... 
 		if(cnt < 15) cnt <= cnt + 1'd1;
 			else cnt <= 8;
@@ -451,11 +482,15 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
 		if((cmd == UIO_FILE_TX) && (cnt == 15)) begin
 			// prepare 
 			if(SPI_DI) begin
-				addr <= 0;
-				ioctl_download <= 1; 
+				case(ioctl_index[4:0]) 
+							1: addr <= 25'h200000; // TRD buffer  at 2MB
+							2: addr <= 25'h400000; // tape buffer at 4MB 
+					default: addr <= 25'h150000; // boot rom
+				endcase
+				rdownload <= 1; 
 			end else begin
 				addr_w <= addr;
-				ioctl_download <= 0;
+				rdownload <= 0;
 			end
 		end
 
@@ -463,7 +498,8 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
 		if((cmd == UIO_FILE_TX_DAT) && (cnt == 15)) begin
 			addr_w <= addr;
 			data_w <= {sbuf, SPI_DI};
-			rclk <= 1;
+			addr <= addr + 1'd1;
+			rclk <= ~rclk;
 		end
 
       // expose file (menu) index
@@ -471,21 +507,24 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
 	end
 end
 
-assign ioctl_wr = |ioctl_wrd;
-reg [1:0] ioctl_wrd;
-
-always@(negedge clk_sys) begin
+// transfer to ioctl_clk domain.
+// ioctl_index is set before ioctl_download, so it's stable already
+always@(posedge clk_sys) begin
 	reg        rclkD, rclkD2;
 
-	rclkD    <= rclk;
-	rclkD2   <= rclkD;
-	ioctl_wrd<= {ioctl_wrd[0],1'b0};
+	if(ioctl_ce) begin
+		ioctl_download <= rdownload;
 
-	if(rclkD & ~rclkD2) begin
-		ioctl_dout <= data_w;
-		ioctl_addr <= addr_w;
-		ioctl_wrd  <= 2'b11;
+		rclkD    <= rclk;
+		rclkD2   <= rclkD;
+		ioctl_wr <= 0;
+
+		if(rclkD != rclkD2) begin
+			ioctl_dout <= data_w;
+			ioctl_addr <= addr_w;
+			ioctl_wr   <= 1;
+		end
 	end
 end
 
-endmodule
+endmodule 
\ No newline at end of file
diff --git a/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/osd.v b/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/osd.v
index c62c10af..b9181763 100644
--- a/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/osd.v	
+++ b/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/osd.v	
@@ -11,13 +11,15 @@ module osd (
 	input        SPI_SS3,
 	input        SPI_DI,
 
+	input  [1:0] rotate, //[0] - rotate [1] - left or right
+
 	// VGA signals coming from core
 	input  [5:0] R_in,
 	input  [5:0] G_in,
 	input  [5:0] B_in,
 	input        HSync,
 	input        VSync,
-	
+
 	// VGA signals going to video connector
 	output [5:0] R_out,
 	output [5:0] G_out,
@@ -59,7 +61,7 @@ always@(posedge SPI_SCK, posedge SPI_SS3) begin
 
 		if(cnt == 7) begin
 			cmd <= {sbuf[6:0], SPI_DI};
-      
+
 			// lower three command bits are line address
 			bcnt <= {sbuf[1:0], SPI_DI, 8'h00};
 
@@ -91,7 +93,7 @@ reg  [9:0] vs_low, vs_high;
 wire       vs_pol = vs_high < vs_low;
 wire [9:0] dsp_height = vs_pol ? vs_low : vs_high;
 
-wire doublescan = (dsp_height>350); 
+wire doublescan = (dsp_height>350);
 
 reg ce_pix;
 always @(negedge clk_sys) begin
@@ -124,13 +126,13 @@ always @(posedge clk_sys) begin
 		hsD2 <= hsD;
 
 		// falling edge of HSync
-		if(!hsD && hsD2) begin	
+		if(!hsD && hsD2) begin
 			h_cnt <= 0;
 			hs_high <= h_cnt;
 		end
 
 		// rising edge of HSync
-		else if(hsD && !hsD2) begin	
+		else if(hsD && !hsD2) begin
 			h_cnt <= 0;
 			hs_low <= h_cnt;
 			v_cnt <= v_cnt + 1'd1;
@@ -142,13 +144,13 @@ always @(posedge clk_sys) begin
 		vsD2 <= vsD;
 
 		// falling edge of VSync
-		if(!vsD && vsD2) begin	
+		if(!vsD && vsD2) begin
 			v_cnt <= 0;
 			vs_high <= v_cnt;
 		end
 
 		// rising edge of VSync
-		else if(vsD && !vsD2) begin	
+		else if(vsD && !vsD2) begin
 			v_cnt <= 0;
 			vs_low <= v_cnt;
 		end
@@ -160,17 +162,30 @@ wire [9:0] h_osd_start = ((dsp_width - OSD_WIDTH)>> 1) + OSD_X_OFFSET;
 wire [9:0] h_osd_end   = h_osd_start + OSD_WIDTH;
 wire [9:0] v_osd_start = ((dsp_height- (OSD_HEIGHT<<doublescan))>> 1) + OSD_Y_OFFSET;
 wire [9:0] v_osd_end   = v_osd_start + (OSD_HEIGHT<<doublescan);
-wire [9:0] osd_hcnt    = h_cnt - h_osd_start + 1'd1;  // one pixel offset for osd_byte register
+wire [9:0] osd_hcnt    = h_cnt - h_osd_start;
 wire [9:0] osd_vcnt    = v_cnt - v_osd_start;
+wire [9:0] osd_hcnt_next  = osd_hcnt + 2'd1;  // one pixel offset for osd pixel
+wire [9:0] osd_hcnt_next2 = osd_hcnt + 2'd2;  // two pixel offset for osd byte address register
 
-wire osd_de = osd_enable && 
+wire osd_de = osd_enable &&
               (HSync != hs_pol) && (h_cnt >= h_osd_start) && (h_cnt < h_osd_end) &&
               (VSync != vs_pol) && (v_cnt >= v_osd_start) && (v_cnt < v_osd_end);
 
-reg  [7:0] osd_byte; 
-always @(posedge clk_sys) if(ce_pix) osd_byte <= osd_buffer[{doublescan ? osd_vcnt[7:5] : osd_vcnt[6:4], osd_hcnt[7:0]}];
+reg [10:0] osd_buffer_addr;
+wire [7:0] osd_byte = osd_buffer[osd_buffer_addr];
+reg        osd_pixel;
 
-wire osd_pixel = osd_byte[doublescan ? osd_vcnt[4:2] : osd_vcnt[3:1]];
+always @(posedge clk_sys) begin
+    if(ce_pix) begin
+		osd_buffer_addr <= rotate[0] ? {rotate[1] ? osd_hcnt_next2[7:5] : ~osd_hcnt_next2[7:5],
+		                                rotate[1] ? (doublescan ? ~osd_vcnt[7:0] : ~{osd_vcnt[6:0], 1'b0}) :
+										            (doublescan ?  osd_vcnt[7:0]  : {osd_vcnt[6:0], 1'b0})} :
+		                               {doublescan ? osd_vcnt[7:5] : osd_vcnt[6:4], osd_hcnt_next2[7:0]};
+
+		osd_pixel <= rotate[0]  ? osd_byte[rotate[1] ? osd_hcnt_next[4:2] : ~osd_hcnt_next[4:2]] :
+		                          osd_byte[doublescan ? osd_vcnt[4:2] : osd_vcnt[3:1]];
+	end
+end
 
 assign R_out = !osd_de ? R_in : {osd_pixel, osd_pixel, OSD_COLOR[2], R_in[5:3]};
 assign G_out = !osd_de ? G_in : {osd_pixel, osd_pixel, OSD_COLOR[1], G_in[5:3]};
diff --git a/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/video_mixer.sv b/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/video_mixer.sv
index 04cfd4ba..126ca276 100644
--- a/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/video_mixer.sv	
+++ b/Arcade_MiST/Scramble Hardware/Frogger_MiST/rtl/video_mixer.sv	
@@ -50,7 +50,7 @@ module video_mixer
 	input  [1:0] scanlines,
 
 	// 0 = HVSync 31KHz, 1 = CSync 15KHz
-	input        scandoubler_disable,
+	input        scandoublerD,
 
 	// High quality 2x scaling
 	input        hq2x,
@@ -60,7 +60,7 @@ module video_mixer
 
 	// 0 = 16-240 range. 1 = 0-255 range. (only for YPbPr color space)
 	input        ypbpr_full,
-
+	input  [1:0] rotate, //[0] - rotate [1] - left or right
 	// color
 	input [DWIDTH:0] R,
 	input [DWIDTH:0] G,
@@ -113,9 +113,9 @@ scandoubler #(.LENGTH(LINE_LENGTH), .HALF_DEPTH(HALF_DEPTH)) scandoubler
 	.b_out(B_sd)
 );
 
-wire [DWIDTH:0] rt  = (scandoubler_disable ? R : R_sd);
-wire [DWIDTH:0] gt  = (scandoubler_disable ? G : G_sd);
-wire [DWIDTH:0] bt  = (scandoubler_disable ? B : B_sd);
+wire [DWIDTH:0] rt  = (scandoublerD ? R : R_sd);
+wire [DWIDTH:0] gt  = (scandoublerD ? G : G_sd);
+wire [DWIDTH:0] bt  = (scandoublerD ? B : B_sd);
 
 generate
 	if(HALF_DEPTH) begin
@@ -129,8 +129,8 @@ generate
 	end
 endgenerate
 
-wire       hs = (scandoubler_disable ? HSync : hs_sd);
-wire       vs = (scandoubler_disable ? VSync : vs_sd);
+wire       hs = (scandoublerD ? HSync : hs_sd);
+wire       vs = (scandoublerD ? VSync : vs_sd);
 
 reg scanline = 0;
 always @(posedge clk_sys) begin
@@ -182,6 +182,7 @@ osd #(OSD_X_OFFSET, OSD_Y_OFFSET, OSD_COLOR) osd
 	.B_in(b_out),
 	.HSync(hs),
 	.VSync(vs),
+	.rotate(rotate),
 
 	.R_out(red),
 	.G_out(green),
@@ -236,7 +237,7 @@ wire [7:0] pr = (pr_8[17:8] < 16) ? 8'd16 : (pr_8[17:8] > 240) ? 8'd240 : pr_8[1
 assign VGA_R  = ypbpr ? (ypbpr_full ? yuv_full[pr-8'd16] : pr[7:2]) :   red;
 assign VGA_G  = ypbpr ? (ypbpr_full ? yuv_full[y -8'd16] :  y[7:2]) : green;
 assign VGA_B  = ypbpr ? (ypbpr_full ? yuv_full[pb-8'd16] : pb[7:2]) :  blue;
-assign VGA_VS = (scandoubler_disable | ypbpr) ? 1'b1 : ~vs_sd;
-assign VGA_HS = scandoubler_disable ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
+assign VGA_VS = (scandoublerD | ypbpr) ? 1'b1 : ~vs_sd;
+assign VGA_HS = scandoublerD ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
 
 endmodule
diff --git a/Arcade_MiST/Scramble Hardware/Scramble_MiST/README.txt b/Arcade_MiST/Scramble Hardware/Scramble_MiST/README.txt
index c28042b7..7e3dc221 100644
--- a/Arcade_MiST/Scramble Hardware/Scramble_MiST/README.txt	
+++ b/Arcade_MiST/Scramble Hardware/Scramble_MiST/README.txt	
@@ -8,7 +8,7 @@
 -- Copyright (c) MikeJ - Feb 2007
 ---------------------------------------------------------------------------------
 -- 
--- Only controls are rotated on VGA output.
+-- Only controls and OSD are rotated on Video output.
 -- 
 -- 
 -- Keyboard inputs :
diff --git a/Arcade_MiST/Scramble Hardware/Scramble_MiST/Release/Scramble.rbf b/Arcade_MiST/Scramble Hardware/Scramble_MiST/Release/Scramble.rbf
index 74657581..60acec74 100644
Binary files a/Arcade_MiST/Scramble Hardware/Scramble_MiST/Release/Scramble.rbf and b/Arcade_MiST/Scramble Hardware/Scramble_MiST/Release/Scramble.rbf differ
diff --git a/Arcade_MiST/Scramble Hardware/Scramble_MiST/Scramble.qsf b/Arcade_MiST/Scramble Hardware/Scramble_MiST/Scramble.qsf
index 66a68871..f9ee28c7 100644
--- a/Arcade_MiST/Scramble Hardware/Scramble_MiST/Scramble.qsf	
+++ b/Arcade_MiST/Scramble Hardware/Scramble_MiST/Scramble.qsf	
@@ -118,37 +118,6 @@ set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
 # end ENTITY(Scramble)
 # --------------------
 set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
-set_global_assignment -name VERILOG_FILE rtl/scandoubler.v
-set_global_assignment -name VERILOG_FILE rtl/osd.v
-set_global_assignment -name VERILOG_FILE rtl/keyboard.v
-set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
-set_global_assignment -name VHDL_FILE rtl/dac.vhd
-set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
-set_global_assignment -name VHDL_FILE rtl/cpu/T80sed.vhd
-set_global_assignment -name VHDL_FILE rtl/cpu/T80_Reg.vhd
-set_global_assignment -name VHDL_FILE rtl/cpu/T80_Pack.vhd
-set_global_assignment -name VHDL_FILE rtl/cpu/T80_MCode.vhd
-set_global_assignment -name VHDL_FILE rtl/cpu/T80_ALU.vhd
-set_global_assignment -name VHDL_FILE rtl/cpu/T80.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_2.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_1.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_0.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_PGM.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_OBJ_1.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_OBJ_0.vhd
-set_global_assignment -name VHDL_FILE rtl/ROM/ROM_LUT.vhd
-set_global_assignment -name QIP_FILE rtl/pll.qip
-set_global_assignment -name VHDL_FILE rtl/MULT18X18.vhd
-set_global_assignment -name VHDL_FILE rtl/i82c55.vhd
-set_global_assignment -name VHDL_FILE rtl/dpram.vhd
-set_global_assignment -name VERILOG_FILE rtl/build_id.v
-set_global_assignment -name VHDL_FILE rtl/YM2149_linmix_sep.vhd
-set_global_assignment -name VHDL_FILE rtl/scramble_video.vhd
-set_global_assignment -name VHDL_FILE rtl/scramble_top.vhd
-set_global_assignment -name VHDL_FILE rtl/scramble_audio.vhd
-set_global_assignment -name VHDL_FILE rtl/scramble.vhd
-set_global_assignment -name SYSTEMVERILOG_FILE rtl/ScrambleMist.sv
-set_global_assignment -name VERILOG_FILE rtl/mist_io.v
 set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
 set_global_assignment -name ENABLE_NCE_PIN OFF
 set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
@@ -167,4 +136,34 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
 set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
 set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
 set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
+set_global_assignment -name SYSTEMVERILOG_FILE rtl/ScrambleMist.sv
+set_global_assignment -name VHDL_FILE rtl/scramble.vhd
+set_global_assignment -name VHDL_FILE rtl/scramble_top.vhd
+set_global_assignment -name VHDL_FILE rtl/scramble_video.vhd
+set_global_assignment -name VHDL_FILE rtl/scramble_audio.vhd
+set_global_assignment -name VHDL_FILE rtl/YM2149_linmix_sep.vhd
+set_global_assignment -name VHDL_FILE rtl/MULT18X18.vhd
+set_global_assignment -name VHDL_FILE rtl/i82c55.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80sed.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80_Reg.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80_Pack.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80_MCode.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80_ALU.vhd
+set_global_assignment -name VHDL_FILE rtl/cpu/T80.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_2.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_1.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_SND_0.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_PGM.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_OBJ_1.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_OBJ_0.vhd
+set_global_assignment -name VHDL_FILE rtl/ROM/ROM_LUT.vhd
+set_global_assignment -name QIP_FILE rtl/pll.qip
+set_global_assignment -name VHDL_FILE rtl/dpram.vhd
+set_global_assignment -name VERILOG_FILE rtl/mist_io.v
+set_global_assignment -name VERILOG_FILE rtl/scandoubler.v
+set_global_assignment -name VERILOG_FILE rtl/osd.v
+set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
+set_global_assignment -name VHDL_FILE rtl/dac.vhd
+set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
+set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
diff --git a/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/ScrambleMist.sv b/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/ScrambleMist.sv
index c0b2f69d..eac3b3c0 100644
--- a/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/ScrambleMist.sv	
+++ b/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/ScrambleMist.sv	
@@ -42,37 +42,32 @@ module ScrambleMist
 
 localparam CONF_STR = {
 	"Scramble;;",
-	"O2,Joystick Control,Upright,Normal;",
-	"O34,Scandoubler Fx,None,HQ2x,CRT 25%,CRT 50%;",
+	"O2,Rotate Controls,Off,On;",
+	"O34,Scanlines,Off,25%,50%,75%;",
 	"T6,Reset;",
-	"V,v1.00.",`BUILD_DATE
+	"V,v1.20.",`BUILD_DATE
 };
 
-
-////////////////////   CLOCKS   ///////////////////
+assign LED = 1;
+assign AUDIO_R = AUDIO_L;
 
 wire clk_sys;
 wire pll_locked;
-
-pll pll
-(
+pll pll(
 	.inclk0(CLOCK_27),
 	.areset(0),
 	.c0(clk_sys),
 	.locked(pll_locked)
-);
+	);
 
 reg ce_6p, ce_6n, ce_12, ce_1p79;
 always @(negedge clk_sys) begin
-	reg [1:0] div = 0;
-	reg [3:0] div179 = 0;
-	
+reg [1:0] div = 0;
+reg [3:0] div179 = 0;
 	div <= div + 1'd1;
-
 	ce_12 <= div[0];
 	ce_6p <= div[0] & ~div[1];
-	ce_6n <= div[0] &  div[1];
-	
+	ce_6n <= div[0] &  div[1];	
    ce_1p79 <= 0;
    div179 <= div179 - 1'd1;
    if(!div179) begin
@@ -84,31 +79,45 @@ end
 wire [31:0] status;
 wire  [1:0] buttons;
 wire  [1:0] switches;
-wire  [9:0] kbjoy;
 wire  [7:0] joystick_0;
 wire  [7:0] joystick_1;
-wire        scandoubler_disable;
+wire        scandoublerD;
 wire        ypbpr;
-wire        ps2_kbd_clk, ps2_kbd_data;
+wire [10:0] ps2_key;
 wire [9:0] audio;
-wire hsync,vsync;
-assign LED = 1;
-wire blankn = ~(hblank | vblank);
-wire hblank, vblank;
 wire hs, vs;
+wire blankn = ~(hb | vb);
+wire hb, vb;
 wire [3:0] r,b,g;
 
-video_mixer #(.LINE_LENGTH(640), .HALF_DEPTH(0)) video_mixer
-(
+scramble_top scramble(
+	.O_VIDEO_R(r),
+	.O_VIDEO_G(g),
+	.O_VIDEO_B(b),
+	.O_HSYNC(hs),
+	.O_VSYNC(vs),
+   .O_HBLANK(hb),
+   .O_VBLANK(vb),
+	.O_AUDIO(audio),
+	.button_in(~{btn_two_players, m_fire, btn_coin, btn_one_player, m_right, m_left, m_down, m_up}),
+	.RESET(status[0] | status[6] | buttons[1]),
+	.clk(clk_sys),
+	.ena_12(ce_12),
+	.ena_6(ce_6p),
+	.ena_6b(ce_6n),
+	.ena_1_79(ce_1p79)
+	);
+
+video_mixer video_mixer(
 	.clk_sys(clk_sys),
 	.ce_pix(ce_6p),
 	.ce_pix_actual(ce_6p),
 	.SPI_SCK(SPI_SCK),
 	.SPI_SS3(SPI_SS3),
 	.SPI_DI(SPI_DI),
-	.R({r,r[1:0]}),
-	.G({g,g[1:0]}),
-	.B({b,b[1:0]}),
+	.R(blankn ? {r,r[1:0]} : 0),
+	.G(blankn ? {g,g[1:0]} : 0),
+	.B(blankn ? {b,b[1:0]} : 0),
 	.HSync(hs),
 	.VSync(vs),
 	.VGA_R(VGA_R),
@@ -116,13 +125,14 @@ video_mixer #(.LINE_LENGTH(640), .HALF_DEPTH(0)) video_mixer
 	.VGA_B(VGA_B),
 	.VGA_VS(VGA_VS),
 	.VGA_HS(VGA_HS),
-	.scandoubler_disable(scandoubler_disable),
-	.scanlines(scandoubler_disable ? 2'b00 : {status[4:3] == 3, status[4:3] == 2}),
-	.hq2x(status[4:3]==1),
+	.rotate({1'b1,status[2]}),
+	.scandoublerD(scandoublerD),
+	.scanlines(scandoublerD ? 2'b00 : status[4:3]),
+	.ypbpr(ypbpr),
 	.ypbpr_full(1),
 	.line_start(0),
 	.mono(0)
-);
+	);
 
 mist_io #(.STRLEN(($size(CONF_STR)>>3))) mist_io
 (
@@ -135,66 +145,59 @@ mist_io #(.STRLEN(($size(CONF_STR)>>3))) mist_io
 	.SPI_DI         (SPI_DI         ),
 	.buttons        (buttons        ),
 	.switches   	 (switches       ),
-	.scandoubler_disable(scandoubler_disable),
+	.scandoublerD	 (scandoublerD	  ),
 	.ypbpr          (ypbpr          ),
-	.ps2_kbd_clk    (ps2_kbd_clk    ),
-	.ps2_kbd_data   (ps2_kbd_data   ),
+	.ps2_key			 (ps2_key        ),
 	.joystick_0   	 (joystick_0     ),
 	.joystick_1     (joystick_1     ),
 	.status         (status         )
-);
-
-
-
-keyboard keyboard(
-	.clk(clk_sys),
-	.reset(),
-	.ps2_kbd_clk(ps2_kbd_clk),
-	.ps2_kbd_data(ps2_kbd_data),
-	.joystick(kbjoy)
 	);
-	
-wire m_up     = status[2] ? kbjoy[6] | joystick_0[1] | joystick_1[1] : kbjoy[4] | joystick_0[3] | joystick_1[3];
-wire m_down   = status[2] ? kbjoy[7] | joystick_0[0] | joystick_1[0] : kbjoy[5] | joystick_0[2] | joystick_1[2];
-wire m_left   = status[2] ? kbjoy[5] | joystick_0[2] | joystick_1[2] : kbjoy[6] | joystick_0[1] | joystick_1[1];
-wire m_right  = status[2] ? kbjoy[4] | joystick_0[3] | joystick_1[3] : kbjoy[7] | joystick_0[0] | joystick_1[0];
 
-wire m_fire   = kbjoy[0] | joystick_0[4] | joystick_1[4];
-wire m_start1 = kbjoy[1];
-wire m_start2 = kbjoy[2];
-wire m_coin   = kbjoy[3];
-wire m_bomb   = kbjoy[8];
-wire m_Serv   = kbjoy[9];
-
-scramble_top scramble
-(
-	.O_VIDEO_R(r),
-	.O_VIDEO_G(g),
-	.O_VIDEO_B(b),
-	.O_HSYNC(hs),
-	.O_VSYNC(vs),
-   .O_HBLANK(hblank),
-   .O_VBLANK(vblank),
-
-	.O_AUDIO(audio),
-
-	.button_in(~{m_start2, m_fire, m_coin, m_start1, m_right, m_left, m_down, m_up}),
-	.RESET(status[0] | status[6] | buttons[1]),
-	.clk(clk_sys),
-	.ena_12(ce_12),
-	.ena_6(ce_6p),
-	.ena_6b(ce_6n),
-	.ena_1_79(ce_1p79)
-);
-dac dac
-(
+dac dac(
 	.clk_i(clk_sys),
 	.res_n_i(1),
 	.dac_i(audio),
 	.dac_o(AUDIO_L)
 	);
+//											Rotated														Normal
+wire m_up     = ~status[2] ? btn_left | joystick_0[1] | joystick_1[1] : btn_up | joystick_0[3] | joystick_1[3];
+wire m_down   = ~status[2] ? btn_right | joystick_0[0] | joystick_1[0] : btn_down | joystick_0[2] | joystick_1[2];
+wire m_left   = ~status[2] ? btn_down | joystick_0[2] | joystick_1[2] : btn_left | joystick_0[1] | joystick_1[1];
+wire m_right  = ~status[2] ? btn_up | joystick_0[3] | joystick_1[3] : btn_right | joystick_0[0] | joystick_1[0];
 
-assign AUDIO_R = AUDIO_L;
+wire m_fire   = btn_fire1 | joystick_0[4] | joystick_1[4];
+wire m_bomb   = btn_fire2 | joystick_0[5] | joystick_1[5];
 
+reg btn_one_player = 0;
+reg btn_two_players = 0;
+reg btn_left = 0;
+reg btn_right = 0;
+reg btn_down = 0;
+reg btn_up = 0;
+reg btn_fire1 = 0;
+reg btn_fire2 = 0;
+reg btn_fire3 = 0;
+reg btn_coin  = 0;
+wire       pressed = ps2_key[9];
+wire [7:0] code    = ps2_key[7:0];	
 
-endmodule
+always @(posedge clk_sys) begin
+	reg old_state;
+	old_state <= ps2_key[10];
+	if(old_state != ps2_key[10]) begin
+		case(code)
+			'h75: btn_up         	<= pressed; // up
+			'h72: btn_down        	<= pressed; // down
+			'h6B: btn_left      		<= pressed; // left
+			'h74: btn_right       	<= pressed; // right
+			'h76: btn_coin				<= pressed; // ESC
+			'h05: btn_one_player   	<= pressed; // F1
+			'h06: btn_two_players  	<= pressed; // F2
+			'h14: btn_fire3 			<= pressed; // ctrl
+			'h11: btn_fire2 			<= pressed; // alt
+			'h29: btn_fire1   		<= pressed; // Space
+		endcase
+	end
+end
+
+endmodule 
\ No newline at end of file
diff --git a/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/build_id.v b/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/build_id.v
index fe075b4c..b82e88e6 100644
--- a/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/build_id.v	
+++ b/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/build_id.v	
@@ -1,2 +1,2 @@
-`define BUILD_DATE "171120"
-`define BUILD_TIME "153907"
+`define BUILD_DATE "190308"
+`define BUILD_TIME "174721"
diff --git a/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/keyboard.v b/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/keyboard.v
deleted file mode 100644
index c2b7b86e..00000000
--- a/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/keyboard.v	
+++ /dev/null
@@ -1,82 +0,0 @@
-
-
-module keyboard
-(
-	input  clk,
-	input  reset,
-	input  ps2_kbd_clk,
-	input  ps2_kbd_data,
-
-	output reg[9:0] joystick
-);
-
-reg [11:0] shift_reg = 12'hFFF;
-wire[11:0] kdata = {ps2_kbd_data,shift_reg[11:1]};
-wire [7:0] kcode = kdata[9:2];
-reg        release_btn = 0;
-
-reg  [7:0] code;
-reg        input_strobe = 0;
-
-always @(negedge clk) begin
-	reg old_reset = 0;
-
-	old_reset <= reset;
-
-	if(~old_reset & reset)begin
-		joystick <= 0;
-	end
-
-	if(input_strobe) begin
-		case(code)
-			'h16: joystick[1] <= ~release_btn; // 1
-			'h1E: joystick[2] <= ~release_btn; // 2
-
-			'h75: joystick[4] <= ~release_btn; // arrow up
-			'h72: joystick[5] <= ~release_btn; // arrow down
-			'h6B: joystick[6] <= ~release_btn; // arrow left
-			'h74: joystick[7] <= ~release_btn; // arrow right
-
-			'h29: joystick[0] <= ~release_btn; // Space
-			'h11: joystick[8] <= ~release_btn; // Left Alt
-			'h0d: joystick[9] <= ~release_btn; // Tab
-			'h76: joystick[3] <= ~release_btn; // Escape
-		endcase
-	end
-end
-
-always @(posedge clk) begin
-	reg [3:0] prev_clk  = 0;
-	reg       old_reset = 0;
-	reg       action = 0;
-
-	old_reset <= reset;
-	input_strobe <= 0;
-
-	if(~old_reset & reset)begin
-		prev_clk  <= 0;
-		shift_reg <= 12'hFFF;
-	end else begin
-		prev_clk <= {ps2_kbd_clk,prev_clk[3:1]};
-		if(prev_clk == 1) begin
-			if (kdata[11] & ^kdata[10:2] & ~kdata[1] & kdata[0]) begin
-				shift_reg <= 12'hFFF;
-				if (kcode == 8'he0) ;
-				// Extended key code follows
-				else if (kcode == 8'hf0)
-					// Release code follows
-					action <= 1;
-				else begin
-					// Cancel extended/release flags for next time
-					action <= 0;
-					release_btn <= action;
-					code <= kcode;
-					input_strobe <= 1;
-				end
-			end else begin
-				shift_reg <= kdata;
-			end
-		end
-	end
-end
-endmodule
diff --git a/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/mist_io.v b/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/mist_io.v
index ad233a3b..2f41221f 100644
--- a/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/mist_io.v	
+++ b/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/mist_io.v	
@@ -5,6 +5,7 @@
 // http://code.google.com/p/mist-board/
 //
 // Copyright (c) 2014 Till Harbaum <till@harbaum.org>
+// Copyright (c) 2015-2017 Sorgelig
 //
 // This source file is free software: you can redistribute it and/or modify
 // it under the terms of the GNU General Public License as published
@@ -47,13 +48,16 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
 	output            SPI_DO,
 	input             SPI_DI,
 
-	output reg  [7:0] joystick_0,
-	output reg  [7:0] joystick_1,
+	output reg [7:0] joystick_0,
+	output reg [7:0] joystick_1,
+//	output reg [31:0] joystick_2,
+//	output reg [31:0] joystick_3,
+//	output reg [31:0] joystick_4,
 	output reg [15:0] joystick_analog_0,
 	output reg [15:0] joystick_analog_1,
 	output      [1:0] buttons,
 	output      [1:0] switches,
-	output            scandoubler_disable,
+	output            scandoublerD,
 	output            ypbpr,
 
 	output reg [31:0] status,
@@ -61,13 +65,13 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
 	// SD config
 	input             sd_conf,
 	input             sd_sdhc,
-	output            img_mounted, // signaling that new image has been mounted
+	output      [1:0] img_mounted, // signaling that new image has been mounted
 	output reg [31:0] img_size,    // size of image in bytes
 
 	// SD block level access
 	input      [31:0] sd_lba,
-	input             sd_rd,
-	input             sd_wr,
+	input       [1:0] sd_rd,
+	input       [1:0] sd_wr,
 	output reg        sd_ack,
 	output reg        sd_ack_conf,
 
@@ -82,192 +86,222 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
 	output reg        ps2_kbd_data,
 	output            ps2_mouse_clk,
 	output reg        ps2_mouse_data,
-	input             ps2_caps_led,
+
+	// ps2 alternative interface. 
+
+	// [8] - extended, [9] - pressed, [10] - toggles with every press/release
+	output reg [10:0] ps2_key = 0,
+
+	// [24] - toggles with every event
+	output reg [24:0] ps2_mouse = 0,
 
 	// ARM -> FPGA download
+	input             ioctl_ce,
 	output reg        ioctl_download = 0, // signal indicating an active download
 	output reg  [7:0] ioctl_index,        // menu index used to upload the file
-	output            ioctl_wr,
+	output reg        ioctl_wr = 0,
 	output reg [24:0] ioctl_addr,
 	output reg  [7:0] ioctl_dout
 );
 
-reg [7:0] b_data;
-reg [6:0] sbuf;
-reg [7:0] cmd;
-reg [2:0] bit_cnt;    // counts bits 0-7 0-7 ...
-reg [9:0] byte_cnt;   // counts bytes
 reg [7:0] but_sw;
 reg [2:0] stick_idx;
 
-reg    mount_strobe = 0;
+reg [1:0] mount_strobe = 0;
 assign img_mounted  = mount_strobe;
 
 assign buttons = but_sw[1:0];
 assign switches = but_sw[3:2];
-assign scandoubler_disable = but_sw[4];
+assign scandoublerD = but_sw[4];
 assign ypbpr = but_sw[5];
 
-wire [7:0] spi_dout = { sbuf, SPI_DI};
-
 // this variant of user_io is for 8 bit cores (type == a4) only
 wire [7:0] core_type = 8'ha4;
 
 // command byte read by the io controller
-wire [7:0] sd_cmd = { 4'h5, sd_conf, sd_sdhc, sd_wr, sd_rd };
+wire       drive_sel = sd_rd[1] | sd_wr[1];
+wire [7:0] sd_cmd = { 4'h6, sd_conf, sd_sdhc, sd_wr[drive_sel], sd_rd[drive_sel] };
+
+reg [7:0] cmd;
+reg [2:0] bit_cnt;    // counts bits 0-7 0-7 ...
+reg [9:0] byte_cnt;   // counts bytes
 
 reg spi_do;
 assign SPI_DO = CONF_DATA0 ? 1'bZ : spi_do;
 
-wire [7:0] kbd_led = { 2'b01, 4'b0000, ps2_caps_led, 1'b1};
+reg [7:0] spi_data_out;
 
-// drive MISO only when transmitting core id
-always@(negedge SPI_SCK) begin
-	if(!CONF_DATA0) begin
-		// first byte returned is always core type, further bytes are 
-		// command dependent
-      if(byte_cnt == 0) begin
-		  spi_do <= core_type[~bit_cnt];
+// SPI transmitter
+always@(negedge SPI_SCK) spi_do <= spi_data_out[~bit_cnt];
 
-		end else begin
-			case(cmd)
-				// reading config string
-				8'h14: begin
-					// returning a byte from string
-						if(byte_cnt < STRLEN + 1) spi_do <= conf_str[{STRLEN - byte_cnt,~bit_cnt}];
-							else spi_do <= 0;
-					end
-
-				// reading sd card status
-				8'h16: begin
-						if(byte_cnt == 1) spi_do <= sd_cmd[~bit_cnt];
-						else if((byte_cnt >= 2) && (byte_cnt < 6)) spi_do <= sd_lba[{5-byte_cnt, ~bit_cnt}];
-						else spi_do <= 0;
-					end
-
-				// reading sd card write data
-				8'h18:
-						spi_do <= b_data[~bit_cnt];
-
-				// reading keyboard LED status
-				8'h1f:
-						spi_do <= kbd_led[~bit_cnt];
-
-				default:
-						spi_do <= 0;
-			endcase
-		end
-   end
-end
-
-reg b_wr2,b_wr3;
-always @(negedge clk_sys) begin
-	b_wr3      <= b_wr2;
-	sd_buff_wr <= b_wr3;
-end
+reg [7:0] spi_data_in;
+reg       spi_data_ready = 0;
 
 // SPI receiver
 always@(posedge SPI_SCK or posedge CONF_DATA0) begin
+	reg [6:0]  sbuf;
+	reg [31:0] sd_lba_r;
+	reg        drive_sel_r;
 
 	if(CONF_DATA0) begin
-		b_wr2 <= 0;
 	   bit_cnt <= 0;
 	   byte_cnt <= 0;
-		sd_ack <= 0;
-		sd_ack_conf <= 0;
-	end else begin
-		b_wr2 <= 0;
-
-		sbuf <= spi_dout[6:0];
+		spi_data_out <= core_type;
+	end
+	else
+	begin
 		bit_cnt <= bit_cnt + 1'd1;
-		if(bit_cnt == 5) begin
-			if (byte_cnt == 0) sd_buff_addr <= 0;
-			if((byte_cnt != 0) & (sd_buff_addr != 511)) sd_buff_addr <= sd_buff_addr + 1'b1;
-			if((byte_cnt == 1) & ((cmd == 8'h17) | (cmd == 8'h19))) sd_buff_addr <= 0;
-		end
+		sbuf <= {sbuf[5:0], SPI_DI};
 
 		// finished reading command byte
       if(bit_cnt == 7) begin
+			if(!byte_cnt) cmd <= {sbuf, SPI_DI};
+
+			spi_data_in <= {sbuf, SPI_DI};
+			spi_data_ready <= ~spi_data_ready;
 			if(~&byte_cnt) byte_cnt <= byte_cnt + 8'd1;
-			if(byte_cnt == 0) begin
-				cmd <= spi_dout;
-
-				if(spi_dout == 8'h19) begin
-					sd_ack_conf  <= 1;
-					sd_buff_addr <= 0;
-				end
-				if((spi_dout == 8'h17) || (spi_dout == 8'h18)) begin
-					sd_ack       <= 1;
-					sd_buff_addr <= 0;
-				end
-				if(spi_dout == 8'h18) b_data <= sd_buff_din;
-
-				mount_strobe <= 0;
-
-			end else begin
 			
-				case(cmd)
-					// buttons and switches
-					8'h01: but_sw <= spi_dout; 
-					8'h02: joystick_0 <= spi_dout;
-					8'h03: joystick_1 <= spi_dout;
+			spi_data_out <= 0;
+			case({(!byte_cnt) ? {sbuf, SPI_DI} : cmd})
+				// reading config string
+				8'h14: if(byte_cnt < STRLEN) spi_data_out <= conf_str[(STRLEN - byte_cnt - 1)<<3 +:8];
 
-					// store incoming ps2 mouse bytes 
-					8'h04: begin
-							ps2_mouse_fifo[ps2_mouse_wptr] <= spi_dout; 
-							ps2_mouse_wptr <= ps2_mouse_wptr + 1'd1;
-						end
+				// reading sd card status
+				8'h16: if(byte_cnt == 0) begin
+							spi_data_out <= sd_cmd;
+							sd_lba_r <= sd_lba;
+							drive_sel_r <= drive_sel;
+						end else if (byte_cnt == 1) begin
+							spi_data_out <= drive_sel_r;
+						end else if(byte_cnt < 6) spi_data_out <= sd_lba_r[(5-byte_cnt)<<3 +:8];
 
-					// store incoming ps2 keyboard bytes 
-					8'h05: begin
-							ps2_kbd_fifo[ps2_kbd_wptr] <= spi_dout; 
-							ps2_kbd_wptr <= ps2_kbd_wptr + 1'd1;
-						end
-				
-					8'h15: status[7:0] <= spi_dout;
-				
-					// send SD config IO -> FPGA
-					// flag that download begins
-					// sd card knows data is config if sd_dout_strobe is asserted
-					// with sd_ack still being inactive (low)
-					8'h19,
-					// send sector IO -> FPGA
-					// flag that download begins
-					8'h17: begin
-							sd_buff_dout <= spi_dout;
-							b_wr2 <= 1;
-						end
+				// reading sd card write data
+				8'h18: spi_data_out <= sd_buff_din;
+			endcase
+		end
+	end
+end
 
-					8'h18: b_data <= sd_buff_din;
+reg [31:0] ps2_key_raw = 0;
+wire       pressed  = (ps2_key_raw[15:8] != 8'hf0);
+wire       extended = (~pressed ? (ps2_key_raw[23:16] == 8'he0) : (ps2_key_raw[15:8] == 8'he0));
 
-					// joystick analog
-					8'h1a: begin
-							// first byte is joystick index
-							if(byte_cnt == 1) stick_idx <= spi_dout[2:0];
-							else if(byte_cnt == 2) begin
-								// second byte is x axis
-								if(stick_idx == 0) joystick_analog_0[15:8] <= spi_dout;
-									else if(stick_idx == 1) joystick_analog_1[15:8] <= spi_dout;
-							end else if(byte_cnt == 3) begin
-								// third byte is y axis
-								if(stick_idx == 0) joystick_analog_0[7:0] <= spi_dout;
-									else if(stick_idx == 1) joystick_analog_1[7:0] <= spi_dout;
-							end
-						end
+// transfer to clk_sys domain
+always@(posedge clk_sys) begin
+	reg old_ss1, old_ss2;
+	reg old_ready1, old_ready2;
+	reg [2:0] b_wr;
+	reg       got_ps2 = 0;
 
-					// notify image selection
-					8'h1c: mount_strobe <= 1;
+	old_ss1 <= CONF_DATA0;
+	old_ss2 <= old_ss1;
+	old_ready1 <= spi_data_ready;
+	old_ready2 <= old_ready1;
+	
+	sd_buff_wr <= b_wr[0];
+	if(b_wr[2] && (~&sd_buff_addr)) sd_buff_addr <= sd_buff_addr + 1'b1;
+	b_wr <= (b_wr<<1);
 
-					// send image info
-					8'h1d: if(byte_cnt<5) img_size[(byte_cnt-1)<<3 +:8] <= spi_dout;
-
-					// status, 32bit version
-					8'h1e: if(byte_cnt<5) status[(byte_cnt-1)<<3 +:8] <= spi_dout;
-					default: ;
-				endcase
+	if(old_ss2) begin
+		got_ps2      <= 0;
+		sd_ack       <= 0;
+		sd_ack_conf  <= 0;
+		sd_buff_addr <= 0;
+		if(got_ps2) begin
+			if(cmd == 4) ps2_mouse[24] <= ~ps2_mouse[24]; 
+			if(cmd == 5) begin
+				ps2_key <= {~ps2_key[10], pressed, extended, ps2_key_raw[7:0]};
+				if(ps2_key_raw == 'hE012E07C) ps2_key[9:0] <= 'h37C; // prnscr pressed
+				if(ps2_key_raw == 'h7CE0F012) ps2_key[9:0] <= 'h17C; // prnscr released
+				if(ps2_key_raw == 'hF014F077) ps2_key[9:0] <= 'h377; // pause  pressed
 			end
 		end
 	end
+	else
+	if(old_ready2 ^ old_ready1) begin
+
+		if(cmd == 8'h18 && ~&sd_buff_addr) sd_buff_addr <= sd_buff_addr + 1'b1;
+
+		if(byte_cnt < 2) begin
+
+			if (cmd == 8'h19) sd_ack_conf  <= 1;
+			if((cmd == 8'h17) || (cmd == 8'h18)) sd_ack <= 1;
+			mount_strobe <= 0;
+
+			if(cmd == 5) ps2_key_raw <= 0;
+		end else begin
+		
+			case(cmd)
+				// buttons and switches
+				8'h01: but_sw <= spi_data_in; 
+				8'h02: joystick_0 <= spi_data_in;
+				8'h03: joystick_1 <= spi_data_in;
+//				8'h60: if (byte_cnt < 5) joystick_0[(byte_cnt-1)<<3 +:8] <= spi_data_in;
+//				8'h61: if (byte_cnt < 5) joystick_1[(byte_cnt-1)<<3 +:8] <= spi_data_in;
+//				8'h62: if (byte_cnt < 5) joystick_2[(byte_cnt-1)<<3 +:8] <= spi_data_in;
+//				8'h63: if (byte_cnt < 5) joystick_3[(byte_cnt-1)<<3 +:8] <= spi_data_in;
+//				8'h64: if (byte_cnt < 5) joystick_4[(byte_cnt-1)<<3 +:8] <= spi_data_in;
+				// store incoming ps2 mouse bytes 
+				8'h04: begin
+						got_ps2 <= 1;
+						case(byte_cnt)
+							2: ps2_mouse[7:0]   <= spi_data_in;
+							3: ps2_mouse[15:8]  <= spi_data_in;
+							4: ps2_mouse[23:16] <= spi_data_in;
+						endcase 
+						ps2_mouse_fifo[ps2_mouse_wptr] <= spi_data_in; 
+						ps2_mouse_wptr <= ps2_mouse_wptr + 1'd1;
+					end
+
+				// store incoming ps2 keyboard bytes 
+				8'h05: begin
+						got_ps2 <= 1;
+						ps2_key_raw[31:0] <= {ps2_key_raw[23:0], spi_data_in}; 						
+						ps2_kbd_fifo[ps2_kbd_wptr] <= spi_data_in; 
+						ps2_kbd_wptr <= ps2_kbd_wptr + 1'd1;
+					end
+			
+				8'h15: status[7:0] <= spi_data_in;
+			
+				// send SD config IO -> FPGA
+				// flag that download begins
+				// sd card knows data is config if sd_dout_strobe is asserted
+				// with sd_ack still being inactive (low)
+				8'h19,
+				// send sector IO -> FPGA
+				// flag that download begins
+				8'h17: begin
+						sd_buff_dout <= spi_data_in;
+						b_wr <= 1;
+					end
+
+				// joystick analog
+				8'h1a: begin
+						// first byte is joystick index
+						if(byte_cnt == 2) stick_idx <= spi_data_in[2:0];
+						else if(byte_cnt == 3) begin
+							// second byte is x axis
+							if(stick_idx == 0) joystick_analog_0[15:8] <= spi_data_in;
+								else if(stick_idx == 1) joystick_analog_1[15:8] <= spi_data_in;
+						end else if(byte_cnt == 4) begin
+							// third byte is y axis
+							if(stick_idx == 0) joystick_analog_0[7:0] <= spi_data_in;
+								else if(stick_idx == 1) joystick_analog_1[7:0] <= spi_data_in;
+						end
+					end
+
+				// notify image selection
+				8'h1c: mount_strobe[spi_data_in[0]] <= 1;
+
+				// send image info
+				8'h1d: if(byte_cnt<6) img_size[(byte_cnt-2)<<3 +:8] <= spi_data_in;
+
+				// status, 32bit version
+				8'h1e: if(byte_cnt<6) status[(byte_cnt-2)<<3 +:8] <= spi_data_in;
+				default: ;
+			endcase
+		end
+	end
 end
 
 
@@ -422,6 +456,8 @@ localparam UIO_FILE_TX      = 8'h53;
 localparam UIO_FILE_TX_DAT  = 8'h54;
 localparam UIO_FILE_INDEX   = 8'h55;
 
+reg        rdownload = 0;
+
 // data_io has its own SPI interface to the io controller
 always@(posedge SPI_SCK, posedge SPI_SS2) begin
 	reg  [6:0] sbuf;
@@ -431,15 +467,10 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
 
 	if(SPI_SS2) cnt <= 0;
 	else begin
-		rclk <= 0;
-
 		// don't shift in last bit. It is evaluated directly
 		// when writing to ram
 		if(cnt != 15) sbuf <= { sbuf[5:0], SPI_DI};
 
-		// increase target address after write
-		if(rclk) addr <= addr + 1'd1;
-
 		// count 0-7 8-15 8-15 ... 
 		if(cnt < 15) cnt <= cnt + 1'd1;
 			else cnt <= 8;
@@ -451,11 +482,15 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
 		if((cmd == UIO_FILE_TX) && (cnt == 15)) begin
 			// prepare 
 			if(SPI_DI) begin
-				addr <= 0;
-				ioctl_download <= 1; 
+				case(ioctl_index[4:0]) 
+							1: addr <= 25'h200000; // TRD buffer  at 2MB
+							2: addr <= 25'h400000; // tape buffer at 4MB 
+					default: addr <= 25'h150000; // boot rom
+				endcase
+				rdownload <= 1; 
 			end else begin
 				addr_w <= addr;
-				ioctl_download <= 0;
+				rdownload <= 0;
 			end
 		end
 
@@ -463,7 +498,8 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
 		if((cmd == UIO_FILE_TX_DAT) && (cnt == 15)) begin
 			addr_w <= addr;
 			data_w <= {sbuf, SPI_DI};
-			rclk <= 1;
+			addr <= addr + 1'd1;
+			rclk <= ~rclk;
 		end
 
       // expose file (menu) index
@@ -471,21 +507,24 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
 	end
 end
 
-assign ioctl_wr = |ioctl_wrd;
-reg [1:0] ioctl_wrd;
-
-always@(negedge clk_sys) begin
+// transfer to ioctl_clk domain.
+// ioctl_index is set before ioctl_download, so it's stable already
+always@(posedge clk_sys) begin
 	reg        rclkD, rclkD2;
 
-	rclkD    <= rclk;
-	rclkD2   <= rclkD;
-	ioctl_wrd<= {ioctl_wrd[0],1'b0};
+	if(ioctl_ce) begin
+		ioctl_download <= rdownload;
 
-	if(rclkD & ~rclkD2) begin
-		ioctl_dout <= data_w;
-		ioctl_addr <= addr_w;
-		ioctl_wrd  <= 2'b11;
+		rclkD    <= rclk;
+		rclkD2   <= rclkD;
+		ioctl_wr <= 0;
+
+		if(rclkD != rclkD2) begin
+			ioctl_dout <= data_w;
+			ioctl_addr <= addr_w;
+			ioctl_wr   <= 1;
+		end
 	end
 end
 
-endmodule
+endmodule 
\ No newline at end of file
diff --git a/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/osd.v b/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/osd.v
index c62c10af..b9181763 100644
--- a/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/osd.v	
+++ b/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/osd.v	
@@ -11,13 +11,15 @@ module osd (
 	input        SPI_SS3,
 	input        SPI_DI,
 
+	input  [1:0] rotate, //[0] - rotate [1] - left or right
+
 	// VGA signals coming from core
 	input  [5:0] R_in,
 	input  [5:0] G_in,
 	input  [5:0] B_in,
 	input        HSync,
 	input        VSync,
-	
+
 	// VGA signals going to video connector
 	output [5:0] R_out,
 	output [5:0] G_out,
@@ -59,7 +61,7 @@ always@(posedge SPI_SCK, posedge SPI_SS3) begin
 
 		if(cnt == 7) begin
 			cmd <= {sbuf[6:0], SPI_DI};
-      
+
 			// lower three command bits are line address
 			bcnt <= {sbuf[1:0], SPI_DI, 8'h00};
 
@@ -91,7 +93,7 @@ reg  [9:0] vs_low, vs_high;
 wire       vs_pol = vs_high < vs_low;
 wire [9:0] dsp_height = vs_pol ? vs_low : vs_high;
 
-wire doublescan = (dsp_height>350); 
+wire doublescan = (dsp_height>350);
 
 reg ce_pix;
 always @(negedge clk_sys) begin
@@ -124,13 +126,13 @@ always @(posedge clk_sys) begin
 		hsD2 <= hsD;
 
 		// falling edge of HSync
-		if(!hsD && hsD2) begin	
+		if(!hsD && hsD2) begin
 			h_cnt <= 0;
 			hs_high <= h_cnt;
 		end
 
 		// rising edge of HSync
-		else if(hsD && !hsD2) begin	
+		else if(hsD && !hsD2) begin
 			h_cnt <= 0;
 			hs_low <= h_cnt;
 			v_cnt <= v_cnt + 1'd1;
@@ -142,13 +144,13 @@ always @(posedge clk_sys) begin
 		vsD2 <= vsD;
 
 		// falling edge of VSync
-		if(!vsD && vsD2) begin	
+		if(!vsD && vsD2) begin
 			v_cnt <= 0;
 			vs_high <= v_cnt;
 		end
 
 		// rising edge of VSync
-		else if(vsD && !vsD2) begin	
+		else if(vsD && !vsD2) begin
 			v_cnt <= 0;
 			vs_low <= v_cnt;
 		end
@@ -160,17 +162,30 @@ wire [9:0] h_osd_start = ((dsp_width - OSD_WIDTH)>> 1) + OSD_X_OFFSET;
 wire [9:0] h_osd_end   = h_osd_start + OSD_WIDTH;
 wire [9:0] v_osd_start = ((dsp_height- (OSD_HEIGHT<<doublescan))>> 1) + OSD_Y_OFFSET;
 wire [9:0] v_osd_end   = v_osd_start + (OSD_HEIGHT<<doublescan);
-wire [9:0] osd_hcnt    = h_cnt - h_osd_start + 1'd1;  // one pixel offset for osd_byte register
+wire [9:0] osd_hcnt    = h_cnt - h_osd_start;
 wire [9:0] osd_vcnt    = v_cnt - v_osd_start;
+wire [9:0] osd_hcnt_next  = osd_hcnt + 2'd1;  // one pixel offset for osd pixel
+wire [9:0] osd_hcnt_next2 = osd_hcnt + 2'd2;  // two pixel offset for osd byte address register
 
-wire osd_de = osd_enable && 
+wire osd_de = osd_enable &&
               (HSync != hs_pol) && (h_cnt >= h_osd_start) && (h_cnt < h_osd_end) &&
               (VSync != vs_pol) && (v_cnt >= v_osd_start) && (v_cnt < v_osd_end);
 
-reg  [7:0] osd_byte; 
-always @(posedge clk_sys) if(ce_pix) osd_byte <= osd_buffer[{doublescan ? osd_vcnt[7:5] : osd_vcnt[6:4], osd_hcnt[7:0]}];
+reg [10:0] osd_buffer_addr;
+wire [7:0] osd_byte = osd_buffer[osd_buffer_addr];
+reg        osd_pixel;
 
-wire osd_pixel = osd_byte[doublescan ? osd_vcnt[4:2] : osd_vcnt[3:1]];
+always @(posedge clk_sys) begin
+    if(ce_pix) begin
+		osd_buffer_addr <= rotate[0] ? {rotate[1] ? osd_hcnt_next2[7:5] : ~osd_hcnt_next2[7:5],
+		                                rotate[1] ? (doublescan ? ~osd_vcnt[7:0] : ~{osd_vcnt[6:0], 1'b0}) :
+										            (doublescan ?  osd_vcnt[7:0]  : {osd_vcnt[6:0], 1'b0})} :
+		                               {doublescan ? osd_vcnt[7:5] : osd_vcnt[6:4], osd_hcnt_next2[7:0]};
+
+		osd_pixel <= rotate[0]  ? osd_byte[rotate[1] ? osd_hcnt_next[4:2] : ~osd_hcnt_next[4:2]] :
+		                          osd_byte[doublescan ? osd_vcnt[4:2] : osd_vcnt[3:1]];
+	end
+end
 
 assign R_out = !osd_de ? R_in : {osd_pixel, osd_pixel, OSD_COLOR[2], R_in[5:3]};
 assign G_out = !osd_de ? G_in : {osd_pixel, osd_pixel, OSD_COLOR[1], G_in[5:3]};
diff --git a/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/video_mixer.sv b/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/video_mixer.sv
index 04cfd4ba..126ca276 100644
--- a/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/video_mixer.sv	
+++ b/Arcade_MiST/Scramble Hardware/Scramble_MiST/rtl/video_mixer.sv	
@@ -50,7 +50,7 @@ module video_mixer
 	input  [1:0] scanlines,
 
 	// 0 = HVSync 31KHz, 1 = CSync 15KHz
-	input        scandoubler_disable,
+	input        scandoublerD,
 
 	// High quality 2x scaling
 	input        hq2x,
@@ -60,7 +60,7 @@ module video_mixer
 
 	// 0 = 16-240 range. 1 = 0-255 range. (only for YPbPr color space)
 	input        ypbpr_full,
-
+	input  [1:0] rotate, //[0] - rotate [1] - left or right
 	// color
 	input [DWIDTH:0] R,
 	input [DWIDTH:0] G,
@@ -113,9 +113,9 @@ scandoubler #(.LENGTH(LINE_LENGTH), .HALF_DEPTH(HALF_DEPTH)) scandoubler
 	.b_out(B_sd)
 );
 
-wire [DWIDTH:0] rt  = (scandoubler_disable ? R : R_sd);
-wire [DWIDTH:0] gt  = (scandoubler_disable ? G : G_sd);
-wire [DWIDTH:0] bt  = (scandoubler_disable ? B : B_sd);
+wire [DWIDTH:0] rt  = (scandoublerD ? R : R_sd);
+wire [DWIDTH:0] gt  = (scandoublerD ? G : G_sd);
+wire [DWIDTH:0] bt  = (scandoublerD ? B : B_sd);
 
 generate
 	if(HALF_DEPTH) begin
@@ -129,8 +129,8 @@ generate
 	end
 endgenerate
 
-wire       hs = (scandoubler_disable ? HSync : hs_sd);
-wire       vs = (scandoubler_disable ? VSync : vs_sd);
+wire       hs = (scandoublerD ? HSync : hs_sd);
+wire       vs = (scandoublerD ? VSync : vs_sd);
 
 reg scanline = 0;
 always @(posedge clk_sys) begin
@@ -182,6 +182,7 @@ osd #(OSD_X_OFFSET, OSD_Y_OFFSET, OSD_COLOR) osd
 	.B_in(b_out),
 	.HSync(hs),
 	.VSync(vs),
+	.rotate(rotate),
 
 	.R_out(red),
 	.G_out(green),
@@ -236,7 +237,7 @@ wire [7:0] pr = (pr_8[17:8] < 16) ? 8'd16 : (pr_8[17:8] > 240) ? 8'd240 : pr_8[1
 assign VGA_R  = ypbpr ? (ypbpr_full ? yuv_full[pr-8'd16] : pr[7:2]) :   red;
 assign VGA_G  = ypbpr ? (ypbpr_full ? yuv_full[y -8'd16] :  y[7:2]) : green;
 assign VGA_B  = ypbpr ? (ypbpr_full ? yuv_full[pb-8'd16] : pb[7:2]) :  blue;
-assign VGA_VS = (scandoubler_disable | ypbpr) ? 1'b1 : ~vs_sd;
-assign VGA_HS = scandoubler_disable ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
+assign VGA_VS = (scandoublerD | ypbpr) ? 1'b1 : ~vs_sd;
+assign VGA_HS = scandoublerD ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
 
 endmodule
diff --git a/Arcade_MiST/Scramble Hardware/TheEnd_MiST/README.txt b/Arcade_MiST/Scramble Hardware/TheEnd_MiST/README.txt
index 68977f8c..140e2c03 100644
--- a/Arcade_MiST/Scramble Hardware/TheEnd_MiST/README.txt	
+++ b/Arcade_MiST/Scramble Hardware/TheEnd_MiST/README.txt	
@@ -8,7 +8,7 @@
 -- Copyright (c) MikeJ - Feb 2007
 ---------------------------------------------------------------------------------
 -- 
--- Only controls are rotated on VGA output.
+-- Only controls and OSD are rotated on Video output.
 -- 
 -- 
 -- Keyboard inputs :
diff --git a/Arcade_MiST/Scramble Hardware/TheEnd_MiST/Release/TheEnd.rbf b/Arcade_MiST/Scramble Hardware/TheEnd_MiST/Release/TheEnd.rbf
index b645ca7f..75c15abd 100644
Binary files a/Arcade_MiST/Scramble Hardware/TheEnd_MiST/Release/TheEnd.rbf and b/Arcade_MiST/Scramble Hardware/TheEnd_MiST/Release/TheEnd.rbf differ
diff --git a/Arcade_MiST/Scramble Hardware/TheEnd_MiST/TheEnd.qsf b/Arcade_MiST/Scramble Hardware/TheEnd_MiST/TheEnd.qsf
index 1c65c75a..90ec9189 100644
--- a/Arcade_MiST/Scramble Hardware/TheEnd_MiST/TheEnd.qsf	
+++ b/Arcade_MiST/Scramble Hardware/TheEnd_MiST/TheEnd.qsf	
@@ -1,6 +1,6 @@
 # -------------------------------------------------------------------------- #
 #
-# Copyright (C) 1991-2013 Altera Corporation
+# Copyright (C) 1991-2014 Altera Corporation
 # Your use of Altera Corporation's design tools, logic functions 
 # and other software and tools, and its AMPP partner logic 
 # functions, and any output files from any of the foregoing 
@@ -17,8 +17,8 @@
 # -------------------------------------------------------------------------- #
 #
 # Quartus II 64-Bit
-# Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
-# Date created = 01:12:07  December 01, 2017
+# Version 13.1.4 Build 182 03/12/2014 SJ Web Edition
+# Date created = 18:02:27  March 08, 2019
 #
 # -------------------------------------------------------------------------- #
 #
@@ -45,12 +45,14 @@ set_global_assignment -name PROJECT_CREATION_TIME_DATE "01:53:30  APRIL 20, 2017
 set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
 set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
 set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
-set_global_assignment -name VERILOG_FILE rtl/scandoubler.v
-set_global_assignment -name VERILOG_FILE rtl/osd.v
-set_global_assignment -name VERILOG_FILE rtl/keyboard.v
-set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
-set_global_assignment -name VHDL_FILE rtl/dac.vhd
-set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
+set_global_assignment -name SYSTEMVERILOG_FILE rtl/TheEnd.sv
+set_global_assignment -name VHDL_FILE rtl/scramble_top.vhd
+set_global_assignment -name VHDL_FILE rtl/scramble.vhd
+set_global_assignment -name VHDL_FILE rtl/scramble_video.vhd
+set_global_assignment -name VHDL_FILE rtl/scramble_audio.vhd
+set_global_assignment -name VHDL_FILE rtl/YM2149_linmix_sep.vhd
+set_global_assignment -name VHDL_FILE rtl/MULT18X18.vhd
+set_global_assignment -name VHDL_FILE rtl/i82c55.vhd
 set_global_assignment -name VHDL_FILE rtl/cpu/T80sed.vhd
 set_global_assignment -name VHDL_FILE rtl/cpu/T80_Reg.vhd
 set_global_assignment -name VHDL_FILE rtl/cpu/T80_Pack.vhd
@@ -64,17 +66,13 @@ set_global_assignment -name VHDL_FILE rtl/ROM/ROM_OBJ_1.vhd
 set_global_assignment -name VHDL_FILE rtl/ROM/ROM_OBJ_0.vhd
 set_global_assignment -name VHDL_FILE rtl/ROM/ROM_LUT.vhd
 set_global_assignment -name QIP_FILE rtl/pll.qip
-set_global_assignment -name VHDL_FILE rtl/MULT18X18.vhd
-set_global_assignment -name VHDL_FILE rtl/i82c55.vhd
 set_global_assignment -name VHDL_FILE rtl/dpram.vhd
-set_global_assignment -name VERILOG_FILE rtl/build_id.v
-set_global_assignment -name VHDL_FILE rtl/YM2149_linmix_sep.vhd
-set_global_assignment -name VHDL_FILE rtl/scramble_video.vhd
-set_global_assignment -name VHDL_FILE rtl/scramble_top.vhd
-set_global_assignment -name VHDL_FILE rtl/scramble_audio.vhd
-set_global_assignment -name VHDL_FILE rtl/scramble.vhd
-set_global_assignment -name SYSTEMVERILOG_FILE rtl/TheEnd.sv
 set_global_assignment -name VERILOG_FILE rtl/mist_io.v
+set_global_assignment -name VERILOG_FILE rtl/scandoubler.v
+set_global_assignment -name VERILOG_FILE rtl/osd.v
+set_global_assignment -name SYSTEMVERILOG_FILE rtl/hq2x.sv
+set_global_assignment -name VHDL_FILE rtl/dac.vhd
+set_global_assignment -name SYSTEMVERILOG_FILE rtl/video_mixer.sv
 
 # Pin & Location Assignments
 # ==========================
@@ -158,62 +156,98 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
 # --------------------
 # start ENTITY(TheEnd)
 
+	# start LOGICLOCK_REGION(Region_0)
+	# --------------------------------
+
+		# LogicLock Region Assignments
+		# ============================
+		set_global_assignment -name LL_ENABLED ON -section_id Region_0
+		set_global_assignment -name LL_AUTO_SIZE OFF -section_id Region_0
+		set_global_assignment -name LL_STATE LOCKED -section_id Region_0
+		set_global_assignment -name LL_RESERVED OFF -section_id Region_0
+		set_global_assignment -name LL_SECURITY_ROUTING_INTERFACE OFF -section_id Region_0
+		set_global_assignment -name LL_IGNORE_IO_BANK_SECURITY_CONSTRAINT OFF -section_id Region_0
+		set_global_assignment -name LL_PR_REGION OFF -section_id Region_0
+		set_global_assignment -name LL_ROUTING_REGION_EXPANSION_SIZE 2147483647 -section_id Region_0
+		set_global_assignment -name LL_WIDTH 4 -section_id Region_0
+		set_global_assignment -name LL_HEIGHT 1 -section_id Region_0
+		set_global_assignment -name LL_ORIGIN X28_Y23 -section_id Region_0
+
+	# end LOGICLOCK_REGION(Region_0)
+	# ------------------------------
+
+	# start LOGICLOCK_REGION(Region_1)
+	# --------------------------------
+
+		# LogicLock Region Assignments
+		# ============================
+		set_global_assignment -name LL_ENABLED ON -section_id Region_1
+		set_global_assignment -name LL_AUTO_SIZE OFF -section_id Region_1
+		set_global_assignment -name LL_STATE LOCKED -section_id Region_1
+		set_global_assignment -name LL_RESERVED OFF -section_id Region_1
+		set_global_assignment -name LL_SECURITY_ROUTING_INTERFACE OFF -section_id Region_1
+		set_global_assignment -name LL_IGNORE_IO_BANK_SECURITY_CONSTRAINT OFF -section_id Region_1
+		set_global_assignment -name LL_PR_REGION OFF -section_id Region_1
+		set_global_assignment -name LL_ROUTING_REGION_EXPANSION_SIZE 2147483647 -section_id Region_1
+		set_global_assignment -name LL_WIDTH 5 -section_id Region_1
+		set_global_assignment -name LL_HEIGHT 7 -section_id Region_1
+		set_global_assignment -name LL_ORIGIN X7_Y23 -section_id Region_1
+
+	# end LOGICLOCK_REGION(Region_1)
+	# ------------------------------
+
+	# start LOGICLOCK_REGION(Region_2)
+	# --------------------------------
+
+		# LogicLock Region Assignments
+		# ============================
+		set_global_assignment -name LL_ENABLED ON -section_id Region_2
+		set_global_assignment -name LL_AUTO_SIZE OFF -section_id Region_2
+		set_global_assignment -name LL_STATE LOCKED -section_id Region_2
+		set_global_assignment -name LL_RESERVED OFF -section_id Region_2
+		set_global_assignment -name LL_SECURITY_ROUTING_INTERFACE OFF -section_id Region_2
+		set_global_assignment -name LL_IGNORE_IO_BANK_SECURITY_CONSTRAINT OFF -section_id Region_2
+		set_global_assignment -name LL_PR_REGION OFF -section_id Region_2
+		set_global_assignment -name LL_ROUTING_REGION_EXPANSION_SIZE 2147483647 -section_id Region_2
+		set_global_assignment -name LL_WIDTH 2 -section_id Region_2
+		set_global_assignment -name LL_HEIGHT 3 -section_id Region_2
+		set_global_assignment -name LL_ORIGIN X6_Y30 -section_id Region_2
+
+	# end LOGICLOCK_REGION(Region_2)
+	# ------------------------------
+
+	# start LOGICLOCK_REGION(Region_3)
+	# --------------------------------
+
+		# LogicLock Region Assignments
+		# ============================
+		set_global_assignment -name LL_ENABLED ON -section_id Region_3
+		set_global_assignment -name LL_AUTO_SIZE OFF -section_id Region_3
+		set_global_assignment -name LL_STATE LOCKED -section_id Region_3
+		set_global_assignment -name LL_RESERVED OFF -section_id Region_3
+		set_global_assignment -name LL_SECURITY_ROUTING_INTERFACE OFF -section_id Region_3
+		set_global_assignment -name LL_IGNORE_IO_BANK_SECURITY_CONSTRAINT OFF -section_id Region_3
+		set_global_assignment -name LL_PR_REGION OFF -section_id Region_3
+		set_global_assignment -name LL_ROUTING_REGION_EXPANSION_SIZE 2147483647 -section_id Region_3
+		set_global_assignment -name LL_WIDTH 3 -section_id Region_3
+		set_global_assignment -name LL_HEIGHT 8 -section_id Region_3
+		set_global_assignment -name LL_ORIGIN X3_Y23 -section_id Region_3
+
+	# end LOGICLOCK_REGION(Region_3)
+	# ------------------------------
+
 	# start DESIGN_PARTITION(Top)
 	# ---------------------------
 
 		# Incremental Compilation Assignments
 		# ===================================
-set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
-set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
-set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
+		set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
+		set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
+		set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
 
 	# end DESIGN_PARTITION(Top)
 	# -------------------------
 
 # end ENTITY(TheEnd)
 # ------------------
-set_global_assignment -name LL_ENABLED ON -section_id Region_0
-set_global_assignment -name LL_AUTO_SIZE OFF -section_id Region_0
-set_global_assignment -name LL_STATE LOCKED -section_id Region_0
-set_global_assignment -name LL_RESERVED OFF -section_id Region_0
-set_global_assignment -name LL_SECURITY_ROUTING_INTERFACE OFF -section_id Region_0
-set_global_assignment -name LL_IGNORE_IO_BANK_SECURITY_CONSTRAINT OFF -section_id Region_0
-set_global_assignment -name LL_PR_REGION OFF -section_id Region_0
-set_global_assignment -name LL_ROUTING_REGION_EXPANSION_SIZE 2147483647 -section_id Region_0
-set_global_assignment -name LL_WIDTH 4 -section_id Region_0
-set_global_assignment -name LL_HEIGHT 1 -section_id Region_0
-set_global_assignment -name LL_ORIGIN X28_Y23 -section_id Region_0
-set_global_assignment -name LL_ENABLED ON -section_id Region_1
-set_global_assignment -name LL_AUTO_SIZE OFF -section_id Region_1
-set_global_assignment -name LL_STATE LOCKED -section_id Region_1
-set_global_assignment -name LL_RESERVED OFF -section_id Region_1
-set_global_assignment -name LL_SECURITY_ROUTING_INTERFACE OFF -section_id Region_1
-set_global_assignment -name LL_IGNORE_IO_BANK_SECURITY_CONSTRAINT OFF -section_id Region_1
-set_global_assignment -name LL_PR_REGION OFF -section_id Region_1
-set_global_assignment -name LL_ROUTING_REGION_EXPANSION_SIZE 2147483647 -section_id Region_1
-set_global_assignment -name LL_WIDTH 5 -section_id Region_1
-set_global_assignment -name LL_HEIGHT 7 -section_id Region_1
-set_global_assignment -name LL_ORIGIN X7_Y23 -section_id Region_1
-set_global_assignment -name LL_ENABLED ON -section_id Region_2
-set_global_assignment -name LL_AUTO_SIZE OFF -section_id Region_2
-set_global_assignment -name LL_STATE LOCKED -section_id Region_2
-set_global_assignment -name LL_RESERVED OFF -section_id Region_2
-set_global_assignment -name LL_SECURITY_ROUTING_INTERFACE OFF -section_id Region_2
-set_global_assignment -name LL_IGNORE_IO_BANK_SECURITY_CONSTRAINT OFF -section_id Region_2
-set_global_assignment -name LL_PR_REGION OFF -section_id Region_2
-set_global_assignment -name LL_ROUTING_REGION_EXPANSION_SIZE 2147483647 -section_id Region_2
-set_global_assignment -name LL_WIDTH 2 -section_id Region_2
-set_global_assignment -name LL_HEIGHT 3 -section_id Region_2
-set_global_assignment -name LL_ORIGIN X6_Y30 -section_id Region_2
-set_global_assignment -name LL_ENABLED ON -section_id Region_3
-set_global_assignment -name LL_AUTO_SIZE OFF -section_id Region_3
-set_global_assignment -name LL_STATE LOCKED -section_id Region_3
-set_global_assignment -name LL_RESERVED OFF -section_id Region_3
-set_global_assignment -name LL_SECURITY_ROUTING_INTERFACE OFF -section_id Region_3
-set_global_assignment -name LL_IGNORE_IO_BANK_SECURITY_CONSTRAINT OFF -section_id Region_3
-set_global_assignment -name LL_PR_REGION OFF -section_id Region_3
-set_global_assignment -name LL_ROUTING_REGION_EXPANSION_SIZE 2147483647 -section_id Region_3
-set_global_assignment -name LL_WIDTH 3 -section_id Region_3
-set_global_assignment -name LL_HEIGHT 8 -section_id Region_3
-set_global_assignment -name LL_ORIGIN X3_Y23 -section_id Region_3
 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
diff --git a/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/TheEnd.sv b/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/TheEnd.sv
index 7680c5ff..3155d7f2 100644
--- a/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/TheEnd.sv	
+++ b/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/TheEnd.sv	
@@ -42,37 +42,32 @@ module TheEnd
 
 localparam CONF_STR = {
 	"TheEnd;;",
-	"O2,Joystick Control,Upright,Normal;",
-	"O34,Scandoubler Fx,None,HQ2x,CRT 25%,CRT 50%;",
+	"O2,Rotate Controls,Off,On;",
+	"O34,Scanlines,Off,25%,50%,75%;",
 	"T6,Reset;",
-	"V,v1.00.",`BUILD_DATE
+	"V,v1.20.",`BUILD_DATE
 };
 
-
-////////////////////   CLOCKS   ///////////////////
+assign LED = 1;
+assign AUDIO_R = AUDIO_L;
 
 wire clk_sys;
 wire pll_locked;
-
-pll pll
-(
+pll pll(
 	.inclk0(CLOCK_27),
 	.areset(0),
 	.c0(clk_sys),
 	.locked(pll_locked)
-);
+	);
 
-reg ce_6, ce_star, ce_1p79;
+reg ce_6p, ce_star, ce_1p79;
 always @(negedge clk_sys) begin
-	reg [2:0] div = 0;
-	reg [4:0] div179 = 0;
-	
+reg [2:0] div = 0;
+reg [4:0] div179 = 0;	
 	div <= div + 1'd1;
 	if(div == 5) div <= 0;
-
-	ce_6    <= (div == 0);
+	ce_6p    <= (div == 0);
 	ce_star <= ((div == 3) | (div == 5));
-
    ce_1p79 <= 0;
    div179 <= div179 + 1'd1;
    if(div179 == 19) begin
@@ -87,28 +82,42 @@ wire  [1:0] switches;
 wire  [9:0] kbjoy;
 wire  [7:0] joystick_0;
 wire  [7:0] joystick_1;
-wire        scandoubler_disable;
+wire        scandoublerD;
 wire        ypbpr;
-wire        ps2_kbd_clk, ps2_kbd_data;
+wire [10:0] ps2_key;
 wire [9:0] audio;
-wire hsync,vsync;
-assign LED = 1;
-wire blankn = ~(hblank | vblank);
-wire hblank, vblank;
 wire hs, vs;
+wire blankn = ~(hb | vb);
+wire hb, vb;
 wire [2:0] r,b,g;
 
-video_mixer #(.LINE_LENGTH(640), .HALF_DEPTH(0)) video_mixer
-(
+scramble_top theend(
+	.O_VIDEO_R(r),
+	.O_VIDEO_G(g),
+	.O_VIDEO_B(b),
+	.O_HSYNC(hs),
+	.O_VSYNC(vs),
+   .O_HBLANK(hb),
+   .O_VBLANK(vb),
+	.O_AUDIO(audio),
+	.button_in(~{btn_two_players, m_fire, btn_coin, btn_one_player, m_right, m_left, m_down, m_up}),
+	.RESET(status[0] | status[6] | buttons[1]),
+	.clk(clk_sys),
+	.ena_star(ce_star),
+	.ena_6(ce_6p),
+	.ena_1_79(ce_1p79)
+);
+
+video_mixer video_mixer(
 	.clk_sys(clk_sys),
-	.ce_pix(ce_6),
-	.ce_pix_actual(ce_6),
+	.ce_pix(ce_6p),
+	.ce_pix_actual(ce_6p),
 	.SPI_SCK(SPI_SCK),
 	.SPI_SS3(SPI_SS3),
 	.SPI_DI(SPI_DI),
-	.R({r,r}),
-	.G({g,g}),
-	.B({b,b}),
+	.R(blankn ? {r,r,r} : 0),
+	.G(blankn ? {g,g,g} : 0),
+	.B(blankn ? {b,b,b} : 0),
 	.HSync(hs),
 	.VSync(vs),
 	.VGA_R(VGA_R),
@@ -116,13 +125,14 @@ video_mixer #(.LINE_LENGTH(640), .HALF_DEPTH(0)) video_mixer
 	.VGA_B(VGA_B),
 	.VGA_VS(VGA_VS),
 	.VGA_HS(VGA_HS),
-	.scandoubler_disable(scandoubler_disable),
-	.scanlines(scandoubler_disable ? 2'b00 : {status[4:3] == 3, status[4:3] == 2}),
-	.hq2x(status[4:3]==1),
+	.rotate({1'b1,status[2]}),
+	.scandoublerD(scandoublerD),
+	.scanlines(scandoublerD ? 2'b00 : status[4:3]),
+	.ypbpr(ypbpr),
 	.ypbpr_full(1),
 	.line_start(0),
 	.mono(0)
-);
+	);
 
 mist_io #(.STRLEN(($size(CONF_STR)>>3))) mist_io
 (
@@ -135,64 +145,59 @@ mist_io #(.STRLEN(($size(CONF_STR)>>3))) mist_io
 	.SPI_DI         (SPI_DI         ),
 	.buttons        (buttons        ),
 	.switches   	 (switches       ),
-	.scandoubler_disable(scandoubler_disable),
+	.scandoublerD	 (scandoublerD	  ),
 	.ypbpr          (ypbpr          ),
-	.ps2_kbd_clk    (ps2_kbd_clk    ),
-	.ps2_kbd_data   (ps2_kbd_data   ),
+	.ps2_key			 (ps2_key        ),
 	.joystick_0   	 (joystick_0     ),
 	.joystick_1     (joystick_1     ),
 	.status         (status         )
-);
-
-
-
-keyboard keyboard(
-	.clk(clk_sys),
-	.reset(),
-	.ps2_kbd_clk(ps2_kbd_clk),
-	.ps2_kbd_data(ps2_kbd_data),
-	.joystick(kbjoy)
 	);
-	
-wire m_up     = status[2] ? kbjoy[6] | joystick_0[1] | joystick_1[1] : kbjoy[4] | joystick_0[3] | joystick_1[3];
-wire m_down   = status[2] ? kbjoy[7] | joystick_0[0] | joystick_1[0] : kbjoy[5] | joystick_0[2] | joystick_1[2];
-wire m_left   = status[2] ? kbjoy[5] | joystick_0[2] | joystick_1[2] : kbjoy[6] | joystick_0[1] | joystick_1[1];
-wire m_right  = status[2] ? kbjoy[4] | joystick_0[3] | joystick_1[3] : kbjoy[7] | joystick_0[0] | joystick_1[0];
 
-wire m_fire   = kbjoy[0] | joystick_0[4] | joystick_1[4];
-wire m_start1 = kbjoy[1];
-wire m_start2 = kbjoy[2];
-wire m_coin   = kbjoy[3];
-//wire m_bomb   = kbjoy[8];
-//wire m_Serv   = kbjoy[9];
-
-scramble_top theend
-(
-	.O_VIDEO_R(r),
-	.O_VIDEO_G(g),
-	.O_VIDEO_B(b),
-	.O_HSYNC(hs),
-	.O_VSYNC(vs),
-   .O_HBLANK(hblank),
-   .O_VBLANK(vblank),
-	.O_AUDIO(audio),
-	.button_in(~{m_start2, m_fire, m_coin, m_start1, m_right, m_left, m_down, m_up}),
-	.RESET(status[0] | status[6] | buttons[1]),
-	.clk(clk_sys),
-	.ena_star(ce_star),
-	.ena_6(ce_6),
-	.ena_1_79(ce_1p79)
-);
-
-dac dac
-(
+dac dac(
 	.clk_i(clk_sys),
 	.res_n_i(1),
 	.dac_i(audio),
 	.dac_o(AUDIO_L)
 	);
+//											Rotated														Normal
+wire m_up     = ~status[2] ? btn_left | joystick_0[1] | joystick_1[1] : btn_up | joystick_0[3] | joystick_1[3];
+wire m_down   = ~status[2] ? btn_right | joystick_0[0] | joystick_1[0] : btn_down | joystick_0[2] | joystick_1[2];
+wire m_left   = ~status[2] ? btn_down | joystick_0[2] | joystick_1[2] : btn_left | joystick_0[1] | joystick_1[1];
+wire m_right  = ~status[2] ? btn_up | joystick_0[3] | joystick_1[3] : btn_right | joystick_0[0] | joystick_1[0];
 
-assign AUDIO_R = AUDIO_L;
+wire m_fire   = btn_fire1 | joystick_0[4] | joystick_1[4];
+wire m_bomb   = btn_fire2 | joystick_0[5] | joystick_1[5];
 
+reg btn_one_player = 0;
+reg btn_two_players = 0;
+reg btn_left = 0;
+reg btn_right = 0;
+reg btn_down = 0;
+reg btn_up = 0;
+reg btn_fire1 = 0;
+reg btn_fire2 = 0;
+reg btn_fire3 = 0;
+reg btn_coin  = 0;
+wire       pressed = ps2_key[9];
+wire [7:0] code    = ps2_key[7:0];	
 
-endmodule
+always @(posedge clk_sys) begin
+	reg old_state;
+	old_state <= ps2_key[10];
+	if(old_state != ps2_key[10]) begin
+		case(code)
+			'h75: btn_up         	<= pressed; // up
+			'h72: btn_down        	<= pressed; // down
+			'h6B: btn_left      		<= pressed; // left
+			'h74: btn_right       	<= pressed; // right
+			'h76: btn_coin				<= pressed; // ESC
+			'h05: btn_one_player   	<= pressed; // F1
+			'h06: btn_two_players  	<= pressed; // F2
+			'h14: btn_fire3 			<= pressed; // ctrl
+			'h11: btn_fire2 			<= pressed; // alt
+			'h29: btn_fire1   		<= pressed; // Space
+		endcase
+	end
+end
+
+endmodule 
\ No newline at end of file
diff --git a/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/build_id.v b/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/build_id.v
index 4e62f060..5b70a419 100644
--- a/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/build_id.v	
+++ b/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/build_id.v	
@@ -1,2 +1,2 @@
-`define BUILD_DATE "171217"
-`define BUILD_TIME "232358"
+`define BUILD_DATE "190308"
+`define BUILD_TIME "180426"
diff --git a/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/keyboard.v b/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/keyboard.v
deleted file mode 100644
index c2b7b86e..00000000
--- a/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/keyboard.v	
+++ /dev/null
@@ -1,82 +0,0 @@
-
-
-module keyboard
-(
-	input  clk,
-	input  reset,
-	input  ps2_kbd_clk,
-	input  ps2_kbd_data,
-
-	output reg[9:0] joystick
-);
-
-reg [11:0] shift_reg = 12'hFFF;
-wire[11:0] kdata = {ps2_kbd_data,shift_reg[11:1]};
-wire [7:0] kcode = kdata[9:2];
-reg        release_btn = 0;
-
-reg  [7:0] code;
-reg        input_strobe = 0;
-
-always @(negedge clk) begin
-	reg old_reset = 0;
-
-	old_reset <= reset;
-
-	if(~old_reset & reset)begin
-		joystick <= 0;
-	end
-
-	if(input_strobe) begin
-		case(code)
-			'h16: joystick[1] <= ~release_btn; // 1
-			'h1E: joystick[2] <= ~release_btn; // 2
-
-			'h75: joystick[4] <= ~release_btn; // arrow up
-			'h72: joystick[5] <= ~release_btn; // arrow down
-			'h6B: joystick[6] <= ~release_btn; // arrow left
-			'h74: joystick[7] <= ~release_btn; // arrow right
-
-			'h29: joystick[0] <= ~release_btn; // Space
-			'h11: joystick[8] <= ~release_btn; // Left Alt
-			'h0d: joystick[9] <= ~release_btn; // Tab
-			'h76: joystick[3] <= ~release_btn; // Escape
-		endcase
-	end
-end
-
-always @(posedge clk) begin
-	reg [3:0] prev_clk  = 0;
-	reg       old_reset = 0;
-	reg       action = 0;
-
-	old_reset <= reset;
-	input_strobe <= 0;
-
-	if(~old_reset & reset)begin
-		prev_clk  <= 0;
-		shift_reg <= 12'hFFF;
-	end else begin
-		prev_clk <= {ps2_kbd_clk,prev_clk[3:1]};
-		if(prev_clk == 1) begin
-			if (kdata[11] & ^kdata[10:2] & ~kdata[1] & kdata[0]) begin
-				shift_reg <= 12'hFFF;
-				if (kcode == 8'he0) ;
-				// Extended key code follows
-				else if (kcode == 8'hf0)
-					// Release code follows
-					action <= 1;
-				else begin
-					// Cancel extended/release flags for next time
-					action <= 0;
-					release_btn <= action;
-					code <= kcode;
-					input_strobe <= 1;
-				end
-			end else begin
-				shift_reg <= kdata;
-			end
-		end
-	end
-end
-endmodule
diff --git a/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/mist_io.v b/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/mist_io.v
index ad233a3b..2f41221f 100644
--- a/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/mist_io.v	
+++ b/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/mist_io.v	
@@ -5,6 +5,7 @@
 // http://code.google.com/p/mist-board/
 //
 // Copyright (c) 2014 Till Harbaum <till@harbaum.org>
+// Copyright (c) 2015-2017 Sorgelig
 //
 // This source file is free software: you can redistribute it and/or modify
 // it under the terms of the GNU General Public License as published
@@ -47,13 +48,16 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
 	output            SPI_DO,
 	input             SPI_DI,
 
-	output reg  [7:0] joystick_0,
-	output reg  [7:0] joystick_1,
+	output reg [7:0] joystick_0,
+	output reg [7:0] joystick_1,
+//	output reg [31:0] joystick_2,
+//	output reg [31:0] joystick_3,
+//	output reg [31:0] joystick_4,
 	output reg [15:0] joystick_analog_0,
 	output reg [15:0] joystick_analog_1,
 	output      [1:0] buttons,
 	output      [1:0] switches,
-	output            scandoubler_disable,
+	output            scandoublerD,
 	output            ypbpr,
 
 	output reg [31:0] status,
@@ -61,13 +65,13 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
 	// SD config
 	input             sd_conf,
 	input             sd_sdhc,
-	output            img_mounted, // signaling that new image has been mounted
+	output      [1:0] img_mounted, // signaling that new image has been mounted
 	output reg [31:0] img_size,    // size of image in bytes
 
 	// SD block level access
 	input      [31:0] sd_lba,
-	input             sd_rd,
-	input             sd_wr,
+	input       [1:0] sd_rd,
+	input       [1:0] sd_wr,
 	output reg        sd_ack,
 	output reg        sd_ack_conf,
 
@@ -82,192 +86,222 @@ module mist_io #(parameter STRLEN=0, parameter PS2DIV=100)
 	output reg        ps2_kbd_data,
 	output            ps2_mouse_clk,
 	output reg        ps2_mouse_data,
-	input             ps2_caps_led,
+
+	// ps2 alternative interface. 
+
+	// [8] - extended, [9] - pressed, [10] - toggles with every press/release
+	output reg [10:0] ps2_key = 0,
+
+	// [24] - toggles with every event
+	output reg [24:0] ps2_mouse = 0,
 
 	// ARM -> FPGA download
+	input             ioctl_ce,
 	output reg        ioctl_download = 0, // signal indicating an active download
 	output reg  [7:0] ioctl_index,        // menu index used to upload the file
-	output            ioctl_wr,
+	output reg        ioctl_wr = 0,
 	output reg [24:0] ioctl_addr,
 	output reg  [7:0] ioctl_dout
 );
 
-reg [7:0] b_data;
-reg [6:0] sbuf;
-reg [7:0] cmd;
-reg [2:0] bit_cnt;    // counts bits 0-7 0-7 ...
-reg [9:0] byte_cnt;   // counts bytes
 reg [7:0] but_sw;
 reg [2:0] stick_idx;
 
-reg    mount_strobe = 0;
+reg [1:0] mount_strobe = 0;
 assign img_mounted  = mount_strobe;
 
 assign buttons = but_sw[1:0];
 assign switches = but_sw[3:2];
-assign scandoubler_disable = but_sw[4];
+assign scandoublerD = but_sw[4];
 assign ypbpr = but_sw[5];
 
-wire [7:0] spi_dout = { sbuf, SPI_DI};
-
 // this variant of user_io is for 8 bit cores (type == a4) only
 wire [7:0] core_type = 8'ha4;
 
 // command byte read by the io controller
-wire [7:0] sd_cmd = { 4'h5, sd_conf, sd_sdhc, sd_wr, sd_rd };
+wire       drive_sel = sd_rd[1] | sd_wr[1];
+wire [7:0] sd_cmd = { 4'h6, sd_conf, sd_sdhc, sd_wr[drive_sel], sd_rd[drive_sel] };
+
+reg [7:0] cmd;
+reg [2:0] bit_cnt;    // counts bits 0-7 0-7 ...
+reg [9:0] byte_cnt;   // counts bytes
 
 reg spi_do;
 assign SPI_DO = CONF_DATA0 ? 1'bZ : spi_do;
 
-wire [7:0] kbd_led = { 2'b01, 4'b0000, ps2_caps_led, 1'b1};
+reg [7:0] spi_data_out;
 
-// drive MISO only when transmitting core id
-always@(negedge SPI_SCK) begin
-	if(!CONF_DATA0) begin
-		// first byte returned is always core type, further bytes are 
-		// command dependent
-      if(byte_cnt == 0) begin
-		  spi_do <= core_type[~bit_cnt];
+// SPI transmitter
+always@(negedge SPI_SCK) spi_do <= spi_data_out[~bit_cnt];
 
-		end else begin
-			case(cmd)
-				// reading config string
-				8'h14: begin
-					// returning a byte from string
-						if(byte_cnt < STRLEN + 1) spi_do <= conf_str[{STRLEN - byte_cnt,~bit_cnt}];
-							else spi_do <= 0;
-					end
-
-				// reading sd card status
-				8'h16: begin
-						if(byte_cnt == 1) spi_do <= sd_cmd[~bit_cnt];
-						else if((byte_cnt >= 2) && (byte_cnt < 6)) spi_do <= sd_lba[{5-byte_cnt, ~bit_cnt}];
-						else spi_do <= 0;
-					end
-
-				// reading sd card write data
-				8'h18:
-						spi_do <= b_data[~bit_cnt];
-
-				// reading keyboard LED status
-				8'h1f:
-						spi_do <= kbd_led[~bit_cnt];
-
-				default:
-						spi_do <= 0;
-			endcase
-		end
-   end
-end
-
-reg b_wr2,b_wr3;
-always @(negedge clk_sys) begin
-	b_wr3      <= b_wr2;
-	sd_buff_wr <= b_wr3;
-end
+reg [7:0] spi_data_in;
+reg       spi_data_ready = 0;
 
 // SPI receiver
 always@(posedge SPI_SCK or posedge CONF_DATA0) begin
+	reg [6:0]  sbuf;
+	reg [31:0] sd_lba_r;
+	reg        drive_sel_r;
 
 	if(CONF_DATA0) begin
-		b_wr2 <= 0;
 	   bit_cnt <= 0;
 	   byte_cnt <= 0;
-		sd_ack <= 0;
-		sd_ack_conf <= 0;
-	end else begin
-		b_wr2 <= 0;
-
-		sbuf <= spi_dout[6:0];
+		spi_data_out <= core_type;
+	end
+	else
+	begin
 		bit_cnt <= bit_cnt + 1'd1;
-		if(bit_cnt == 5) begin
-			if (byte_cnt == 0) sd_buff_addr <= 0;
-			if((byte_cnt != 0) & (sd_buff_addr != 511)) sd_buff_addr <= sd_buff_addr + 1'b1;
-			if((byte_cnt == 1) & ((cmd == 8'h17) | (cmd == 8'h19))) sd_buff_addr <= 0;
-		end
+		sbuf <= {sbuf[5:0], SPI_DI};
 
 		// finished reading command byte
       if(bit_cnt == 7) begin
+			if(!byte_cnt) cmd <= {sbuf, SPI_DI};
+
+			spi_data_in <= {sbuf, SPI_DI};
+			spi_data_ready <= ~spi_data_ready;
 			if(~&byte_cnt) byte_cnt <= byte_cnt + 8'd1;
-			if(byte_cnt == 0) begin
-				cmd <= spi_dout;
-
-				if(spi_dout == 8'h19) begin
-					sd_ack_conf  <= 1;
-					sd_buff_addr <= 0;
-				end
-				if((spi_dout == 8'h17) || (spi_dout == 8'h18)) begin
-					sd_ack       <= 1;
-					sd_buff_addr <= 0;
-				end
-				if(spi_dout == 8'h18) b_data <= sd_buff_din;
-
-				mount_strobe <= 0;
-
-			end else begin
 			
-				case(cmd)
-					// buttons and switches
-					8'h01: but_sw <= spi_dout; 
-					8'h02: joystick_0 <= spi_dout;
-					8'h03: joystick_1 <= spi_dout;
+			spi_data_out <= 0;
+			case({(!byte_cnt) ? {sbuf, SPI_DI} : cmd})
+				// reading config string
+				8'h14: if(byte_cnt < STRLEN) spi_data_out <= conf_str[(STRLEN - byte_cnt - 1)<<3 +:8];
 
-					// store incoming ps2 mouse bytes 
-					8'h04: begin
-							ps2_mouse_fifo[ps2_mouse_wptr] <= spi_dout; 
-							ps2_mouse_wptr <= ps2_mouse_wptr + 1'd1;
-						end
+				// reading sd card status
+				8'h16: if(byte_cnt == 0) begin
+							spi_data_out <= sd_cmd;
+							sd_lba_r <= sd_lba;
+							drive_sel_r <= drive_sel;
+						end else if (byte_cnt == 1) begin
+							spi_data_out <= drive_sel_r;
+						end else if(byte_cnt < 6) spi_data_out <= sd_lba_r[(5-byte_cnt)<<3 +:8];
 
-					// store incoming ps2 keyboard bytes 
-					8'h05: begin
-							ps2_kbd_fifo[ps2_kbd_wptr] <= spi_dout; 
-							ps2_kbd_wptr <= ps2_kbd_wptr + 1'd1;
-						end
-				
-					8'h15: status[7:0] <= spi_dout;
-				
-					// send SD config IO -> FPGA
-					// flag that download begins
-					// sd card knows data is config if sd_dout_strobe is asserted
-					// with sd_ack still being inactive (low)
-					8'h19,
-					// send sector IO -> FPGA
-					// flag that download begins
-					8'h17: begin
-							sd_buff_dout <= spi_dout;
-							b_wr2 <= 1;
-						end
+				// reading sd card write data
+				8'h18: spi_data_out <= sd_buff_din;
+			endcase
+		end
+	end
+end
 
-					8'h18: b_data <= sd_buff_din;
+reg [31:0] ps2_key_raw = 0;
+wire       pressed  = (ps2_key_raw[15:8] != 8'hf0);
+wire       extended = (~pressed ? (ps2_key_raw[23:16] == 8'he0) : (ps2_key_raw[15:8] == 8'he0));
 
-					// joystick analog
-					8'h1a: begin
-							// first byte is joystick index
-							if(byte_cnt == 1) stick_idx <= spi_dout[2:0];
-							else if(byte_cnt == 2) begin
-								// second byte is x axis
-								if(stick_idx == 0) joystick_analog_0[15:8] <= spi_dout;
-									else if(stick_idx == 1) joystick_analog_1[15:8] <= spi_dout;
-							end else if(byte_cnt == 3) begin
-								// third byte is y axis
-								if(stick_idx == 0) joystick_analog_0[7:0] <= spi_dout;
-									else if(stick_idx == 1) joystick_analog_1[7:0] <= spi_dout;
-							end
-						end
+// transfer to clk_sys domain
+always@(posedge clk_sys) begin
+	reg old_ss1, old_ss2;
+	reg old_ready1, old_ready2;
+	reg [2:0] b_wr;
+	reg       got_ps2 = 0;
 
-					// notify image selection
-					8'h1c: mount_strobe <= 1;
+	old_ss1 <= CONF_DATA0;
+	old_ss2 <= old_ss1;
+	old_ready1 <= spi_data_ready;
+	old_ready2 <= old_ready1;
+	
+	sd_buff_wr <= b_wr[0];
+	if(b_wr[2] && (~&sd_buff_addr)) sd_buff_addr <= sd_buff_addr + 1'b1;
+	b_wr <= (b_wr<<1);
 
-					// send image info
-					8'h1d: if(byte_cnt<5) img_size[(byte_cnt-1)<<3 +:8] <= spi_dout;
-
-					// status, 32bit version
-					8'h1e: if(byte_cnt<5) status[(byte_cnt-1)<<3 +:8] <= spi_dout;
-					default: ;
-				endcase
+	if(old_ss2) begin
+		got_ps2      <= 0;
+		sd_ack       <= 0;
+		sd_ack_conf  <= 0;
+		sd_buff_addr <= 0;
+		if(got_ps2) begin
+			if(cmd == 4) ps2_mouse[24] <= ~ps2_mouse[24]; 
+			if(cmd == 5) begin
+				ps2_key <= {~ps2_key[10], pressed, extended, ps2_key_raw[7:0]};
+				if(ps2_key_raw == 'hE012E07C) ps2_key[9:0] <= 'h37C; // prnscr pressed
+				if(ps2_key_raw == 'h7CE0F012) ps2_key[9:0] <= 'h17C; // prnscr released
+				if(ps2_key_raw == 'hF014F077) ps2_key[9:0] <= 'h377; // pause  pressed
 			end
 		end
 	end
+	else
+	if(old_ready2 ^ old_ready1) begin
+
+		if(cmd == 8'h18 && ~&sd_buff_addr) sd_buff_addr <= sd_buff_addr + 1'b1;
+
+		if(byte_cnt < 2) begin
+
+			if (cmd == 8'h19) sd_ack_conf  <= 1;
+			if((cmd == 8'h17) || (cmd == 8'h18)) sd_ack <= 1;
+			mount_strobe <= 0;
+
+			if(cmd == 5) ps2_key_raw <= 0;
+		end else begin
+		
+			case(cmd)
+				// buttons and switches
+				8'h01: but_sw <= spi_data_in; 
+				8'h02: joystick_0 <= spi_data_in;
+				8'h03: joystick_1 <= spi_data_in;
+//				8'h60: if (byte_cnt < 5) joystick_0[(byte_cnt-1)<<3 +:8] <= spi_data_in;
+//				8'h61: if (byte_cnt < 5) joystick_1[(byte_cnt-1)<<3 +:8] <= spi_data_in;
+//				8'h62: if (byte_cnt < 5) joystick_2[(byte_cnt-1)<<3 +:8] <= spi_data_in;
+//				8'h63: if (byte_cnt < 5) joystick_3[(byte_cnt-1)<<3 +:8] <= spi_data_in;
+//				8'h64: if (byte_cnt < 5) joystick_4[(byte_cnt-1)<<3 +:8] <= spi_data_in;
+				// store incoming ps2 mouse bytes 
+				8'h04: begin
+						got_ps2 <= 1;
+						case(byte_cnt)
+							2: ps2_mouse[7:0]   <= spi_data_in;
+							3: ps2_mouse[15:8]  <= spi_data_in;
+							4: ps2_mouse[23:16] <= spi_data_in;
+						endcase 
+						ps2_mouse_fifo[ps2_mouse_wptr] <= spi_data_in; 
+						ps2_mouse_wptr <= ps2_mouse_wptr + 1'd1;
+					end
+
+				// store incoming ps2 keyboard bytes 
+				8'h05: begin
+						got_ps2 <= 1;
+						ps2_key_raw[31:0] <= {ps2_key_raw[23:0], spi_data_in}; 						
+						ps2_kbd_fifo[ps2_kbd_wptr] <= spi_data_in; 
+						ps2_kbd_wptr <= ps2_kbd_wptr + 1'd1;
+					end
+			
+				8'h15: status[7:0] <= spi_data_in;
+			
+				// send SD config IO -> FPGA
+				// flag that download begins
+				// sd card knows data is config if sd_dout_strobe is asserted
+				// with sd_ack still being inactive (low)
+				8'h19,
+				// send sector IO -> FPGA
+				// flag that download begins
+				8'h17: begin
+						sd_buff_dout <= spi_data_in;
+						b_wr <= 1;
+					end
+
+				// joystick analog
+				8'h1a: begin
+						// first byte is joystick index
+						if(byte_cnt == 2) stick_idx <= spi_data_in[2:0];
+						else if(byte_cnt == 3) begin
+							// second byte is x axis
+							if(stick_idx == 0) joystick_analog_0[15:8] <= spi_data_in;
+								else if(stick_idx == 1) joystick_analog_1[15:8] <= spi_data_in;
+						end else if(byte_cnt == 4) begin
+							// third byte is y axis
+							if(stick_idx == 0) joystick_analog_0[7:0] <= spi_data_in;
+								else if(stick_idx == 1) joystick_analog_1[7:0] <= spi_data_in;
+						end
+					end
+
+				// notify image selection
+				8'h1c: mount_strobe[spi_data_in[0]] <= 1;
+
+				// send image info
+				8'h1d: if(byte_cnt<6) img_size[(byte_cnt-2)<<3 +:8] <= spi_data_in;
+
+				// status, 32bit version
+				8'h1e: if(byte_cnt<6) status[(byte_cnt-2)<<3 +:8] <= spi_data_in;
+				default: ;
+			endcase
+		end
+	end
 end
 
 
@@ -422,6 +456,8 @@ localparam UIO_FILE_TX      = 8'h53;
 localparam UIO_FILE_TX_DAT  = 8'h54;
 localparam UIO_FILE_INDEX   = 8'h55;
 
+reg        rdownload = 0;
+
 // data_io has its own SPI interface to the io controller
 always@(posedge SPI_SCK, posedge SPI_SS2) begin
 	reg  [6:0] sbuf;
@@ -431,15 +467,10 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
 
 	if(SPI_SS2) cnt <= 0;
 	else begin
-		rclk <= 0;
-
 		// don't shift in last bit. It is evaluated directly
 		// when writing to ram
 		if(cnt != 15) sbuf <= { sbuf[5:0], SPI_DI};
 
-		// increase target address after write
-		if(rclk) addr <= addr + 1'd1;
-
 		// count 0-7 8-15 8-15 ... 
 		if(cnt < 15) cnt <= cnt + 1'd1;
 			else cnt <= 8;
@@ -451,11 +482,15 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
 		if((cmd == UIO_FILE_TX) && (cnt == 15)) begin
 			// prepare 
 			if(SPI_DI) begin
-				addr <= 0;
-				ioctl_download <= 1; 
+				case(ioctl_index[4:0]) 
+							1: addr <= 25'h200000; // TRD buffer  at 2MB
+							2: addr <= 25'h400000; // tape buffer at 4MB 
+					default: addr <= 25'h150000; // boot rom
+				endcase
+				rdownload <= 1; 
 			end else begin
 				addr_w <= addr;
-				ioctl_download <= 0;
+				rdownload <= 0;
 			end
 		end
 
@@ -463,7 +498,8 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
 		if((cmd == UIO_FILE_TX_DAT) && (cnt == 15)) begin
 			addr_w <= addr;
 			data_w <= {sbuf, SPI_DI};
-			rclk <= 1;
+			addr <= addr + 1'd1;
+			rclk <= ~rclk;
 		end
 
       // expose file (menu) index
@@ -471,21 +507,24 @@ always@(posedge SPI_SCK, posedge SPI_SS2) begin
 	end
 end
 
-assign ioctl_wr = |ioctl_wrd;
-reg [1:0] ioctl_wrd;
-
-always@(negedge clk_sys) begin
+// transfer to ioctl_clk domain.
+// ioctl_index is set before ioctl_download, so it's stable already
+always@(posedge clk_sys) begin
 	reg        rclkD, rclkD2;
 
-	rclkD    <= rclk;
-	rclkD2   <= rclkD;
-	ioctl_wrd<= {ioctl_wrd[0],1'b0};
+	if(ioctl_ce) begin
+		ioctl_download <= rdownload;
 
-	if(rclkD & ~rclkD2) begin
-		ioctl_dout <= data_w;
-		ioctl_addr <= addr_w;
-		ioctl_wrd  <= 2'b11;
+		rclkD    <= rclk;
+		rclkD2   <= rclkD;
+		ioctl_wr <= 0;
+
+		if(rclkD != rclkD2) begin
+			ioctl_dout <= data_w;
+			ioctl_addr <= addr_w;
+			ioctl_wr   <= 1;
+		end
 	end
 end
 
-endmodule
+endmodule 
\ No newline at end of file
diff --git a/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/osd.v b/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/osd.v
index c62c10af..b9181763 100644
--- a/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/osd.v	
+++ b/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/osd.v	
@@ -11,13 +11,15 @@ module osd (
 	input        SPI_SS3,
 	input        SPI_DI,
 
+	input  [1:0] rotate, //[0] - rotate [1] - left or right
+
 	// VGA signals coming from core
 	input  [5:0] R_in,
 	input  [5:0] G_in,
 	input  [5:0] B_in,
 	input        HSync,
 	input        VSync,
-	
+
 	// VGA signals going to video connector
 	output [5:0] R_out,
 	output [5:0] G_out,
@@ -59,7 +61,7 @@ always@(posedge SPI_SCK, posedge SPI_SS3) begin
 
 		if(cnt == 7) begin
 			cmd <= {sbuf[6:0], SPI_DI};
-      
+
 			// lower three command bits are line address
 			bcnt <= {sbuf[1:0], SPI_DI, 8'h00};
 
@@ -91,7 +93,7 @@ reg  [9:0] vs_low, vs_high;
 wire       vs_pol = vs_high < vs_low;
 wire [9:0] dsp_height = vs_pol ? vs_low : vs_high;
 
-wire doublescan = (dsp_height>350); 
+wire doublescan = (dsp_height>350);
 
 reg ce_pix;
 always @(negedge clk_sys) begin
@@ -124,13 +126,13 @@ always @(posedge clk_sys) begin
 		hsD2 <= hsD;
 
 		// falling edge of HSync
-		if(!hsD && hsD2) begin	
+		if(!hsD && hsD2) begin
 			h_cnt <= 0;
 			hs_high <= h_cnt;
 		end
 
 		// rising edge of HSync
-		else if(hsD && !hsD2) begin	
+		else if(hsD && !hsD2) begin
 			h_cnt <= 0;
 			hs_low <= h_cnt;
 			v_cnt <= v_cnt + 1'd1;
@@ -142,13 +144,13 @@ always @(posedge clk_sys) begin
 		vsD2 <= vsD;
 
 		// falling edge of VSync
-		if(!vsD && vsD2) begin	
+		if(!vsD && vsD2) begin
 			v_cnt <= 0;
 			vs_high <= v_cnt;
 		end
 
 		// rising edge of VSync
-		else if(vsD && !vsD2) begin	
+		else if(vsD && !vsD2) begin
 			v_cnt <= 0;
 			vs_low <= v_cnt;
 		end
@@ -160,17 +162,30 @@ wire [9:0] h_osd_start = ((dsp_width - OSD_WIDTH)>> 1) + OSD_X_OFFSET;
 wire [9:0] h_osd_end   = h_osd_start + OSD_WIDTH;
 wire [9:0] v_osd_start = ((dsp_height- (OSD_HEIGHT<<doublescan))>> 1) + OSD_Y_OFFSET;
 wire [9:0] v_osd_end   = v_osd_start + (OSD_HEIGHT<<doublescan);
-wire [9:0] osd_hcnt    = h_cnt - h_osd_start + 1'd1;  // one pixel offset for osd_byte register
+wire [9:0] osd_hcnt    = h_cnt - h_osd_start;
 wire [9:0] osd_vcnt    = v_cnt - v_osd_start;
+wire [9:0] osd_hcnt_next  = osd_hcnt + 2'd1;  // one pixel offset for osd pixel
+wire [9:0] osd_hcnt_next2 = osd_hcnt + 2'd2;  // two pixel offset for osd byte address register
 
-wire osd_de = osd_enable && 
+wire osd_de = osd_enable &&
               (HSync != hs_pol) && (h_cnt >= h_osd_start) && (h_cnt < h_osd_end) &&
               (VSync != vs_pol) && (v_cnt >= v_osd_start) && (v_cnt < v_osd_end);
 
-reg  [7:0] osd_byte; 
-always @(posedge clk_sys) if(ce_pix) osd_byte <= osd_buffer[{doublescan ? osd_vcnt[7:5] : osd_vcnt[6:4], osd_hcnt[7:0]}];
+reg [10:0] osd_buffer_addr;
+wire [7:0] osd_byte = osd_buffer[osd_buffer_addr];
+reg        osd_pixel;
 
-wire osd_pixel = osd_byte[doublescan ? osd_vcnt[4:2] : osd_vcnt[3:1]];
+always @(posedge clk_sys) begin
+    if(ce_pix) begin
+		osd_buffer_addr <= rotate[0] ? {rotate[1] ? osd_hcnt_next2[7:5] : ~osd_hcnt_next2[7:5],
+		                                rotate[1] ? (doublescan ? ~osd_vcnt[7:0] : ~{osd_vcnt[6:0], 1'b0}) :
+										            (doublescan ?  osd_vcnt[7:0]  : {osd_vcnt[6:0], 1'b0})} :
+		                               {doublescan ? osd_vcnt[7:5] : osd_vcnt[6:4], osd_hcnt_next2[7:0]};
+
+		osd_pixel <= rotate[0]  ? osd_byte[rotate[1] ? osd_hcnt_next[4:2] : ~osd_hcnt_next[4:2]] :
+		                          osd_byte[doublescan ? osd_vcnt[4:2] : osd_vcnt[3:1]];
+	end
+end
 
 assign R_out = !osd_de ? R_in : {osd_pixel, osd_pixel, OSD_COLOR[2], R_in[5:3]};
 assign G_out = !osd_de ? G_in : {osd_pixel, osd_pixel, OSD_COLOR[1], G_in[5:3]};
diff --git a/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/video_mixer.sv b/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/video_mixer.sv
index 04cfd4ba..126ca276 100644
--- a/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/video_mixer.sv	
+++ b/Arcade_MiST/Scramble Hardware/TheEnd_MiST/rtl/video_mixer.sv	
@@ -50,7 +50,7 @@ module video_mixer
 	input  [1:0] scanlines,
 
 	// 0 = HVSync 31KHz, 1 = CSync 15KHz
-	input        scandoubler_disable,
+	input        scandoublerD,
 
 	// High quality 2x scaling
 	input        hq2x,
@@ -60,7 +60,7 @@ module video_mixer
 
 	// 0 = 16-240 range. 1 = 0-255 range. (only for YPbPr color space)
 	input        ypbpr_full,
-
+	input  [1:0] rotate, //[0] - rotate [1] - left or right
 	// color
 	input [DWIDTH:0] R,
 	input [DWIDTH:0] G,
@@ -113,9 +113,9 @@ scandoubler #(.LENGTH(LINE_LENGTH), .HALF_DEPTH(HALF_DEPTH)) scandoubler
 	.b_out(B_sd)
 );
 
-wire [DWIDTH:0] rt  = (scandoubler_disable ? R : R_sd);
-wire [DWIDTH:0] gt  = (scandoubler_disable ? G : G_sd);
-wire [DWIDTH:0] bt  = (scandoubler_disable ? B : B_sd);
+wire [DWIDTH:0] rt  = (scandoublerD ? R : R_sd);
+wire [DWIDTH:0] gt  = (scandoublerD ? G : G_sd);
+wire [DWIDTH:0] bt  = (scandoublerD ? B : B_sd);
 
 generate
 	if(HALF_DEPTH) begin
@@ -129,8 +129,8 @@ generate
 	end
 endgenerate
 
-wire       hs = (scandoubler_disable ? HSync : hs_sd);
-wire       vs = (scandoubler_disable ? VSync : vs_sd);
+wire       hs = (scandoublerD ? HSync : hs_sd);
+wire       vs = (scandoublerD ? VSync : vs_sd);
 
 reg scanline = 0;
 always @(posedge clk_sys) begin
@@ -182,6 +182,7 @@ osd #(OSD_X_OFFSET, OSD_Y_OFFSET, OSD_COLOR) osd
 	.B_in(b_out),
 	.HSync(hs),
 	.VSync(vs),
+	.rotate(rotate),
 
 	.R_out(red),
 	.G_out(green),
@@ -236,7 +237,7 @@ wire [7:0] pr = (pr_8[17:8] < 16) ? 8'd16 : (pr_8[17:8] > 240) ? 8'd240 : pr_8[1
 assign VGA_R  = ypbpr ? (ypbpr_full ? yuv_full[pr-8'd16] : pr[7:2]) :   red;
 assign VGA_G  = ypbpr ? (ypbpr_full ? yuv_full[y -8'd16] :  y[7:2]) : green;
 assign VGA_B  = ypbpr ? (ypbpr_full ? yuv_full[pb-8'd16] : pb[7:2]) :  blue;
-assign VGA_VS = (scandoubler_disable | ypbpr) ? 1'b1 : ~vs_sd;
-assign VGA_HS = scandoubler_disable ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
+assign VGA_VS = (scandoublerD | ypbpr) ? 1'b1 : ~vs_sd;
+assign VGA_HS = scandoublerD ? ~(HSync ^ VSync) : ypbpr ? ~(hs_sd ^ vs_sd) : ~hs_sd;
 
 endmodule