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Code Issues Releases Wiki Activity

Bugfix Controls by Dar

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This commit is contained in:
Gehstock
2019-11-13 23:12:02 +01:00
parent e7ec22c1e5
commit 23b68ea072
9 changed files with 70 additions and 151 deletions
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BIN
Arcade_MiST/Midway MCR 2/SatansHollow_MiST/Release/SatansHollow.rbf
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4
Arcade_MiST/Midway MCR 2/SatansHollow_MiST/rtl/SatansHollow_MiST.sv
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@@ -54,7 +54,7 @@ localparam CONF_STR = {
"O5,Blend,Off,On;", "O5,Blend,Off,On;",
"O6,Service,Off,On;", "O6,Service,Off,On;",
"T0,Reset;", "T0,Reset;",
"V,v1.0.",`BUILD_DATE "V,v1.1.",`BUILD_DATE
}; };
assign LED = ~ioctl_downl; assign LED = ~ioctl_downl;
@@ -194,7 +194,7 @@ satans_hollow satans_hollow(
.cocktail(0), .cocktail(0),
.coin_meters(), .coin_meters(),
.service_toggle(status[6]), .service(status[6]),
.cpu_rom_addr ( rom_addr ), .cpu_rom_addr ( rom_addr ),
.cpu_rom_do ( rom_addr[0] ? rom_do[15:8] : rom_do[7:0] ), .cpu_rom_do ( rom_addr[0] ? rom_do[15:8] : rom_do[7:0] ),
.cpu_rom_rd ( rom_rd ), .cpu_rom_rd ( rom_rd ),

103
Arcade_MiST/Midway MCR 2/SatansHollow_MiST/rtl/satans_hollow.vhd
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@@ -161,7 +161,7 @@ port(
cocktail : in std_logic; cocktail : in std_logic;
coin_meters : in std_logic; coin_meters : in std_logic;
service_toggle : in std_logic; service : in std_logic;
dbg_cpu_addr : out std_logic_vector(15 downto 0); dbg_cpu_addr : out std_logic_vector(15 downto 0);
cpu_rom_addr : out std_logic_vector(15 downto 0); cpu_rom_addr : out std_logic_vector(15 downto 0);
@@ -238,12 +238,10 @@ architecture struct of satans_hollow is
signal bg_code : std_logic_vector(7 downto 0); signal bg_code : std_logic_vector(7 downto 0);
signal bg_code_r : std_logic_vector(7 downto 0); signal bg_code_r : std_logic_vector(7 downto 0);
signal bg_attr : std_logic_vector(7 downto 0); signal bg_attr : std_logic_vector(7 downto 0);
--signal bg_attr_r : std_logic_vector(7 downto 0);
signal bg_code_line : std_logic_vector(12 downto 0); signal bg_code_line : std_logic_vector(12 downto 0);
signal bg_graphx1_do : std_logic_vector( 7 downto 0); signal bg_graphx1_do : std_logic_vector( 7 downto 0);
signal bg_graphx2_do : std_logic_vector( 7 downto 0); signal bg_graphx2_do : std_logic_vector( 7 downto 0);
--signal bg_vid : std_logic_vector( 3 downto 0);
signal bg_palette_addr : std_logic_vector( 5 downto 0); signal bg_palette_addr : std_logic_vector( 5 downto 0);
signal sp_ram_cache_addr : std_logic_vector(8 downto 0); signal sp_ram_cache_addr : std_logic_vector(8 downto 0);
@@ -305,9 +303,6 @@ architecture struct of satans_hollow is
signal input_1 : std_logic_vector(7 downto 0); signal input_1 : std_logic_vector(7 downto 0);
signal input_2 : std_logic_vector(7 downto 0); signal input_2 : std_logic_vector(7 downto 0);
signal input_3 : std_logic_vector(7 downto 0); signal input_3 : std_logic_vector(7 downto 0);
signal service_toggle_r : std_logic;
signal service : std_logic;
begin begin
@@ -315,13 +310,6 @@ clock_vid <= clock_40;
clock_vidn <= not clock_40; clock_vidn <= not clock_40;
reset_n <= not reset; reset_n <= not reset;
-- debug
process (reset, clock_vid)
begin
if rising_edge(clock_vid) and cpu_ena ='1' and cpu_mreq_n ='0' then
dbg_cpu_addr<= "000000000000000"&service; --cpu_addr;
end if;
end process;
-- make enables clock from clock_vid -- make enables clock from clock_vid
process (clock_vid, reset) process (clock_vid, reset)
@@ -376,32 +364,6 @@ begin
video_blankn <= '0'; video_blankn <= '0';
if hcnt >= 2+16 and hcnt < 514+16 and if hcnt >= 2+16 and hcnt < 514+16 and
vcnt >= 2 and vcnt < 481 then video_blankn <= '1';end if; vcnt >= 2 and vcnt < 481 then video_blankn <= '1';end if;
-- -- test pattern
--
-- video_blankn <= '1';
--
-- video_r <= "0000";
-- video_g <= "0000";
-- video_b <= "0000";
--
-- if hcnt >= 0 and hcnt < 512 and
-- vcnt >= 0 and vcnt < 480 then video_b <= "0100"; end if;
--
-- if hcnt >= 1 and hcnt < 511 and
-- vcnt >= 1 and vcnt < 479 then video_r <= "0100"; end if;
--
-- if hcnt >= 0 and hcnt < 512 and
-- vcnt >= 0 and vcnt < 480 then video_g <= "0100"; end if;
--
-- if hcnt >= 0 and hcnt < 512 and
-- vcnt >= 0 and vcnt < 480 and
-- hcnt(5 downto 0) = vcnt(5 downto 0) then
-- video_r <= "1100";
-- video_g <= "1100";
-- video_b <= "1100";
-- end if;
end if; end if;
end if; end if;
end if; end if;
@@ -417,36 +379,21 @@ input_1 <= not fire1_c & not fire2_c & not right_c & not left_c & not fire1 & no
input_2 <= x"FF"; input_2 <= x"FF";
input_3 <= "111111" & cocktail & coin_meters; input_3 <= "111111" & cocktail & coin_meters;
process (clock_vid, reset)
begin
if reset = '1' then
service <= '0';
else
if rising_edge(clock_vid) then
service_toggle_r <= service_toggle;
if service_toggle_r = '0' and service_toggle ='1' then
service <= not service;
end if;
end if;
end if;
end process;
------------------------------------------ ------------------------------------------
-- cpu data input with address decoding -- -- cpu data input with address decoding --
------------------------------------------ ------------------------------------------
cpu_di <= cpu_rom_do when cpu_mreq_n = '0' and cpu_addr(15 downto 12) < X"C" else -- 0000-BFFF cpu_di <= cpu_rom_do when cpu_mreq_n = '0' and cpu_addr(15 downto 12) < X"C" else -- 0000-BFFF
wram_do when cpu_mreq_n = '0' and cpu_addr(15 downto 13) = "110" else -- C000-C7FF/C800-CFFF/D000-D7FF/D800-DFFF wram_do when cpu_mreq_n = '0' and (cpu_addr and X"E000") = x"C000" else -- C000-C7FF + mirroring 1800
sp_ram_cache_do when cpu_mreq_n = '0' and cpu_addr(15 downto 11) = "11110" else -- sprite ram F000-F1FF + mirroring adresses sp_ram_cache_do when cpu_mreq_n = '0' and (cpu_addr and x"E800") = x"E000" else -- sprite ram E000-E1FF + mirroring 1600
bg_ram_do_r when cpu_mreq_n = '0' and cpu_addr(15 downto 11) = "11111" else -- video ram F800-FFFF + mirroring adresses bg_ram_do_r when cpu_mreq_n = '0' and (cpu_addr and x"E800") = x"E800" else -- video ram E800-EFFF + mirroring 1000
ctc_controler_do when cpu_ioreq_n = '0' and cpu_m1_n = '0' else -- ctc ctrl (interrupt vector) ctc_controler_do when cpu_ioreq_n = '0' and cpu_m1_n = '0' else -- ctc ctrl (interrupt vector)
ssio_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 4) = X"0" else ssio_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 5) = "000" else -- 0x00-0x1F
ctc_counter_3_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F3" else ctc_counter_3_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F3" else
ctc_counter_2_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F2" else ctc_counter_2_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F2" else
ctc_counter_1_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F1" else ctc_counter_1_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F1" else
ctc_counter_0_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F0" else ctc_counter_0_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F0" else
X"FF"; X"FF";
------------------------------------------------------------------------ ------------------------------------------------------------------------
-- Misc registers : ctc write enable / interrupt acknowledge -- Misc registers : ctc write enable / interrupt acknowledge
@@ -462,10 +409,10 @@ ctc_int_ack <= '1' when cpu_ioreq_n = '0' and cpu_m1_n = '0' else '0';
------------------------------------------ ------------------------------------------
-- write enable / ram access from CPU -- -- write enable / ram access from CPU --
------------------------------------------ ------------------------------------------
wram_we <= '1' when cpu_mreq_n = '0' and cpu_wr_n = '0' and cpu_addr(15 downto 12) = X"C" else '0'; wram_we <= '1' when cpu_mreq_n = '0' and cpu_wr_n = '0' and (cpu_addr and x"E000") = x"C000" else '0';
sp_ram_cache_we <= '1' when cpu_mreq_n = '0' and cpu_wr_n = '0' and cpu_addr(15 downto 11) = "11110" else '0'; sp_ram_cache_we <= '1' when cpu_mreq_n = '0' and cpu_wr_n = '0' and (cpu_addr and x"E800") = x"E000" else '0';
sp_ram_cache_cpu_access <= '1' when cpu_mreq_n = '0' and (cpu_wr_n = '0' or cpu_rd_n = '0') and cpu_addr(15 downto 11) = "11110" else '0'; sp_ram_cache_cpu_access <= '1' when cpu_mreq_n = '0' and (cpu_wr_n = '0' or cpu_rd_n = '0') and (cpu_addr and x"E800") = x"E000" else '0';
bg_ram_cpu_access <= '1' when cpu_mreq_n = '0' and (cpu_wr_n = '0' or cpu_rd_n = '0') and cpu_addr(15 downto 11) = "11111" and hcnt(0) = '0' else '0'; bg_ram_cpu_access <= '1' when cpu_mreq_n = '0' and (cpu_wr_n = '0' or cpu_rd_n = '0') and (cpu_addr and x"E800") = x"E800" and hcnt(0) = '0' else '0';
bg_ram_we <= '1' when bg_ram_cpu_access = '1' and cpu_wr_n = '0' else '0'; bg_ram_we <= '1' when bg_ram_cpu_access = '1' and cpu_wr_n = '0' else '0';
ssio_iowe <= '1' when cpu_wr_n = '0' and cpu_ioreq_n = '0' else '0'; ssio_iowe <= '1' when cpu_wr_n = '0' and cpu_ioreq_n = '0' else '0';
@@ -586,26 +533,15 @@ begin
if hcnt(0) = '0' then bg_ram_do_r <= bg_ram_do; end if; if hcnt(0) = '0' then bg_ram_do_r <= bg_ram_do; end if;
if pix_ena = '1' then if pix_ena = '1' then
-- if hcnt(3 downto 0) = "1101" then
-- bg_code <= bg_ram_do;
-- end if;
--
-- if hcnt(3 downto 0) = "1111" then
-- bg_code_r <= bg_code;
-- bg_attr <= bg_ram_do;
-- end if;
if hcnt(0) = '1' then if hcnt(0) = '1' then
case hcnt(3 downto 1) is case hcnt(3 downto 1) is
when "110" => bg_code <= bg_ram_do; when "110" => bg_code <= bg_ram_do;
when "111" => bg_attr <= bg_ram_do; when "111" => bg_attr <= bg_ram_do;
bg_code_r <= bg_code; bg_code_r <= bg_code;
when others => null; when others => null;
end case; end case;
case hcnt(2 downto 1) xor (bg_attr(1) & bg_attr(1)) is
case hcnt(2 downto 1) is
when "00" => bg_palette_addr <= bg_attr(4 downto 3) & bg_graphx2_do(7 downto 6) & bg_graphx1_do(7 downto 6); when "00" => bg_palette_addr <= bg_attr(4 downto 3) & bg_graphx2_do(7 downto 6) & bg_graphx1_do(7 downto 6);
when "01" => bg_palette_addr <= bg_attr(4 downto 3) & bg_graphx2_do(5 downto 4) & bg_graphx1_do(5 downto 4); when "01" => bg_palette_addr <= bg_attr(4 downto 3) & bg_graphx2_do(5 downto 4) & bg_graphx1_do(5 downto 4);
when "10" => bg_palette_addr <= bg_attr(4 downto 3) & bg_graphx2_do(3 downto 2) & bg_graphx1_do(3 downto 2); when "10" => bg_palette_addr <= bg_attr(4 downto 3) & bg_graphx2_do(3 downto 2) & bg_graphx1_do(3 downto 2);
@@ -883,6 +819,7 @@ port map(
input_1 => input_1, input_1 => input_1,
input_2 => input_2, input_2 => input_2,
input_3 => input_3, input_3 => input_3,
input_4 => x"FF",
separate_audio => separate_audio, separate_audio => separate_audio,
audio_out_l => audio_out_l, audio_out_l => audio_out_l,

16
Arcade_MiST/Midway MCR 2/SatansHollow_MiST/rtl/satans_hollow_sound_board.vhd
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@@ -67,7 +67,7 @@ port(
input_1 : in std_logic_vector(7 downto 0); input_1 : in std_logic_vector(7 downto 0);
input_2 : in std_logic_vector(7 downto 0); input_2 : in std_logic_vector(7 downto 0);
input_3 : in std_logic_vector(7 downto 0); input_3 : in std_logic_vector(7 downto 0);
input_4 : in std_logic_vector(7 downto 0);
separate_audio : in std_logic; separate_audio : in std_logic;
audio_out_l : out std_logic_vector(15 downto 0); audio_out_l : out std_logic_vector(15 downto 0);
@@ -238,13 +238,13 @@ ay1_bc1 <= not (not ay1_cs or cpu_addr(1) );
ay2_bdir <= not (not ay2_cs or cpu_addr(0) ); ay2_bdir <= not (not ay2_cs or cpu_addr(0) );
ay2_bc1 <= not (not ay2_cs or cpu_addr(1) ); ay2_bc1 <= not (not ay2_cs or cpu_addr(1) );
ssio_do <= input_0 when main_cpu_addr = X"00" else -- Input 0 -- players, coins, ... ssio_do <= input_0 when main_cpu_addr(2 downto 0) = "000" else -- Input 0 -- players, coins, ...
input_1 when main_cpu_addr = X"01" else -- Input 1 input_1 when main_cpu_addr(2 downto 0) = "001" else -- Input 1
input_2 when main_cpu_addr = X"02" else -- Input 2 input_2 when main_cpu_addr(2 downto 0) = "010" else -- Input 2
input_3 when main_cpu_addr = X"03" else -- Input 3 -- sw1 dip input_3 when main_cpu_addr(2 downto 0) = "011" else -- Input 3 -- sw1 dip
x"FF" when main_cpu_addr = X"04" else -- Input 4 -- sw2 dip input_4 when main_cpu_addr(2 downto 0) = "100" else -- Input 4
ssio_status when main_cpu_addr = X"07" else -- ssio status ssio_status when main_cpu_addr(2 downto 0) = "111" else -- ssio status
x"FF"; x"FF";
process (clock_snd) process (clock_snd)
begin begin

7
Arcade_MiST/Midway MCR 2/Tron_MiST/README.txt
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@@ -1,17 +1,18 @@
--------------------------------------------------------------------------------- ---------------------------------------------------------------------------------
-- --
-- Arcade: SatansHollow port to MiST by Gehstock -- Arcade: Tron port to MiST by Gehstock
-- 13 November 2019 -- 13 November 2019
-- --
-- VGA Only -- VGA Only
Controls
Coin : ESC Coin : ESC
Start : F1 or F2 Start : F1 or F2
Aim : Button F and G Aim : Button F and G
Movement : Joystick or Arrow Keys Movement : Joystick or Arrow Keys
Fire : Fire Button or Space Fire : Fire Button or Space
-- Some Controls needs a Fix
--------------------------------------------------------------------------------- ---------------------------------------------------------------------------------
-- DE10_lite Top level for Kick (Midway MCR) by Dar (darfpga@aol.fr) (19/10/2019) -- DE10_lite Top level for Kick (Midway MCR) by Dar (darfpga@aol.fr) (19/10/2019)
-- http://darfpga.blogspot.fr -- http://darfpga.blogspot.fr

BIN
Arcade_MiST/Midway MCR 2/Tron_MiST/Release/Tron.rbf
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2
Arcade_MiST/Midway MCR 2/Tron_MiST/rtl/Tron_MiST.sv
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@@ -55,7 +55,7 @@ localparam CONF_STR = {
"O6,Service,Off,On;", "O6,Service,Off,On;",
"O7,Allow Continue,Off,On;", "O7,Allow Continue,Off,On;",
"T0,Reset;", "T0,Reset;",
"V,v1.0.",`BUILD_DATE "V,v1.1.",`BUILD_DATE
}; };
assign LED = ~ioctl_downl; assign LED = ~ioctl_downl;

75
Arcade_MiST/Midway MCR 2/Tron_MiST/rtl/satans_hollow.vhd
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@@ -2,6 +2,13 @@
-- Tron by Dar (darfpga@aol.fr) (09/11/2019) -- Tron by Dar (darfpga@aol.fr) (09/11/2019)
-- http://darfpga.blogspot.fr -- http://darfpga.blogspot.fr
--------------------------------------------------------------------------------- ---------------------------------------------------------------------------------
--
-- release 01 : improve ssio read input (fix mirror addressing)
-- improve memory access (fix mirror addressing)
--
-- release 00 : initial release
--
---------------------------------------------------------------------------------
-- gen_ram.vhd & io_ps2_keyboard -- gen_ram.vhd & io_ps2_keyboard
-------------------------------- --------------------------------
-- Copyright 2005-2008 by Peter Wendrich (pwsoft@syntiac.com) -- Copyright 2005-2008 by Peter Wendrich (pwsoft@syntiac.com)
@@ -26,12 +33,12 @@
-- Coctail mode : NO -- Coctail mode : NO
-- Sound : OK -- Sound : OK
-- Use with MAME roms from shollow.zip -- Use with MAME roms from tron.zip
-- --
-- Use make_satans_hollow_proms.bat to build vhd file from binaries -- Use make_tron_hollow_proms.bat to build vhd file from binaries
-- (CRC list included) -- (CRC list included)
-- Satans hollow (midway mcr) Hardware caracteristics : -- Tron (midway mcr) Hardware caracteristics :
-- --
-- VIDEO : 1xZ80@3MHz CPU accessing its program rom, working ram, -- VIDEO : 1xZ80@3MHz CPU accessing its program rom, working ram,
-- sprite data ram, I/O, sound board register and trigger. -- sprite data ram, I/O, sound board register and trigger.
@@ -51,7 +58,7 @@
-- Sprites line buffer rams : 1 scan line delay flip/flop 2x256x8bits -- Sprites line buffer rams : 1 scan line delay flip/flop 2x256x8bits
-- --
-- SOUND : see satans_hollow_sound_board.vhd -- SOUND : see tron_hollow_sound_board.vhd
--------------------------------------------------------------------------------- ---------------------------------------------------------------------------------
-- Schematics remarks : -- Schematics remarks :
@@ -120,6 +127,7 @@
-- --
--------------------------------------------------------------------------------- ---------------------------------------------------------------------------------
library ieee; library ieee;
use ieee.std_logic_1164.all; use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all; use ieee.std_logic_unsigned.all;
@@ -156,6 +164,7 @@ port(
buttonf : in std_logic; buttonf : in std_logic;
buttong : in std_logic; buttong : in std_logic;
buttont : in std_logic; buttont : in std_logic;
left_c : in std_logic; left_c : in std_logic;
right_c : in std_logic; right_c : in std_logic;
up_c : in std_logic; up_c : in std_logic;
@@ -243,12 +252,10 @@ architecture struct of satans_hollow is
signal bg_code : std_logic_vector(7 downto 0); signal bg_code : std_logic_vector(7 downto 0);
signal bg_code_r : std_logic_vector(7 downto 0); signal bg_code_r : std_logic_vector(7 downto 0);
signal bg_attr : std_logic_vector(7 downto 0); signal bg_attr : std_logic_vector(7 downto 0);
--signal bg_attr_r : std_logic_vector(7 downto 0);
signal bg_code_line : std_logic_vector(12 downto 0); signal bg_code_line : std_logic_vector(12 downto 0);
signal bg_graphx1_do : std_logic_vector( 7 downto 0); signal bg_graphx1_do : std_logic_vector( 7 downto 0);
signal bg_graphx2_do : std_logic_vector( 7 downto 0); signal bg_graphx2_do : std_logic_vector( 7 downto 0);
--signal bg_vid : std_logic_vector( 3 downto 0);
signal bg_palette_addr : std_logic_vector( 5 downto 0); signal bg_palette_addr : std_logic_vector( 5 downto 0);
signal sp_ram_cache_addr : std_logic_vector(8 downto 0); signal sp_ram_cache_addr : std_logic_vector(8 downto 0);
@@ -397,32 +404,6 @@ begin
video_blankn <= '0'; video_blankn <= '0';
if hcnt >= 2+16 and hcnt < 514+16 and if hcnt >= 2+16 and hcnt < 514+16 and
vcnt >= 2 and vcnt < 481 then video_blankn <= '1';end if; vcnt >= 2 and vcnt < 481 then video_blankn <= '1';end if;
-- -- test pattern
--
-- video_blankn <= '1';
--
-- video_r <= "0000";
-- video_g <= "0000";
-- video_b <= "0000";
--
-- if hcnt >= 0 and hcnt < 512 and
-- vcnt >= 0 and vcnt < 480 then video_b <= "0100"; end if;
--
-- if hcnt >= 1 and hcnt < 511 and
-- vcnt >= 1 and vcnt < 479 then video_r <= "0100"; end if;
--
-- if hcnt >= 0 and hcnt < 512 and
-- vcnt >= 0 and vcnt < 480 then video_g <= "0100"; end if;
--
-- if hcnt >= 0 and hcnt < 512 and
-- vcnt >= 0 and vcnt < 480 and
-- hcnt(5 downto 0) = vcnt(5 downto 0) then
-- video_r <= "1100";
-- video_g <= "1100";
-- video_b <= "1100";
-- end if;
end if; end if;
end if; end if;
end if; end if;
@@ -441,17 +422,17 @@ input_4 <= '1' & angle_c;
------------------------------------------ ------------------------------------------
-- cpu data input with address decoding -- -- cpu data input with address decoding --
------------------------------------------ ------------------------------------------
cpu_di <= cpu_rom_do when cpu_mreq_n = '0' and cpu_addr(15 downto 12) < X"C" else -- 0000-BFFF cpu_di <= cpu_rom_do when cpu_mreq_n = '0' and cpu_addr(15 downto 12) < X"C" else -- 0000-BFFF
wram_do when cpu_mreq_n = '0' and cpu_addr(15 downto 13) = "110" else -- C000-C7FF/C800-CFFF/D000-D7FF/D800-DFFF wram_do when cpu_mreq_n = '0' and (cpu_addr and X"E000") = x"C000" else -- C000-C7FF + mirroring 1800
sp_ram_cache_do when cpu_mreq_n = '0' and cpu_addr(15 downto 11) = "11110" else -- sprite ram F000-F1FF + mirroring adresses sp_ram_cache_do when cpu_mreq_n = '0' and (cpu_addr and x"E800") = x"E000" else -- sprite ram E000-E1FF + mirroring 1600
bg_ram_do_r when cpu_mreq_n = '0' and cpu_addr(15 downto 11) = "11111" else -- video ram F800-FFFF + mirroring adresses bg_ram_do_r when cpu_mreq_n = '0' and (cpu_addr and x"E800") = x"E800" else -- video ram E800-EFFF + mirroring 1000
ctc_controler_do when cpu_ioreq_n = '0' and cpu_m1_n = '0' else -- ctc ctrl (interrupt vector) ctc_controler_do when cpu_ioreq_n = '0' and cpu_m1_n = '0' else -- ctc ctrl (interrupt vector)
ssio_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 4) = X"0" else ssio_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 5) = "000" else -- 0x00-0x1F
ctc_counter_3_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F3" else ctc_counter_3_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F3" else
ctc_counter_2_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F2" else ctc_counter_2_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F2" else
ctc_counter_1_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F1" else ctc_counter_1_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F1" else
ctc_counter_0_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F0" else ctc_counter_0_do when cpu_ioreq_n = '0' and cpu_addr(7 downto 0) = X"F0" else
X"FF"; X"FF";
------------------------------------------------------------------------ ------------------------------------------------------------------------
-- Misc registers : ctc write enable / interrupt acknowledge -- Misc registers : ctc write enable / interrupt acknowledge
@@ -467,10 +448,10 @@ ctc_int_ack <= '1' when cpu_ioreq_n = '0' and cpu_m1_n = '0' else '0';
------------------------------------------ ------------------------------------------
-- write enable / ram access from CPU -- -- write enable / ram access from CPU --
------------------------------------------ ------------------------------------------
wram_we <= '1' when cpu_mreq_n = '0' and cpu_wr_n = '0' and cpu_addr(15 downto 12) = X"C" else '0'; wram_we <= '1' when cpu_mreq_n = '0' and cpu_wr_n = '0' and (cpu_addr and x"E000") = x"C000" else '0';
sp_ram_cache_we <= '1' when cpu_mreq_n = '0' and cpu_wr_n = '0' and cpu_addr(15 downto 11) = "11110" else '0'; sp_ram_cache_we <= '1' when cpu_mreq_n = '0' and cpu_wr_n = '0' and (cpu_addr and x"E800") = x"E000" else '0';
sp_ram_cache_cpu_access <= '1' when cpu_mreq_n = '0' and (cpu_wr_n = '0' or cpu_rd_n = '0') and cpu_addr(15 downto 11) = "11110" else '0'; sp_ram_cache_cpu_access <= '1' when cpu_mreq_n = '0' and (cpu_wr_n = '0' or cpu_rd_n = '0') and (cpu_addr and x"E800") = x"E000" else '0';
bg_ram_cpu_access <= '1' when cpu_mreq_n = '0' and (cpu_wr_n = '0' or cpu_rd_n = '0') and cpu_addr(15 downto 11) = "11111" and hcnt(0) = '0' else '0'; bg_ram_cpu_access <= '1' when cpu_mreq_n = '0' and (cpu_wr_n = '0' or cpu_rd_n = '0') and (cpu_addr and x"E800") = x"E800" and hcnt(0) = '0' else '0';
bg_ram_we <= '1' when bg_ram_cpu_access = '1' and cpu_wr_n = '0' else '0'; bg_ram_we <= '1' when bg_ram_cpu_access = '1' and cpu_wr_n = '0' else '0';
ssio_iowe <= '1' when cpu_wr_n = '0' and cpu_ioreq_n = '0' else '0'; ssio_iowe <= '1' when cpu_wr_n = '0' and cpu_ioreq_n = '0' else '0';

14
Arcade_MiST/Midway MCR 2/Tron_MiST/rtl/satans_hollow_sound_board.vhd
View File

@@ -238,14 +238,14 @@ ay1_bc1 <= not (not ay1_cs or cpu_addr(1) );
ay2_bdir <= not (not ay2_cs or cpu_addr(0) ); ay2_bdir <= not (not ay2_cs or cpu_addr(0) );
ay2_bc1 <= not (not ay2_cs or cpu_addr(1) ); ay2_bc1 <= not (not ay2_cs or cpu_addr(1) );
ssio_do <= input_0 when main_cpu_addr = X"00" else -- Input 0 -- players, coins, ... ssio_do <= input_0 when main_cpu_addr(2 downto 0) = "000" else -- Input 0 -- players, coins, ...
input_1 when main_cpu_addr = X"01" else -- Input 1 input_1 when main_cpu_addr(2 downto 0) = "001" else -- Input 1
input_2 when main_cpu_addr = X"02" else -- Input 2 input_2 when main_cpu_addr(2 downto 0) = "010" else -- Input 2
input_3 when main_cpu_addr = X"03" else -- Input 3 -- sw1 dip input_3 when main_cpu_addr(2 downto 0) = "011" else -- Input 3 -- sw1 dip
input_4 when main_cpu_addr = X"04" else -- Input 4 input_4 when main_cpu_addr(2 downto 0) = "100" else -- Input 4
ssio_status when main_cpu_addr = X"07" else -- ssio status ssio_status when main_cpu_addr(2 downto 0) = "111" else -- ssio status
x"FF"; x"FF";
process (clock_snd) process (clock_snd)
begin begin
if rising_edge(clock_snd) then if rising_edge(clock_snd) then