From 3466975bc4dd11cd7d658e8d444f6a76937931d2 Mon Sep 17 00:00:00 2001 From: Marcel Date: Sat, 20 Jun 2020 11:29:58 +0200 Subject: [PATCH] Create syn_ram-e.vhd --- common/CPU/t48/syn_ram-e.vhd | 73 ++++++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 common/CPU/t48/syn_ram-e.vhd diff --git a/common/CPU/t48/syn_ram-e.vhd b/common/CPU/t48/syn_ram-e.vhd new file mode 100644 index 00000000..45059493 --- /dev/null +++ b/common/CPU/t48/syn_ram-e.vhd @@ -0,0 +1,73 @@ +------------------------------------------------------------------------------- +-- +-- A synchronous parametrizable RAM. +-- +-- $Id: syn_ram-e.vhd,v 1.1 2004/03/24 21:32:27 arniml Exp $ +-- +-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org) +-- +-- All rights reserved +-- +-- Redistribution and use in source and synthezised forms, with or without +-- modification, are permitted provided that the following conditions are met: +-- +-- Redistributions of source code must retain the above copyright notice, +-- this list of conditions and the following disclaimer. +-- +-- Redistributions in synthesized form must reproduce the above copyright +-- notice, this list of conditions and the following disclaimer in the +-- documentation and/or other materials provided with the distribution. +-- +-- Neither the name of the author nor the names of other contributors may +-- be used to endorse or promote products derived from this software without +-- specific prior written permission. +-- +-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +-- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, +-- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +-- PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE +-- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +-- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +-- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +-- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +-- POSSIBILITY OF SUCH DAMAGE. +-- +-- Please report bugs to the author, but before you do so, please +-- make sure that this is not a derivative work and that +-- you have the latest version of this file. +-- +-- The latest version of this file can be found at: +-- http://www.opencores.org/cvsweb.shtml/t48/ +-- +------------------------------------------------------------------------------- + +library ieee; +use ieee.std_logic_1164.all; + +entity syn_ram is + + generic ( + address_width_g : positive := 8 + ); + port ( + clk_i : in std_logic; + res_i : in std_logic; + ram_addr_i : in std_logic_vector(address_width_g-1 downto 0); + ram_data_i : in std_logic_vector(7 downto 0); + ram_we_i : in std_logic; + ram_data_o : out std_logic_vector(7 downto 0) + ); + +end syn_ram; + + +------------------------------------------------------------------------------- +-- File History: +-- +-- $Log: syn_ram-e.vhd,v $ +-- Revision 1.1 2004/03/24 21:32:27 arniml +-- initial check-in +-- +-------------------------------------------------------------------------------