diff --git a/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/DKong.sdc b/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/DKong.sdc index f91c127c..9cdf191c 100644 --- a/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/DKong.sdc +++ b/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/DKong.sdc @@ -53,6 +53,9 @@ set_time_format -unit ns -decimal_places 3 create_clock -name {SPI_SCK} -period 41.666 -waveform { 20.8 41.666 } [get_ports {SPI_SCK}] +set sys_clk "pll|altpll_component|auto_generated|pll1|clk[1]" +set sdram_clk "pll|altpll_component|auto_generated|pll1|clk[0]" + #************************************************************** # Create Generated Clock #************************************************************** @@ -72,22 +75,28 @@ create_clock -name {SPI_SCK} -period 41.666 -waveform { 20.8 41.666 } [get_port # Set Input Delay #************************************************************** -set_input_delay -add_delay -clock_fall -clock [get_clocks {CLOCK_27}] 1.000 [get_ports {CLOCK_27}] +set_input_delay -add_delay -clock_fall -clock [get_clocks {CLOCK_27}] 1.000 [get_ports {CLOCK_27}] set_input_delay -add_delay -clock_fall -clock [get_clocks {SPI_SCK}] 1.000 [get_ports {CONF_DATA0}] set_input_delay -add_delay -clock_fall -clock [get_clocks {SPI_SCK}] 1.000 [get_ports {SPI_DI}] set_input_delay -add_delay -clock_fall -clock [get_clocks {SPI_SCK}] 1.000 [get_ports {SPI_SCK}] set_input_delay -add_delay -clock_fall -clock [get_clocks {SPI_SCK}] 1.000 [get_ports {SPI_SS2}] set_input_delay -add_delay -clock_fall -clock [get_clocks {SPI_SCK}] 1.000 [get_ports {SPI_SS3}] +set_input_delay -clock [get_clocks $sdram_clk] -reference_pin [get_ports {SDRAM_CLK}] -max 6.6 [get_ports SDRAM_DQ[*]] +set_input_delay -clock [get_clocks $sdram_clk] -reference_pin [get_ports {SDRAM_CLK}] -min 3.5 [get_ports SDRAM_DQ[*]] + #************************************************************** # Set Output Delay #************************************************************** -set_output_delay -add_delay -clock_fall -clock [get_clocks {SPI_SCK}] 1.000 [get_ports {SPI_DO}] -set_output_delay -add_delay -clock_fall -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] 1.000 [get_ports {AUDIO_L}] -set_output_delay -add_delay -clock_fall -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] 1.000 [get_ports {AUDIO_R}] -set_output_delay -add_delay -clock_fall -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] 1.000 [get_ports {LED}] -set_output_delay -add_delay -clock_fall -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] 1.000 [get_ports {VGA_*}] +set_output_delay -add_delay -clock_fall -clock [get_clocks {SPI_SCK}] 1.000 [get_ports {SPI_DO}] +set_output_delay -add_delay -clock_fall -clock [get_clocks $sys_clk] 1.000 [get_ports {AUDIO_L}] +set_output_delay -add_delay -clock_fall -clock [get_clocks $sys_clk] 1.000 [get_ports {AUDIO_R}] +set_output_delay -add_delay -clock_fall -clock [get_clocks $sys_clk] 1.000 [get_ports {LED}] +set_output_delay -add_delay -clock_fall -clock [get_clocks $sys_clk] 1.000 [get_ports {VGA_*}] + +set_output_delay -clock [get_clocks $sdram_clk] -reference_pin [get_ports {SDRAM_CLK}] -max 1.5 [get_ports {SDRAM_D* SDRAM_A* SDRAM_BA* SDRAM_n* SDRAM_CKE}] +set_output_delay -clock [get_clocks $sdram_clk] -reference_pin [get_ports {SDRAM_CLK}] -min -0.8 [get_ports {SDRAM_D* SDRAM_A* SDRAM_BA* SDRAM_n* SDRAM_CKE}] #************************************************************** # Set Clock Groups diff --git a/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_MiST.sv b/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_MiST.sv index 478c5010..72dd3647 100644 --- a/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_MiST.sv +++ b/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_MiST.sv @@ -48,14 +48,15 @@ wire landscape = core_mod[3]; assign LED = ~ioctl_downl; assign AUDIO_R = AUDIO_L; -assign SDRAM_CLK = clock_24; +assign SDRAM_CLK = clock_48; assign SDRAM_CKE = 1; -wire pll_locked,clock_24; +wire pll_locked,clock_24,clock_48; pll pll( .locked(pll_locked), .inclk0(CLOCK_27), - .c0(clock_24)//W_CLK_24576M + .c0(clock_48), + .c1(clock_24)//W_CLK_24576M ); wire [15:0] main_rom_a; @@ -72,7 +73,7 @@ wire [24:0] ioctl_addr; wire [7:0] ioctl_dout; data_io data_io( - .clk_sys ( clock_24 ), + .clk_sys ( clock_48 ), .SPI_SCK ( SPI_SCK ), .SPI_SS2 ( SPI_SS2 ), .SPI_DI ( SPI_DI ), @@ -84,10 +85,10 @@ data_io data_io( ); reg port1_req, port2_req; -sdram #(24) sdram( +sdram #(48) sdram( .*, .init_n ( pll_locked ), - .clk ( clock_24 ), + .clk ( clock_48 ), .port1_req ( port1_req ), .port1_ack ( ), @@ -116,7 +117,7 @@ sdram #(24) sdram( ); // ROM download controller -always @(posedge clock_24) begin +always @(posedge clock_48) begin reg ioctl_wr_last = 0; ioctl_wr_last <= ioctl_wr; @@ -173,6 +174,7 @@ dkong_top dkong( .O_VGA_H_SYNCn(hs_n), .O_VGA_V_SYNCn(vs_n), + .DL_CLK(clock_48), .DL_ADDR(ioctl_addr[15:0]), .DL_WR(ioctl_wr && ioctl_addr[23:16] == 0), .DL_DATA(ioctl_dout), diff --git a/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_col_pal.v b/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_col_pal.v index 5c73205f..f1c9175d 100644 --- a/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_col_pal.v +++ b/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_col_pal.v @@ -29,6 +29,7 @@ module dkong_col_pal( output [3:0]O_G, output [3:0]O_B, + input DL_CLK, input [15:0] DL_ADDR, input DL_WR, input [7:0] DL_DATA @@ -63,7 +64,7 @@ dpram #(9,8) col1 ( .address_a(W_1EF_Q[9:2]), .q_a(W_2F_DO), - .clock_b(CLK_24M), + .clock_b(DL_CLK), .address_b(DL_ADDR[7:0]), .wren_b(DL_WR && DL_ADDR[15:9] == {4'hF, 3'b001}), .data_b(DL_DATA) @@ -80,7 +81,7 @@ dpram #(9,8) col2 ( .address_a(W_1EF_Q[9:2]), .q_a(W_2E_DO), - .clock_b(CLK_24M), + .clock_b(DL_CLK), .address_b(DL_ADDR[7:0]), .wren_b(DL_WR && DL_ADDR[15:9] == {4'hF, 3'b000}), .data_b(DL_DATA) diff --git a/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_obj.v b/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_obj.v index 3d3900c0..d34d7a65 100644 --- a/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_obj.v +++ b/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_obj.v @@ -49,6 +49,7 @@ module dkong_obj( output O_FLIP_HV, output O_L_CMPBLKn, + input DL_CLK, input [15:0] DL_ADDR, input DL_WR, input [7:0] DL_DATA @@ -329,7 +330,7 @@ dpram #(12,8) obj1 ( .address_a(W_ROM_OBJ_AB), .q_a(W_OBJ_DO_7C), - .clock_b(CLK_24M), + .clock_b(DL_CLK), .address_b(DL_ADDR[11:0]), .wren_b(DL_WR && DL_ADDR[15:12] == 4'hA), .data_b(DL_DATA) @@ -346,7 +347,7 @@ dpram #(12,8) obj2 ( .address_a(W_ROM_OBJ_AB), .q_a(W_OBJ_DO_7D), - .clock_b(CLK_24M), + .clock_b(DL_CLK), .address_b(DL_ADDR[11:0]), .wren_b(DL_WR && DL_ADDR[15:12] == 4'hB), .data_b(DL_DATA) @@ -363,7 +364,7 @@ dpram #(12,8) obj3 ( .address_a(W_ROM_OBJ_AB), .q_a(W_OBJ_DO_7E), - .clock_b(CLK_24M), + .clock_b(DL_CLK), .address_b(DL_ADDR[11:0]), .wren_b(DL_WR && DL_ADDR[15:12] == 4'hC), .data_b(DL_DATA) @@ -380,7 +381,7 @@ dpram #(12,8) obj4 ( .address_a(W_ROM_OBJ_AB), .q_a(W_OBJ_DO_7F), - .clock_b(CLK_24M), + .clock_b(DL_CLK), .address_b(DL_ADDR[11:0]), .wren_b(DL_WR && DL_ADDR[15:12] == 4'hD), .data_b(DL_DATA) diff --git a/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_top.v b/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_top.v index 47ca2528..ebc40175 100644 --- a/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_top.v +++ b/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_top.v @@ -53,6 +53,7 @@ module dkong_top output [7:0] O_SOUND_DAT, // EXTERNAL ROMS + input DL_CLK, input [15:0] DL_ADDR, input DL_WR, input [7:0] DL_DATA, @@ -414,6 +415,7 @@ dkong_obj obj .O_FLIP_HV(W_FLIP_HV), .O_L_CMPBLKn(W_L_CMPBLKn), + .DL_CLK(DL_CLK), .DL_ADDR(DL_ADDR), .DL_WR(DL_WR), .DL_DATA(DL_DATA) @@ -440,6 +442,7 @@ dkong_vram vram .O_VRAMBUSYn(W_VRAMBUSYn), .O_ESBLKn(), + .DL_CLK(DL_CLK), .DL_ADDR(DL_ADDR), .DL_WR(DL_WR), .DL_DATA(DL_DATA) @@ -465,6 +468,7 @@ radarscp_stars rstars .I_FLIPn(W_FLIPn), .I_SOU2(W_6H_Q[2]), + .DL_CLK(DL_CLK), .DL_ADDR(DL_ADDR), .DL_WR(DL_WR), .DL_DATA(DL_DATA) @@ -500,6 +504,7 @@ dkong_col_pal cpal .O_G(W_GREEN), .O_B(W_BLUE), + .DL_CLK(DL_CLK), .DL_ADDR(DL_ADDR), .DL_WR(DL_WR), .DL_DATA(DL_DATA) diff --git a/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_vram.v b/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_vram.v index 367d785b..fb7fa52f 100644 --- a/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_vram.v +++ b/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_vram.v @@ -45,6 +45,7 @@ module dkong_vram( output O_VRAMBUSYn, output O_ESBLKn, + input DL_CLK, input [15:0] DL_ADDR, input DL_WR, input [7:0] DL_DATA @@ -90,7 +91,7 @@ dpram #(8,4) col3 ( .address_a({W_vram_AB[9:7],W_vram_AB[4:0]}), .q_a(W_2N_DO), - .clock_b(CLK_24M), + .clock_b(DL_CLK), .address_b(DL_ADDR[7:0]), .wren_b(DL_WR && DL_ADDR[15:8] == 8'hF4), .data_b(DL_DATA[3:0]) @@ -186,7 +187,7 @@ dpram #(12,8) vid1 ( .address_a({I_4H_Q0,WO_DB[7:0],I_VF_CNT[2:0]}), .q_a(W_3P_DO), - .clock_b(CLK_24M), + .clock_b(DL_CLK), .address_b(DL_ADDR[11:0]), .wren_b(DL_WR && DL_ADDR[15:12] == 4'h8), .data_b(DL_DATA) @@ -203,7 +204,7 @@ dpram #(12,8) vid2 ( .address_a({I_4H_Q0,WO_DB[7:0],I_VF_CNT[2:0]}), .q_a(W_3N_DO), - .clock_b(CLK_24M), + .clock_b(DL_CLK), .address_b(DL_ADDR[11:0]), .wren_b(DL_WR && DL_ADDR[15:12] == 4'h9), .data_b(DL_DATA) diff --git a/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_wav_sound.v b/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_wav_sound.v index aa1fd42c..840cea29 100644 --- a/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_wav_sound.v +++ b/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/dkong_wav_sound.v @@ -49,8 +49,8 @@ begin sample <= 0; sample_pls <= 0; end else begin - sample <= (sample == Sample_cnt - 1'b1) ? 0 : sample+1; - sample_pls <= (sample == Sample_cnt - 1'b1)? 1 : 0 ; + sample <= (sample == Sample_cnt - 1'b1) ? 12'd0 : sample+1'd1; + sample_pls <= (sample == Sample_cnt - 1'b1)? 1'd1 : 1'd0 ; end end @@ -104,7 +104,7 @@ begin status1 <= 3'b000; ad_cnt <= ad_cnt; end else begin - ad_cnt <= ad_cnt+1 ; + ad_cnt <= ad_cnt+1'd1; end end end diff --git a/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/pll.v b/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/pll.v index 7c405c68..5e4686cf 100644 --- a/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/pll.v +++ b/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/pll.v @@ -39,23 +39,27 @@ module pll ( inclk0, c0, + c1, locked); input inclk0; output c0; + output c1; output locked; wire [4:0] sub_wire0; wire sub_wire2; - wire [0:0] sub_wire5 = 1'h0; - wire [0:0] sub_wire1 = sub_wire0[0:0]; - wire c0 = sub_wire1; + wire [0:0] sub_wire6 = 1'h0; + wire [0:0] sub_wire3 = sub_wire0[0:0]; + wire [1:1] sub_wire1 = sub_wire0[1:1]; + wire c1 = sub_wire1; wire locked = sub_wire2; - wire sub_wire3 = inclk0; - wire [1:0] sub_wire4 = {sub_wire5, sub_wire3}; + wire c0 = sub_wire3; + wire sub_wire4 = inclk0; + wire [1:0] sub_wire5 = {sub_wire6, sub_wire4}; altpll altpll_component ( - .inclk (sub_wire4), + .inclk (sub_wire5), .clk (sub_wire0), .locked (sub_wire2), .activeclock (), @@ -94,10 +98,14 @@ module pll ( .vcounderrange ()); defparam altpll_component.bandwidth_type = "AUTO", - altpll_component.clk0_divide_by = 78, + altpll_component.clk0_divide_by = 39, altpll_component.clk0_duty_cycle = 50, altpll_component.clk0_multiply_by = 71, altpll_component.clk0_phase_shift = "0", + altpll_component.clk1_divide_by = 78, + altpll_component.clk1_duty_cycle = 50, + altpll_component.clk1_multiply_by = 71, + altpll_component.clk1_phase_shift = "0", altpll_component.compensate_clock = "CLK0", altpll_component.inclk0_input_frequency = 37037, altpll_component.intended_device_family = "Cyclone III", @@ -131,7 +139,7 @@ module pll ( altpll_component.port_scanread = "PORT_UNUSED", altpll_component.port_scanwrite = "PORT_UNUSED", altpll_component.port_clk0 = "PORT_USED", - altpll_component.port_clk1 = "PORT_UNUSED", + altpll_component.port_clk1 = "PORT_USED", altpll_component.port_clk2 = "PORT_UNUSED", altpll_component.port_clk3 = "PORT_UNUSED", altpll_component.port_clk4 = "PORT_UNUSED", @@ -171,9 +179,12 @@ endmodule // Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0" // Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0" // Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8" -// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "78" +// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "39" +// Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "78" // Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000" -// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "24.576923" +// Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000" +// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "49.153847" +// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "24.576923" // Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0" // Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0" // Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1" @@ -194,18 +205,26 @@ endmodule // Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available" // Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0" // Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg" +// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "ps" // Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any" // Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0" +// Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0" // Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "71" +// Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "71" // Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1" // Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "24.57600000" +// Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "100.00000000" // Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0" +// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "0" // Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz" +// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz" // Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1" // Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0" // Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000" +// Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "0.00000000" // Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0" // Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg" +// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "ps" // Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0" // Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0" // Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1" @@ -228,19 +247,26 @@ endmodule // Retrieval info: PRIVATE: SPREAD_USE STRING "0" // Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0" // Retrieval info: PRIVATE: STICKY_CLK0 STRING "1" +// Retrieval info: PRIVATE: STICKY_CLK1 STRING "1" // Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1" // Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1" // Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" // Retrieval info: PRIVATE: USE_CLK0 STRING "1" +// Retrieval info: PRIVATE: USE_CLK1 STRING "1" // Retrieval info: PRIVATE: USE_CLKENA0 STRING "0" +// Retrieval info: PRIVATE: USE_CLKENA1 STRING "0" // Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0" // Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0" // Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all // Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO" -// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "78" +// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "39" // Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50" // Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "71" // Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0" +// Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "78" +// Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50" +// Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "71" +// Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0" // Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0" // Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "37037" // Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III" @@ -273,7 +299,7 @@ endmodule // Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED" // Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED" // Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED" -// Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_USED" // Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_UNUSED" // Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED" // Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED" @@ -292,11 +318,13 @@ endmodule // Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "5" // Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]" // Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0" +// Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1" // Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0" // Retrieval info: USED_PORT: locked 0 0 0 0 OUTPUT GND "locked" // Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0 // Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0 // Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0 +// Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1 // Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0 // Retrieval info: GEN_FILE: TYPE_NORMAL pll.v TRUE // Retrieval info: GEN_FILE: TYPE_NORMAL pll.ppf TRUE diff --git a/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/radarscp_stars.v b/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/radarscp_stars.v index 54427cf5..b12070b5 100644 --- a/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/radarscp_stars.v +++ b/Arcade_MiST/Nintendo Radar Scope Hardware/Donkey Kong/rtl/radarscp_stars.v @@ -31,6 +31,7 @@ module radarscp_stars( input I_FLIPn, input I_SOU2, + input DL_CLK, input [15:0] DL_ADDR, input DL_WR, input [7:0] DL_DATA @@ -101,7 +102,7 @@ dpram #(11,8) U_3E ( .address_a(STARS_A), .q_a(STARS_DO), - .clock_b(CLK_24M), + .clock_b(DL_CLK), .address_b(DL_ADDR[10:0]), .wren_b(DL_WR && DL_ADDR[15:11] == {4'hF, 1'b1}), .data_b(DL_DATA)