From 7f7de96c77ffa3e7405aab3624b0e08517539ac1 Mon Sep 17 00:00:00 2001 From: Gyorgy Szombathelyi <8644936+gyurco@users.noreply.github.com> Date: Sun, 11 Dec 2022 21:56:21 +0100 Subject: [PATCH] IremM72: small optimization --- Arcade_MiST/IremM72 Hardware/IremM72.qsf | 27 ++++------------------ Arcade_MiST/IremM72 Hardware/rtl/m72.qip | 20 ++++++++++++++++ Arcade_MiST/IremM72 Hardware/rtl/sprite.sv | 12 ++++------ 3 files changed, 29 insertions(+), 30 deletions(-) create mode 100644 Arcade_MiST/IremM72 Hardware/rtl/m72.qip diff --git a/Arcade_MiST/IremM72 Hardware/IremM72.qsf b/Arcade_MiST/IremM72 Hardware/IremM72.qsf index 2ff1dbe2..18501f7f 100644 --- a/Arcade_MiST/IremM72 Hardware/IremM72.qsf +++ b/Arcade_MiST/IremM72 Hardware/IremM72.qsf @@ -132,7 +132,7 @@ set_global_assignment -name TOP_LEVEL_ENTITY IremM72_MiST set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144 set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8 set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP -set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE SPEED +set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE BALANCED set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS ON set_global_assignment -name ALLOW_SYNCH_CTRL_USAGE ON set_global_assignment -name VHDL_INPUT_VERSION VHDL_2008 @@ -237,32 +237,12 @@ set_location_assignment PLL_1 -to pll|altpll_component|auto_generated|pll1 set_global_assignment -name DSP_BLOCK_BALANCING "DSP BLOCKS" set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING OFF set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION OFF -set_global_assignment -name AUTO_SHIFT_REGISTER_RECOGNITION OFF +set_global_assignment -name AUTO_SHIFT_REGISTER_RECOGNITION AUTO set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT EXTRA set_global_assignment -name VERILOG_SHOW_LMF_MAPPING_MESSAGES OFF set_global_assignment -name SYSTEMVERILOG_FILE rtl/IremM72_MiST.sv -set_global_assignment -name VERILOG_FILE rtl/build_id.v set_global_assignment -name QIP_FILE rtl/pll_mist.qip -set_global_assignment -name SYSTEMVERILOG_FILE rtl/ddr_debug.sv -set_global_assignment -name SYSTEMVERILOG_FILE rtl/m72.sv -set_global_assignment -name SYSTEMVERILOG_FILE rtl/pal.sv -set_global_assignment -name SYSTEMVERILOG_FILE rtl/mcu.sv -set_global_assignment -name SYSTEMVERILOG_FILE rtl/sample_rom.sv -set_global_assignment -name SYSTEMVERILOG_FILE rtl/m72_pkg.sv -set_global_assignment -name SYSTEMVERILOG_FILE rtl/m72_pic.sv -set_global_assignment -name VERILOG_FILE rtl/iir_filter.v -set_global_assignment -name VERILOG_FILE rtl/kna6034201.v -set_global_assignment -name VERILOG_FILE rtl/kna91h014.v -set_global_assignment -name SYSTEMVERILOG_FILE rtl/kna70h015.sv -set_global_assignment -name VERILOG_FILE rtl/jtframe_frac_cen.v -set_global_assignment -name SYSTEMVERILOG_FILE rtl/dualport_mailbox.sv -set_global_assignment -name SYSTEMVERILOG_FILE rtl/dpramv.sv -set_global_assignment -name SYSTEMVERILOG_FILE rtl/board_b_d_layer.sv -set_global_assignment -name SYSTEMVERILOG_FILE rtl/board_b_d.sv -set_global_assignment -name SYSTEMVERILOG_FILE rtl/sprite.sv -set_global_assignment -name SYSTEMVERILOG_FILE rtl/sound.sv -set_global_assignment -name SYSTEMVERILOG_FILE rtl/sdram_4w.sv -set_global_assignment -name SYSTEMVERILOG_FILE rtl/rom.sv +set_global_assignment -name QIP_FILE rtl/m72.qip set_global_assignment -name QIP_FILE ../../common/mist/mist.qip set_global_assignment -name QIP_FILE ../../common/CPU/T80/T80.qip set_global_assignment -name QIP_FILE ../../common/CPU/v30/V30.qip @@ -271,4 +251,5 @@ set_global_assignment -name QIP_FILE ../../common/Sound/jt51/jt51.qip set_global_assignment -name SIGNALTAP_FILE output_files/cpu.stp set_global_assignment -name SIGNALTAP_FILE output_files/cpu2.stp set_global_assignment -name SIGNALTAP_FILE output_files/cpu3.stp +set_global_assignment -name AUTO_RESOURCE_SHARING ON set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/Arcade_MiST/IremM72 Hardware/rtl/m72.qip b/Arcade_MiST/IremM72 Hardware/rtl/m72.qip new file mode 100644 index 00000000..6f4b11f4 --- /dev/null +++ b/Arcade_MiST/IremM72 Hardware/rtl/m72.qip @@ -0,0 +1,20 @@ +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) ./kna91h014.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) ./iir_filter.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) ./kna6034201.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) ./jtframe_frac_cen.v ] +set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) ./rom.sv ] +set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) ./pal.sv ] +set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) ./sample_rom.sv ] +set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) ./board_b_d.sv ] +set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) ./m72_pkg.sv ] +set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) ./sound.sv ] +set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) ./kna70h015.sv ] +set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) ./ddr_debug.sv ] +set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) ./mcu.sv ] +set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) ./dualport_mailbox.sv ] +set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) ./m72_pic.sv ] +set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) ./sprite.sv ] +set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) ./dpramv.sv ] +set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) ./m72.sv ] +set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) ./sdram_4w.sv ] +set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) ./board_b_d_layer.sv ] diff --git a/Arcade_MiST/IremM72 Hardware/rtl/sprite.sv b/Arcade_MiST/IremM72 Hardware/rtl/sprite.sv index dca16b0e..1c0a5744 100644 --- a/Arcade_MiST/IremM72 Hardware/rtl/sprite.sv +++ b/Arcade_MiST/IremM72 Hardware/rtl/sprite.sv @@ -268,7 +268,6 @@ module line_buffer( output reg [7:0] pixel_out ); -reg scan_buffer; reg [9:0] scan_pos = 0; wire [9:0] scan_pos_nl = scan_pos ^ {10{NL}}; reg [7:0] line_pixel; @@ -281,13 +280,13 @@ dpramv #(.widthad_a(10)) buffer_0 .clock_a(CLK_32M), .address_a(scan_pos_nl), .q_a(scan_0), - .wren_a(!scan_buffer && CE_PIX), + .wren_a(!V0 && CE_PIX), .data_a(8'd0), .clock_b(CLK_96M), .address_b(line_position), .data_b(line_pixel), - .wren_b(scan_buffer && line_write), + .wren_b(V0 && line_write), .q_b() ); @@ -296,13 +295,13 @@ dpramv #(.widthad_a(10)) buffer_1 .clock_a(CLK_32M), .address_a(scan_pos_nl), .q_a(scan_1), - .wren_a(scan_buffer && CE_PIX), + .wren_a(V0 && CE_PIX), .data_a(8'd0), .clock_b(CLK_96M), .address_b(line_position), .data_b(line_pixel), - .wren_b(!scan_buffer && line_write), + .wren_b(!V0 && line_write), .q_b() ); @@ -336,9 +335,8 @@ always_ff @(posedge CLK_32M) begin if (old_v0 != V0) begin scan_pos <= 249; // TODO why? old_v0 <= V0; - scan_buffer <= ~scan_buffer; end else if (CE_PIX) begin - pixel_out <= scan_buffer ? scan_1 : scan_0; + pixel_out <= V0 ? scan_1 : scan_0; scan_pos <= scan_pos + 10'd1; end end