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Back to 2 pll Design for midway8080, menu looks better

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This commit is contained in:
Marcel
2019-08-11 00:07:10 +02:00
parent 9553c9fd65
commit 82d956482c
121 changed files with 420885 additions and 1510725 deletions
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1
Computer_MiST/Laser310_MiST/Laser310_MiST.qsf
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@@ -72,7 +72,6 @@ set_global_assignment -name VHDL_FILE rtl/sn76489/sn76489_attenuator.vhd
set_global_assignment -name VHDL_FILE rtl/sprom.vhd
set_global_assignment -name VHDL_FILE rtl/spram.vhd
set_global_assignment -name VHDL_FILE rtl/pll.vhd
set_global_assignment -name VHDL_FILE rtl/dac.vhd
set_global_assignment -name VERILOG_FILE rtl/reset_de.v
set_global_assignment -name VHDL_FILE rtl/dpram.vhd
set_global_assignment -name TEXT_FILE rtl/tv80/Text1.txt

7
Computer_MiST/Laser310_MiST/rtl/Laser310_MiST.sv
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@@ -71,11 +71,12 @@ LASER310_TOP LASER310_TOP(
.VGA_HS(hs),
.VGA_VS(vs),
.AUD_ADCDAT(audio),
// .VIDEO_MODE(1'b0),
.audio_s(audio_s),
.key_strobe (key_strobe ),
.key_pressed (key_pressed ),
.key_code (key_code ),
.SWITCH({"00000",!status[5],!status[2],!status[1]}),
.SWITCH({"00000",~status[5],~status[2],~status[1]}),
.UART_RXD(),
.UART_TXD()
);
@@ -95,8 +96,8 @@ mist_video #(.COLOR_DEPTH(6)) mist_video(
.VGA_B(VGA_B),
.VGA_VS(VGA_VS),
.VGA_HS(VGA_HS),
.scandoubler_disable(1'b1),//scandoublerD),
.scanlines(scandoublerD ? 2'b00 : {status[4:3] == 3, status[4:3] == 2}),
.scandoubler_disable(scandoublerD),
.scanlines(status[4:3]),
.ypbpr(ypbpr)
);

32
Computer_MiST/Laser310_MiST/rtl/SVGA_DEFINES.v
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@@ -12,23 +12,37 @@ equal the rate specified above the timing block that is uncommented.
// 640 X 480 @ 60Hz with a 25.175MHz pixel clock
`define H_ACTIVE 640 // pixels
`define H_ACTIVE 640 // pixels
`define H_FRONT_PORCH 16 // pixels
`define H_SYNCH 96 // pixels
`define H_BACK_PORCH 48 // pixels
`define H_TOTAL 800 // pixels
`define H_BACK_PORCH 48 // pixels
`define H_TOTAL 800 // pixels
`define V_ACTIVE 480 // lines
`define V_ACTIVE 480 // lines
`define V_FRONT_PORCH 11 // lines
`define V_SYNCH 2 // lines
`define V_BACK_PORCH 31 // lines
`define V_TOTAL 524 // lines
`define V_BACK_PORCH 31 // lines
`define V_TOTAL 524 // lines
`define CLK_MULTIPLY 2 // 50 * 2/4 = 25.000 MHz
`define CLK_MULTIPLY 2 // 50 * 2/4 = 25.000 MHz
`define CLK_DIVIDE 4
/*
//generic composite,720x288p clk=13.5MHz
`define H_ACTIVE 720
`define H_FRONT_PORCH 20
`define H_SYNCH 64
`define H_BACK_PORCH 60
`define H_TOTAL 800 // todo
`define V_ACTIVE 288
`define V_FRONT_PORCH 1
`define V_SYNCH 3
`define V_BACK_PORCH 20
`define V_TOTAL 524 // todo
`define CLK_MULTIPLY 27 // 50 * 27/100 = 13.500 MHz
`define CLK_DIVIDE 100
// 640 X 480 @ 72Hz with a 31.500MHz pixel clock
`define H_ACTIVE 640 // pixels
`define H_FRONT_PORCH 24 // pixels

2
Computer_MiST/OricInFPGA_MiST/rtl/oricatmos.vhd
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@@ -293,7 +293,7 @@ inst_key : keyboard
swrst => break
);
via_in <= x"F7" when (KEY_ROW or via_pa_out) = x"FF-" else x"FF";
via_in <= x"F7" when (KEY_ROW or via_pa_out) = x"FF" else x"FF";
K7_TAPEOUT <= via_out(7);
K7_REMOTE <= via_out(6);
ula_IOCONTROL <= '0'; -- ula_IOCONTROL <= IOCONTROL;