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Create 8088.qip

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Marcel
2021-02-07 12:10:05 +01:00
parent bc68a4b293
commit b4e4695e80
1 changed files with 5 additions and 0 deletions
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common/CPU/8088/8088.qip Normal file
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set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "biu_max.v"]
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "biu_min.v"]
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "eu_rom.v"]
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "i8088.v"]
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "mcl86_eu_core.v"]