mirror of
https://github.com/Gehstock/Mist_FPGA.git
synced 2026-05-06 00:04:10 +00:00
TerraCresta: fix sprites in the first scanline
This commit is contained in:
@@ -1,5 +1,9 @@
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//============================================================================
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//============================================================================
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//
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//
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// (c) 2022 Darren Olafson
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//
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// Enhancements/fixes/SDRAM handling (c) 2022 Gyorgy Szombathelyi
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//
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// This program is free software; you can redistribute it and/or modify it
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// This program is free software; you can redistribute it and/or modify it
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// under the terms of the GNU General Public License as published by the Free
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// under the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 of the License, or (at your option)
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// Software Foundation; either version 2 of the License, or (at your option)
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@@ -115,14 +119,11 @@ assign flipped = flip;
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wire [8:0] hc;
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wire [8:0] hc;
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wire [8:0] vc;
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wire [8:0] vc;
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wire [8:0] vc_raw;
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assign vc = vc_raw + 8'd16;
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video_timing video_timing (
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video_timing video_timing (
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.clk(clk_24M),
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.clk(clk_24M),
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.clk_pix_en(clk6_en),
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.clk_pix_en(clk6_en),
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.hc(hc),
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.hc(hc),
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.vc(vc_raw),
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.vc(vc),
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.hs_offset(hs_offset),
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.hs_offset(hs_offset),
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.vs_offset(vs_offset),
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.vs_offset(vs_offset),
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.hbl(hbl),
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.hbl(hbl),
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@@ -183,7 +184,6 @@ reg [1:0] gfx2_pal_l_r;
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always @ (posedge clk_24M) begin
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always @ (posedge clk_24M) begin
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if (clk6_en) begin
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if (clk6_en) begin
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// 0
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// 0
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//gfx1_addr <= { ( (pcb == 0 ) ? 1'b0 : fg_ram_dout[8] ) , fg_ram_dout[7:0], vc[2:0], hc[2:1] } ; // tile #. set of 256 tiles -- fg_ram_dout[7:0]
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if (hc_x[0])
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if (hc_x[0])
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gfx1_addr <= { 1'b0 , fg_ram_dout[7:0], vc_x[2:0], hc_x[2:1] } ; // tile #. set of 256 tiles -- fg_ram_dout[7:0]
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gfx1_addr <= { 1'b0 , fg_ram_dout[7:0], vc_x[2:0], hc_x[2:1] } ; // tile #. set of 256 tiles -- fg_ram_dout[7:0]
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@@ -260,7 +260,7 @@ always @ (posedge clk_24M) begin
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copy_sprite_state <= 3;
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copy_sprite_state <= 3;
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end else if ( copy_sprite_state == 3 ) begin
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end else if ( copy_sprite_state == 3 ) begin
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// address 0 result
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// address 0 result
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sprite_y_pos <= flip ? sprite_shared_ram_dout : 8'd239 - sprite_shared_ram_dout;
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sprite_y_pos <= flip ? sprite_shared_ram_dout - 1'd1 : 8'd239 - sprite_shared_ram_dout;
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sprite_shared_addr <= sprite_shared_addr + 1'd1 ;
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sprite_shared_addr <= sprite_shared_addr + 1'd1 ;
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copy_sprite_state <= 4;
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copy_sprite_state <= 4;
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@@ -278,8 +278,6 @@ always @ (posedge clk_24M) begin
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if ( pcb == 0 || pcb == 1 || pcb == 3 ) begin
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if ( pcb == 0 || pcb == 1 || pcb == 3 ) begin
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sprite_tile[9:8] <= { 1'b0, sprite_shared_ram_dout[1] };
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sprite_tile[9:8] <= { 1'b0, sprite_shared_ram_dout[1] };
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end else begin
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end else begin
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// if( attrs&0x10 ) tile |= 0x100;
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// if( attrs&0x02 ) tile |= 0x200;
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sprite_tile[9:8] <= { sprite_shared_ram_dout[1], sprite_shared_ram_dout[4] };
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sprite_tile[9:8] <= { sprite_shared_ram_dout[1], sprite_shared_ram_dout[4] };
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end
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end
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@@ -318,7 +316,6 @@ always @ (posedge clk_24M) begin
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end
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end
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if ( draw_sprite_state == 0 && copy_sprite_state == 0 && hc == 2 ) begin // 0xe0
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if ( draw_sprite_state == 0 && copy_sprite_state == 0 && hc == 2 ) begin // 0xe0
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// clear sprite buffer
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sprite_x_ofs <= 0;
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sprite_x_ofs <= 0;
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draw_sprite_state <= 1;
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draw_sprite_state <= 1;
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sprite_buffer_addr <= 0;
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sprite_buffer_addr <= 0;
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@@ -370,11 +367,8 @@ wire [3:0] sprite_y_ofs = vc - sprite_y_pos ;
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wire [3:0] flipped_x = ( sprite_flip_x == 0 ) ? sprite_x_new_ofs : 4'd15 - sprite_x_new_ofs;
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wire [3:0] flipped_x = ( sprite_flip_x == 0 ) ? sprite_x_new_ofs : 4'd15 - sprite_x_new_ofs;
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wire [3:0] flipped_y = ( sprite_flip_y == 0 ) ? sprite_y_ofs : 4'd15 - sprite_y_ofs;
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wire [3:0] flipped_y = ( sprite_flip_y == 0 ) ? sprite_y_ofs : 4'd15 - sprite_y_ofs;
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//wire [3:0] gfx3_pix = (sprite_x_ofs[0] == 1 ) ? gfx3_dout[7:4] : gfx3_dout[3:0];
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wire [3:0] gfx3_pix = (flipped_x[0] == 1 ) ? gfx3_dout[7:4] : gfx3_dout[3:0];
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wire [3:0] gfx3_pix = (flipped_x[0] == 1 ) ? gfx3_dout[7:4] : gfx3_dout[3:0];
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// int spr_col = (u[t>>1]<<8) + (c<<4) + pen ;
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// prom_u = palette bank lookup
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wire [11:0] p ;
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wire [11:0] p ;
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wire [16:0] gfx3_addr ;
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wire [16:0] gfx3_addr ;
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@@ -396,46 +390,14 @@ always @ (*) begin
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gfx3_addr = { 1'b0, flipped_x[1], sprite_tile[8:0], flipped_y[3:0], flipped_x[3:2] };
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gfx3_addr = { 1'b0, flipped_x[1], sprite_tile[8:0], flipped_y[3:0], flipped_x[3:2] };
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p = { prom_u_dout, sprite_colour, gfx3_pix};
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p = { prom_u_dout, sprite_colour, gfx3_pix};
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//p = { prom_u[sprite_tile[8:1]][3:0], sprite_colour, gfx3_pix};
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end else begin
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end else begin
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// hori
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// hori
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gfx3_addr = { flipped_x[1], sprite_tile[9:0], flipped_y[3:0], flipped_x[3:2] };
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gfx3_addr = { flipped_x[1], sprite_tile[9:0], flipped_y[3:0], flipped_x[3:2] };
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p = { prom_u_dout, sprite_colour[3:1], 1'b0, gfx3_pix};
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p = { prom_u_dout, sprite_colour[3:1], 1'b0, gfx3_pix};
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//p = { prom_u[{sprite_tile[9],sprite_tile[7:2],sprite_tile[8]}][3:0], sprite_colour[3:1], 1'b0, gfx3_pix};
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end
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end
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end
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end
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// sprite_tile[9:8] <= { sprite_shared_ram_dout[1], sprite_shared_ram_dout[4] };
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// int tile = pSource[1]&0xff;
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// int attrs = pSource[2];
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// int flipx = attrs&0x04;
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// int flipy = attrs&0x08;
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// int color = (attrs&0xf0)>>4;
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// int sx = (pSource[3] & 0xff) - 0x80 + 256 * (attrs & 1);
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// int sy = 240 - (pSource[0] & 0xff);
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//
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// if( transparent_pen )
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// {
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// int bank;
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//
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// if( attrs&0x02 ) tile |= 0x200; // sprite_shared_ram_dout[1]
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// if( attrs&0x10 ) tile |= 0x100; // sprite_shared_ram_dout[4]
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//
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// bank = (tile&0xfc)>>1;
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// if( tile&0x200 ) bank |= 0x80; // sprite_shared_ram_dout[1]
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// if( tile&0x100 ) bank |= 0x01; // sprite_shared_ram_dout[4]
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//
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// color &= 0xe;
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// color += 16*(spritepalettebank[bank]&0xf);
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// }
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// else
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// {
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// if( attrs&0x02 ) tile|= 0x100;
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// color += 16 * (spritepalettebank[(tile>>1)&0xff] & 0x0f);
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// }
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reg [11:0] sprite_line_buffer[512];
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reg [11:0] sprite_line_buffer[512];
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dual_port_ram #(.LEN(64), .DATA_WIDTH(64)) sprite_buffer (
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dual_port_ram #(.LEN(64), .DATA_WIDTH(64)) sprite_buffer (
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@@ -616,7 +578,7 @@ end
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// always ack when it's not program rom
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// always ack when it's not program rom
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assign m68k_dtack_n = 0;
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assign m68k_dtack_n = 0;
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// select cpu data input based on what is active
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// select cpu data input based on what is active
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assign m68k_din = prog_rom_cs ? prog_rom_data :
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assign m68k_din = prog_rom_cs ? prog_rom_data :
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m68k_ram_cs ? ram68k_dout :
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m68k_ram_cs ? ram68k_dout :
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m68k_ram1_cs ? m68k_ram1_dout :
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m68k_ram1_cs ? m68k_ram1_dout :
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@@ -25,10 +25,10 @@ wire [8:0] HS_START = 9'd300;
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wire [8:0] HS_END = 9'd332;
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wire [8:0] HS_END = 9'd332;
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wire [8:0] HTOTAL = 9'd383;
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wire [8:0] HTOTAL = 9'd383;
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wire [8:0] VBL_START = 9'd224;
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wire [8:0] VBL_START = 9'd240;
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wire [8:0] VBL_END = 9'd0;
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wire [8:0] VBL_END = 9'd16;
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wire [8:0] VS_START = 9'd235;
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wire [8:0] VS_START = 9'd251;
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wire [8:0] VS_END = 9'd243;
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wire [8:0] VS_END = 9'd259;
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wire [8:0] VTOTAL = 9'd263;
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wire [8:0] VTOTAL = 9'd263;
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reg [8:0] v;
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reg [8:0] v;
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