diff --git a/Arcade_MiST/Midway MCR Scroll/SpyHunter_MiST/SpyHunter.qsf b/Arcade_MiST/Midway MCR Scroll/SpyHunter_MiST/SpyHunter.qsf
index 1166b57b..e048138c 100644
--- a/Arcade_MiST/Midway MCR Scroll/SpyHunter_MiST/SpyHunter.qsf	
+++ b/Arcade_MiST/Midway MCR Scroll/SpyHunter_MiST/SpyHunter.qsf	
@@ -41,7 +41,7 @@
 # ========================
 set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
 set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
-set_global_assignment -name LAST_QUARTUS_VERSION 13.1
+set_global_assignment -name LAST_QUARTUS_VERSION "13.1 SP4.26"
 set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl"
 
 # Pin & Location Assignments
@@ -214,7 +214,7 @@ set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
 set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
 set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
 set_global_assignment -name ENABLE_SIGNALTAP OFF
-set_global_assignment -name USE_SIGNALTAP_FILE output_files/csd.stp
+set_global_assignment -name USE_SIGNALTAP_FILE output_files/cmos.stp
 set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE SPEED
 set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS ON
 set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS"
@@ -241,4 +241,5 @@ set_global_assignment -name QIP_FILE ../../../common/CPU/T80/T80.qip
 set_global_assignment -name VHDL_FILE ../../../common/Sound/ym2149/vol_table_array.vhd
 set_global_assignment -name VHDL_FILE ../../../common/Sound/ym2149/YM2149.vhd
 set_global_assignment -name QIP_FILE ../../../common/mist/mist.qip
+set_global_assignment -name SIGNALTAP_FILE output_files/cmos.stp
 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
diff --git a/Arcade_MiST/Midway MCR Scroll/SpyHunter_MiST/rtl/SpyHunter_MiST.sv b/Arcade_MiST/Midway MCR Scroll/SpyHunter_MiST/rtl/SpyHunter_MiST.sv
index dda40f9f..b3d9639a 100644
--- a/Arcade_MiST/Midway MCR Scroll/SpyHunter_MiST/rtl/SpyHunter_MiST.sv	
+++ b/Arcade_MiST/Midway MCR Scroll/SpyHunter_MiST/rtl/SpyHunter_MiST.sv	
@@ -54,6 +54,7 @@ localparam CONF_STR = {
 	"O6,Service,Off,On;",
 	"O8,Demo Sounds,Off,On;",
 	"O9,Show Lamps,Off,On;",
+	"R2048,Save settings;",
 	"T0,Reset;",
 	"V,v1.1.",`BUILD_DATE
 };
@@ -121,21 +122,26 @@ wire [15:0] csd_do;
 wire [14:0] sp_addr;
 wire [31:0] sp_do;
 wire        ioctl_downl;
+wire        ioctl_upl;
 wire  [7:0] ioctl_index;
 wire        ioctl_wr;
 wire [24:0] ioctl_addr;
 wire  [7:0] ioctl_dout;
+wire  [7:0] ioctl_din;
 
 data_io data_io(
 	.clk_sys       ( clk_sys      ),
 	.SPI_SCK       ( SPI_SCK      ),
 	.SPI_SS2       ( SPI_SS2      ),
 	.SPI_DI        ( SPI_DI       ),
+	.SPI_DO        ( SPI_DO       ),
 	.ioctl_download( ioctl_downl  ),
+	.ioctl_upload  ( ioctl_upl    ),
 	.ioctl_index   ( ioctl_index  ),
 	.ioctl_wr      ( ioctl_wr     ),
 	.ioctl_addr    ( ioctl_addr   ),
-	.ioctl_dout    ( ioctl_dout   )
+	.ioctl_dout    ( ioctl_dout   ),
+	.ioctl_din     ( ioctl_din    )
 );
 
 // ROM structure:
@@ -200,7 +206,7 @@ always @(posedge clk_sys) begin
 
 	ioctl_wr_last <= ioctl_wr;
 	if (ioctl_downl) begin
-		if (~ioctl_wr_last && ioctl_wr) begin
+		if (~ioctl_wr_last && ioctl_wr && ioctl_index == 0) begin
 			port1_req <= ~port1_req;
 			port2_req <= ~port2_req;
 		end
@@ -281,7 +287,9 @@ spy_hunter spy_hunter(
 	.sp_graphx32_do ( sp_do         ),
 	.dl_addr      ( ioctl_addr[18:0]),
 	.dl_data      ( ioctl_dout      ),
-	.dl_wr        ( ioctl_wr        )
+	.dl_wr        ( ioctl_wr && ioctl_index == 0 ),
+	.up_data      ( ioctl_din       ),
+	.cmos_wr      ( ioctl_wr && ioctl_index == 8'hff )
 );
 
 wire vs_out;
diff --git a/Arcade_MiST/Midway MCR Scroll/SpyHunter_MiST/rtl/spy_hunter.vhd b/Arcade_MiST/Midway MCR Scroll/SpyHunter_MiST/rtl/spy_hunter.vhd
index 36bfc47f..9099b961 100644
--- a/Arcade_MiST/Midway MCR Scroll/SpyHunter_MiST/rtl/spy_hunter.vhd	
+++ b/Arcade_MiST/Midway MCR Scroll/SpyHunter_MiST/rtl/spy_hunter.vhd	
@@ -185,6 +185,8 @@ port(
   dl_addr        : in std_logic_vector(18 downto 0);
   dl_data        : in std_logic_vector(7 downto 0);
   dl_wr          : in std_logic;
+  up_data        : out std_logic_vector(7 downto 0);
+  cmos_wr        : in std_logic;
 
   dbg_cpu_addr : out std_logic_vector(15 downto 0)
  );
@@ -938,14 +940,19 @@ port map (
 --);
 
 -- working RAM   F000-F7FF  2Ko
-wram : entity work.cmos_ram
+wram : entity work.dpram
 generic map( dWidth => 8, aWidth => 11)
 port map(
- clk  => clock_vidn,
- we   => wram_we,
- addr => cpu_addr(10 downto 0),
- d    => cpu_do,
- q    => wram_do
+ clk_a  => clock_vidn,
+ addr_a => cpu_addr(10 downto 0),
+ d_a    => cpu_do,
+ we_a   => wram_we,
+ q_a    => wram_do,
+ clk_b  => clock_vid,
+ we_b   => cmos_wr,
+ addr_b => dl_addr(10 downto 0),
+ d_b    => dl_data,
+ q_b    => up_data
 );
 
 -- char RAM   E800-EBFF  1Ko + mirroring 0400