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Vectrex: enable speech - works in Verzerk!
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@ -65,8 +65,8 @@ module YM2149
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);
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assign ACTIVE = ~ymreg[7][5:0];
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assign IOA_out = ymreg[14];
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assign IOB_out = ymreg[15];
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assign IOA_out = ymreg[7][6] ? ymreg[14] : 8'hff;
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assign IOB_out = ymreg[7][7] ? ymreg[15] : 8'hff;
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reg [7:0] addr;
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reg [7:0] ymreg[16];
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@ -372,7 +372,8 @@ architecture syn of vectrex is
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signal pot : signed(7 downto 0);
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signal compare : std_logic;
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signal players_switches : std_logic_vector(7 downto 0);
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signal ay_ioa_out : std_logic_vector(7 downto 0);
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signal vectrex_bd_rate_div : std_logic_vector(7 downto 0) := X"00";
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signal vectrex_serial_bit_in : std_logic;
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signal vectrex_serial_bit_in_d : std_logic;
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@ -772,6 +773,59 @@ audio_1 <= ("00"&ay_chan_a) +
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audio_out <= "000"&audio_1(9 downto 3) + audio_speech;
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-- vectrex just toggle port A forced/high Z to produce serial data
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-- when in high Z vectrex sense port A to get speech chip ready for new byte
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vectrex_serial_bit_in <= ay_ioa_out(4);
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-- get serial data from vectrex joystick port
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process (cpu_clock, reset)
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begin
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if reset='1' then
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vectrex_bd_rate_div <= X"00";
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elsif rising_edge(clock_24) then
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if cpu_clock_en = '1' then
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vectrex_serial_bit_in_d <= vectrex_serial_bit_in;
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if vectrex_serial_bit_in /= vectrex_serial_bit_in_d then -- reset baud counter on either edge
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vectrex_bd_rate_div <= X"00";
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else
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if vectrex_bd_rate_div = X"9B" then -- 1.5MHz/156 = 9615kHz
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vectrex_bd_rate_div <= X"00";
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else
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vectrex_bd_rate_div <= vectrex_bd_rate_div + '1';
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end if;
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end if;
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if vectrex_bd_rate_div = X"4E" then
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vectrex_serial_data_shift <= vectrex_serial_bit_in & vectrex_serial_data_shift(7 downto 1); -- serial is lsb first (ok speakjet/vecvoice/vecvox)
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if vectrex_serial_bit_cnt = X"0" and vectrex_serial_bit_in = '0' then
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vectrex_serial_bit_cnt <= X"1";
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vectrex_serial_byte_rdy <= '0';
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end if;
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if vectrex_serial_bit_cnt > X"0" then
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vectrex_serial_bit_cnt <= vectrex_serial_bit_cnt + '1';
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end if;
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if vectrex_serial_bit_cnt = X"A" then
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vectrex_serial_bit_cnt <= X"0";
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end if;
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end if;
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if vectrex_bd_rate_div = X"60" then
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if vectrex_serial_bit_cnt = X"9" then
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vectrex_serial_byte_rdy <= '1';
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vectrex_serial_byte_out <= vectrex_serial_data_shift;
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end if;
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end if;
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end if;
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end if;
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end process;
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frame <= frame_line;
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---------------------------
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@ -914,7 +968,7 @@ port map(
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ACTIVE => open,
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IOA_in => players_switches,
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IOA_out => open,
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IOA_out => ay_ioa_out,
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IOB_in => (others => '0'),
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IOB_out => open
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@ -34,9 +34,9 @@ module vectrex_mist
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localparam CONF_STR = {
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"Vectrex;BINVECROM;",
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"O2,Show Frame,Yes,No;",
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"O3,Skip Logo,Yes,No;",
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"O4,Second Joystick, Player 2, Player 1;",
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// "O5,Speech Mode,No,Yes;",
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"O3,Skip Logo,Yes,No;",
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"O4,Joystick swap,Off,On;",
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"O5,Second port,Joystick,Speech;",
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// "O23,Phosphor persistance,1,2,3,4;",
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// "O8,Overburn,No,Yes;",
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"T6,Reset;",
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@ -132,7 +132,7 @@ vectrex vectrex (
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.video_csync ( cs ),
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.video_hblank ( hb ),
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.video_vblank ( vb ),
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// .speech_mode ( status[5] ),
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.speech_mode ( status[5] ),
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.video_hs ( hs ),
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.video_vs ( vs ),
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.frame ( frame_line ),
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@ -344,7 +344,6 @@ set_global_assignment -name PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA ON
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set_global_assignment -name ALLOW_ANY_RAM_SIZE_FOR_RECOGNITION ON
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set_global_assignment -name ALLOW_ANY_ROM_SIZE_FOR_RECOGNITION ON
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set_global_assignment -name USE_SIGNALTAP_FILE output_files/sdram.stp
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
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set_global_assignment -name SDC_FILE vectrex_MiST.out.sdc
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set_global_assignment -name SYSTEMVERILOG_FILE rtl/vectrex_mist.sv
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set_global_assignment -name SYSTEMVERILOG_FILE rtl/sdram.sv
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@ -364,4 +363,5 @@ set_global_assignment -name VHDL_FILE rtl/vectrex_speakjet.vhd
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set_global_assignment -name SYSTEMVERILOG_FILE rtl/YM2149.sv
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set_global_assignment -name VERILOG_FILE rtl/osd.v
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set_global_assignment -name SYSTEMVERILOG_FILE rtl/rgb2ypbpr.sv
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set_global_assignment -name SIGNALTAP_FILE output_files/sdram.stp
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set_global_assignment -name SIGNALTAP_FILE output_files/sdram.stp
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
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