From c9e5bf1c7ce3f6e2e29349f3de411ffa214def89 Mon Sep 17 00:00:00 2001 From: Gyorgy Szombathelyi Date: Fri, 11 Dec 2020 15:26:34 +0100 Subject: [PATCH] Midway MCR2: add save settings --- Arcade_MiST/Midway MCR 2/MCR2/README.txt | 5 +++++ .../Midway MCR 2/MCR2/rtl/MCR2_MiST.sv | 18 +++++++++++----- .../Midway MCR 2/MCR2/rtl/satans_hollow.vhd | 21 ++++++++++++------- 3 files changed, 32 insertions(+), 12 deletions(-) diff --git a/Arcade_MiST/Midway MCR 2/MCR2/README.txt b/Arcade_MiST/Midway MCR 2/MCR2/README.txt index 2afe03e4..291aa722 100644 --- a/Arcade_MiST/Midway MCR 2/MCR2/README.txt +++ b/Arcade_MiST/Midway MCR 2/MCR2/README.txt @@ -16,6 +16,11 @@ -- Copy the ROM files to the root of the SD Card. -- -- MRA utilty: https://github.com/sebdel/mra-tools-c +-- +-- Some games are storing settings/high scores in a non-volatile RAM. It can be saved to +-- the SD Card with the "Save settings" option in the OSD menu. It'll be restored when +-- the core is loaded next time. +-- --------------------------------------------------------------------------------- -- DE10_lite Top level for Satan Hollow (Midway MCR) by Dar (darfpga@aol.fr) (19/10/2019) -- http://darfpga.blogspot.fr diff --git a/Arcade_MiST/Midway MCR 2/MCR2/rtl/MCR2_MiST.sv b/Arcade_MiST/Midway MCR 2/MCR2/rtl/MCR2_MiST.sv index 11173d70..4d1de8f1 100644 --- a/Arcade_MiST/Midway MCR 2/MCR2/rtl/MCR2_MiST.sv +++ b/Arcade_MiST/Midway MCR 2/MCR2/rtl/MCR2_MiST.sv @@ -52,13 +52,14 @@ module MCR2_MiST( wire [6:0] core_mod; localparam CONF_STR = { - `CORE_NAME,";ROM;", + `CORE_NAME,";;", "O2,Rotate Controls,Off,On;", "O5,Blend,Off,On;", "O6,Swap Joysticks,Off,On;", "O4,Spinner speed,Low,High;", "DIP;", "O7,Service,Off,On;", + "R2048,Save settings;", "T0,Reset;", "V,v2.0.",`BUILD_DATE }; @@ -202,10 +203,12 @@ wire [15:0] rom_do; wire [13:0] snd_addr; wire [15:0] snd_do; wire ioctl_downl; +wire ioctl_upl; wire [7:0] ioctl_index; wire ioctl_wr; wire [24:0] ioctl_addr; wire [7:0] ioctl_dout; +wire [7:0] ioctl_din; /* ROM structure 00000 - 0BFFF 48k CPU1 @@ -219,11 +222,14 @@ data_io data_io( .SPI_SCK ( SPI_SCK ), .SPI_SS2 ( SPI_SS2 ), .SPI_DI ( SPI_DI ), + .SPI_DO ( SPI_DO ), .ioctl_download( ioctl_downl ), + .ioctl_upload ( ioctl_upl ), .ioctl_index ( ioctl_index ), .ioctl_wr ( ioctl_wr ), .ioctl_addr ( ioctl_addr ), - .ioctl_dout ( ioctl_dout ) + .ioctl_dout ( ioctl_dout ), + .ioctl_din ( ioctl_din ) ); reg port1_req, port2_req; sdram sdram( @@ -261,7 +267,7 @@ always @(posedge clk_sys) begin ioctl_wr_last <= ioctl_wr; if (ioctl_downl) begin - if (~ioctl_wr_last && ioctl_wr) begin + if (~ioctl_wr_last && ioctl_wr && ioctl_index == 0) begin port1_req <= ~port1_req; port2_req <= ~port2_req; end @@ -310,8 +316,10 @@ satans_hollow satans_hollow( .snd_rom_do ( snd_addr[0] ? snd_do[15:8] : snd_do[7:0] ), .dl_addr ( ioctl_addr[16:0]), - .dl_wr ( ioctl_wr ), - .dl_data ( ioctl_dout ) + .dl_wr ( ioctl_wr && ioctl_index == 0 ), + .dl_data ( ioctl_dout ), + .up_data ( ioctl_din ), + .cmos_wr ( ioctl_wr && ioctl_index == 8'hff ) ); wire vs_out; diff --git a/Arcade_MiST/Midway MCR 2/MCR2/rtl/satans_hollow.vhd b/Arcade_MiST/Midway MCR 2/MCR2/rtl/satans_hollow.vhd index beaf5ba0..ccf8d6cf 100644 --- a/Arcade_MiST/Midway MCR 2/MCR2/rtl/satans_hollow.vhd +++ b/Arcade_MiST/Midway MCR 2/MCR2/rtl/satans_hollow.vhd @@ -169,7 +169,9 @@ port( dl_addr : in std_logic_vector(16 downto 0); dl_wr : in std_logic; - dl_data : in std_logic_vector( 7 downto 0) + dl_data : in std_logic_vector( 7 downto 0); + up_data : out std_logic_vector(7 downto 0); + cmos_wr : in std_logic ); end satans_hollow; @@ -673,14 +675,19 @@ cpu_rom_addr <= cpu_addr(15 downto 0); cpu_rom_rd <= '1' when cpu_mreq_n = '0' and cpu_rd_n = '0' and cpu_addr(15 downto 12) < X"C" else '0'; -- working RAM 0xC000-0xC7FF + mirroring adresses -wram : entity work.cmos_ram +wram : entity work.dpram generic map( dWidth => 8, aWidth => 11) port map( - clk => clock_vidn, - we => wram_we, - addr => cpu_addr(10 downto 0), - d => cpu_do, - q => wram_do + clk_a => clock_vidn, + addr_a => cpu_addr(10 downto 0), + d_a => cpu_do, + we_a => wram_we, + q_a => wram_do, + clk_b => clock_vid, + we_b => cmos_wr, + addr_b => dl_addr(10 downto 0), + d_b => dl_data, + q_b => up_data ); -- video RAM 0xE800-0xEFFF + mirroring adresses