diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/CraterRaider.qsf b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/CraterRaider.qsf index b159b062..cc0b5791 100644 --- a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/CraterRaider.qsf +++ b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/CraterRaider.qsf @@ -117,38 +117,7 @@ set_location_assignment PIN_33 -to SDRAM_CKE set_location_assignment PIN_43 -to SDRAM_CLK set_location_assignment PLL_1 -to "pll:pll|altpll:altpll_component" -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[*] -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[*] -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[0] -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[1] -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQMH -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQML -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nRAS -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCAS -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nWE -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCS -set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[*] -set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[*] -set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_A[*] -set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQ[*] -set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_BA[*] -set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQML -set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQMH -set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nRAS -set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nCAS -set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nWE -set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nCS -set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_CKE -set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_CLK -set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_R[*] -set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_G[*] -set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_B[*] -set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_HS -set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_VS -set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_L -set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_R -set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SPI_DO # Classic Timing Assignments # ========================== @@ -158,7 +127,7 @@ set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 # Analysis & Synthesis Assignments # ================================ set_global_assignment -name FAMILY "Cyclone III" -set_global_assignment -name TOP_LEVEL_ENTITY SpyHunter_MiST +set_global_assignment -name TOP_LEVEL_ENTITY CraterRaider_MiST set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144 set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8 set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP @@ -210,9 +179,6 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" - # end ENTITY(Kickman_MiST) # ------------------------ -set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top -set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top -set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top set_global_assignment -name ENABLE_SIGNALTAP OFF set_global_assignment -name USE_SIGNALTAP_FILE output_files/reset.stp set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE SPEED @@ -223,8 +189,8 @@ set_global_assignment -name FITTER_EFFORT "STANDARD FIT" set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS ON set_global_assignment -name SMART_RECOMPILE ON set_global_assignment -name ALLOW_SYNCH_CTRL_USAGE ON -set_global_assignment -name SYSTEMVERILOG_FILE rtl/SpyHunter_MiST.sv -set_global_assignment -name VHDL_FILE rtl/spy_hunter.vhd +set_global_assignment -name SYSTEMVERILOG_FILE rtl/CraterRaider_MiST.sv +set_global_assignment -name VHDL_FILE rtl/crater_raider.vhd set_global_assignment -name VHDL_FILE rtl/ctc_counter.vhd set_global_assignment -name VHDL_FILE rtl/ctc_controler.vhd set_global_assignment -name VHDL_FILE rtl/spy_hunter_sound_board.vhd @@ -239,5 +205,38 @@ set_global_assignment -name SYSTEMVERILOG_FILE rtl/sdram.sv set_global_assignment -name VHDL_FILE rtl/pll_mist.vhd set_global_assignment -name QIP_FILE ../../../common/CPU/T80/T80.qip set_global_assignment -name QIP_FILE ../../../common/mist/mist.qip -set_global_assignment -name VHDL_FILE rtl/spy_hunter_control.vhd +set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top +set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top +set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[*] +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[*] +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[0] +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[1] +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQMH +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQML +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nRAS +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCAS +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nWE +set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCS +set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[*] +set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[*] +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_A[*] +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQ[*] +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_BA[*] +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQML +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_DQMH +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nRAS +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nCAS +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nWE +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_nCS +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_CKE +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to SDRAM_CLK +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_R[*] +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_G[*] +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_B[*] +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_HS +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to VGA_VS +set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_L +set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_R +set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SPI_DO set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/rom/CRATER.ROM b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/Snapshot/CRATER.ROM similarity index 95% rename from Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/rom/CRATER.ROM rename to Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/Snapshot/CRATER.ROM index 2bc98cf3..f4012b49 100644 Binary files a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/rom/CRATER.ROM and b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/Snapshot/CRATER.ROM differ diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/SpyHunter_MiST.sv b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/CraterRaider_MiST.sv similarity index 94% rename from Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/SpyHunter_MiST.sv rename to Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/CraterRaider_MiST.sv index 500132eb..a5e09eb8 100644 --- a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/SpyHunter_MiST.sv +++ b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/CraterRaider_MiST.sv @@ -16,7 +16,7 @@ // 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. //============================================================================ -module SpyHunter_MiST( +module CraterRaider_MiST( output LED, output [5:0] VGA_R, output [5:0] VGA_G, @@ -83,7 +83,7 @@ wire [15:0] audio_l, audio_r; wire hs, vs, cs; wire blankn; wire [2:0] g, r, b; -wire [14:0] rom_addr; +wire [15:0] rom_addr; wire [15:0] rom_do; wire [13:0] snd_addr; wire [15:0] snd_do; @@ -94,8 +94,6 @@ wire [7:0] ioctl_index; wire ioctl_wr; wire [24:0] ioctl_addr; wire [7:0] ioctl_dout; -wire [7:0] steering; -wire [7:0] gas; data_io data_io( .clk_sys ( clk_sys ), @@ -126,9 +124,9 @@ sdram sdram( .port1_d ( {ioctl_dout, ioctl_dout} ), .port1_q ( ), - .cpu1_addr ( ioctl_downl ? 16'hffff : {1'b0, rom_addr[14:1]} ), + .cpu1_addr ( ioctl_downl ? 16'hffff : {1'b0, rom_addr[15:1]} ), .cpu1_q ( rom_do ), - .cpu2_addr ( ioctl_downl ? 16'hffff : (16'h4000 + snd_addr[13:1]) ), + .cpu2_addr ( ioctl_downl ? 16'hffff : (16'h5000 + snd_addr[13:1]) ), .cpu2_q ( snd_do ), // port2 for sprite graphics @@ -174,19 +172,7 @@ always @(posedge clk_sys) begin end -spy_hunter_control spy_hunter_control( - .clock_40(clk_sys), - .reset(reset), - .vsync(vs), - .gas_plus(m_up), - .gas_minus(m_down), - .steering_plus(m_right), - .steering_minus(m_left), - .steering(steering), - .gas(gas) - ); - -spy_hunter spy_hunter( +Crater_Raider Crater_Raider( .clock_40(clk_sys), .reset(reset), .video_r(r), @@ -208,7 +194,7 @@ spy_hunter spy_hunter( .down(m_down), .fire1(m_fire1), .fire2(m_fire2), - .fire3(m_fire3), + .fire3(m_fire3),//not working .service(status[6]), .cpu_rom_addr ( rom_addr ), .cpu_rom_do ( rom_addr[0] ? rom_do[15:8] : rom_do[7:0] ), diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/spy_hunter.vhd b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/crater_raider.vhd similarity index 99% rename from Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/spy_hunter.vhd rename to Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/crater_raider.vhd index 6d7ea9e4..e88dd412 100644 --- a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/spy_hunter.vhd +++ b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/crater_raider.vhd @@ -1,5 +1,5 @@ --------------------------------------------------------------------------------- --- Spy hunter by Dar (darfpga@aol.fr) (06/12/2019) +-- Crater Raider by Dar (darfpga@aol.fr) (06/12/2019) -- http://darfpga.blogspot.fr --------------------------------------------------------------------------------- -- @@ -134,7 +134,7 @@ use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; use ieee.numeric_std.all; -entity spy_hunter is +entity crater_raider is port( clock_40 : in std_logic; reset : in std_logic; @@ -172,9 +172,9 @@ port( sp_graphx32_do : in std_logic_vector(31 downto 0); dbg_cpu_addr : out std_logic_vector(15 downto 0) ); -end spy_hunter; +end crater_raider; -architecture struct of spy_hunter is +architecture struct of crater_raider is signal reset_n : std_logic; signal clock_vid : std_logic; diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/rom/crater (1).zip b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/rom/crater (1).zip new file mode 100644 index 00000000..c0672bac Binary files /dev/null and b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/rom/crater (1).zip differ diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/rom/make_crater_raider_proms.bat b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/rom/make_crater_raider_proms.bat new file mode 100644 index 00000000..6ec9617b --- /dev/null +++ b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/rom/make_crater_raider_proms.bat @@ -0,0 +1,25 @@ + + + +make_vhdl_prom crcpu.10g crater_ch_bits.vhd + +copy /B crcpu.3a + crcpu.4a crater_bg_bits_1.bin +copy /B crcpu.5a + crcpu.6a crater_bg_bits_2.bin +make_vhdl_prom crater_bg_bits_1.bin crater_bg_bits_1.vhd +make_vhdl_prom crater_bg_bits_2.bin crater_bg_bits_2.vhd + + +copy /B crcpu.6d + crcpu.7d + crcpu.8d + crcpu.9d + crcpu.10d crater_cpu.bin +copy /B crsnd4.a7 + crsnd1.a8 + crsnd2.a9 + crsnd3.a10 crater_sound_cpu.bin + + +make_vhdl_prom 82s123.12d midssio_82s123.vhd + +copy /B crvid.a4 + crvid.a3 crater_sp_bits_1.bin +copy /B crvid.a6 + crvid.a5 crater_sp_bits_2.bin +copy /B crvid.a8 + crvid.a7 crater_sp_bits_3.bin +copy /B crvid.a10 + crvid.a9 crater_sp_bits_4.bin + +copy /B crater_cpu.bin + crater_sound_cpu.bin + crater_sp_bits_1.bin + crater_sp_bits_2.bin + crater_sp_bits_3.bin + crater_sp_bits_4.bin CRATER.ROM + +pause diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/binaries/win32/make_vhdl_prom.exe b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/rom/make_vhdl_prom.exe similarity index 100% rename from Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/binaries/win32/make_vhdl_prom.exe rename to Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/rom/make_vhdl_prom.exe diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/spy_hunter_control.vhd b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/spy_hunter_control.vhd deleted file mode 100644 index 2b30a78d..00000000 --- a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/rtl/spy_hunter_control.vhd +++ /dev/null @@ -1,160 +0,0 @@ -library ieee; -use ieee.std_logic_1164.all; -use ieee.std_logic_unsigned.all; -use ieee.numeric_std.all; - -entity spy_hunter_control is -port( - clock_40 : in std_logic; - reset : in std_logic; - vsync : in std_logic; - - gas_plus : in std_logic; - gas_minus : in std_logic; - steering_plus : in std_logic; - steering_minus: in std_logic; - steering : out std_logic_vector(7 downto 0); - gas : out std_logic_vector(7 downto 0) - ); -end spy_hunter_control; - - -architecture struct of spy_hunter_control is - signal steering_r : std_logic_vector(7 downto 0); - --signal steering_plus : std_logic; - signal steering_plus_r : std_logic; - --signal steering_minus : std_logic; - signal steering_minus_r : std_logic; - signal steering_timer : std_logic_vector(5 downto 0); - - signal gas_r : std_logic_vector(7 downto 0); - --signal gas_plus : std_logic; - signal gas_plus_r : std_logic; - --signal gas_minus : std_logic; - signal gas_minus_r : std_logic; - signal gas_timer : std_logic_vector(5 downto 0); - signal vsync_r : std_logic; - begin-- absolute position decoder simulation --- --- steering : --- thresholds median --- F5 < left 8 < 34 30 --- 35 < left 7 < 3C 38 --- 3D < left 6 < 44 40 --- 45 < left 5 < 4C 48 --- 4D < left 4 < 54 50 --- 45 < left 3 < 5C 58 --- 5D < left 2 < 64 60 --- 65 < left 1 < 6C 68 --- 6D < centrered < 74 70 --- 75 < right 1 < 7C 78 --- 7D < right 2 < 84 80 --- 85 < right 3 < 8C 88 --- 8D < right 4 < 94 90 --- 95 < right 5 < 9C 98 --- 9D < right 6 < A4 A0 --- A5 < right 7 < AC A8 --- AD < right 8 < F4 BO - --- gas : --- threshold median --- 00 < gas pedal 00 < 3B (39) 3E-5 --- 3C < gas pedal 01 < 40 3E --- 41 < gas pedal 02 < 45 43 --- 46 < gas pedal 03 < 4A 48 --- 4B < gas pedal 04 < 4F 4D --- 50 < gas pedal 05 < 54 52 --- 55 < gas pedal 06 < 59 57 --- 5A < gas pedal 07 < 5E 5C --- 5F < gas pedal 08 < 63 61 --- ... --- FA < gas pedal 27 < FE FC --- FF = gas pedal 28 (FF) FC+4 - - -gas <= gas_r; -steering <= steering_r; - -process (clock_40) -begin - if reset = '1' then - gas_r <= x"39"; - steering_r <= x"70"; - else - - if rising_edge(clock_40) then - gas_plus_r <= gas_plus; - gas_minus_r <= gas_minus; - steering_plus_r <= steering_plus; - steering_minus_r <= steering_minus; - vsync_r <= vsync; - - -- gas increase/decrease as long as btn is pushed - -- keep current value when no btn is pushed - if gas_r < x"39" then - gas_r <= x"39"; - else - if (gas_plus_r = not gas_plus) or - (gas_minus_r = not gas_minus) then - gas_timer <= (others => '0'); - else - if vsync_r ='0' and vsync = '1' then - if (gas_timer >= 5 and (gas_minus_r = '1' or gas_plus_r = '1')) then --tune inc/dec rate - gas_timer <= (others => '0'); - else - gas_timer <= gas_timer + 1; - end if; - end if; - end if; - - if vsync_r ='0' and vsync = '1' and gas_timer = 0 then - if gas_plus = '1' then - if gas_r >= x"FC" then gas_r <= x"FF"; else gas_r <= gas_r + 5; end if; - elsif gas_minus = '1' then - if gas_r <= x"3E" then gas_r <= x"39"; else gas_r <= gas_r - 5; end if; - end if; - end if; - - end if; - - -- steering increase/decrease as long as btn is pushed - -- return to center value when no btn is pushed - if steering_r < x"30" then - steering_r <= x"30"; - elsif steering_r > x"B0" then - steering_r <= x"B0"; - else - if (steering_plus_r = not steering_plus) or - (steering_minus_r = not steering_minus) then - steering_timer <= (others => '0'); - else - if vsync_r ='0' and vsync = '1' then - if (steering_timer >= 7 and (steering_minus_r = '1' or steering_plus_r = '1')) or -- tune btn pushed rate - (steering_timer >= 3 and (steering_minus_r = '0' and steering_plus_r = '0')) then -- tune btn released rate - steering_timer <= (others => '0'); - else - steering_timer <= steering_timer + 1; - end if; - end if; - end if; - - if vsync_r ='0' and vsync = '1' and steering_timer = 0 then - if steering_plus = '1' then - if steering_r >= x"A8" then steering_r <= x"B0"; else steering_r <= steering_r + 8; end if; - elsif steering_minus = '1' then - if steering_r <= x"38" then steering_r <= x"30"; else steering_r <= steering_r - 8; end if; - else - if steering_r <= x"68" then steering_r <= steering_r + 8; end if; - if steering_r >= x"78" then steering_r <= steering_r - 8; end if; - if (steering_r > x"68") and (steering_r < x"78") then steering_r <= x"70"; end if; - end if; - end if; - - end if; - - end if; - - end if; -end process; - -end struct; diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/de10_lite/max10_pll_120M_sdram.vhd b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/de10_lite/max10_pll_120M_sdram.vhd deleted file mode 100644 index 130d3048..00000000 --- a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/de10_lite/max10_pll_120M_sdram.vhd +++ /dev/null @@ -1,426 +0,0 @@ --- megafunction wizard: %ALTPLL% --- GENERATION: STANDARD --- VERSION: WM1.0 --- MODULE: altpll - --- ============================================================ --- File Name: max10_pll_120M_sdram.vhd --- Megafunction Name(s): --- altpll --- --- Simulation Library Files(s): --- altera_mf --- ============================================================ --- ************************************************************ --- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! --- --- 18.1.0 Build 625 09/12/2018 SJ Lite Edition --- ************************************************************ - - ---Copyright (C) 2018 Intel Corporation. All rights reserved. ---Your use of Intel Corporation's design tools, logic functions ---and other software and tools, and its AMPP partner logic ---functions, and any output files from any of the foregoing ---(including device programming or simulation files), and any ---associated documentation or information are expressly subject ---to the terms and conditions of the Intel Program License ---Subscription Agreement, the Intel Quartus Prime License Agreement, ---the Intel FPGA IP License Agreement, or other applicable license ---agreement, including, without limitation, that your use is for ---the sole purpose of programming logic devices manufactured by ---Intel and sold by Intel or its authorized distributors. Please ---refer to the applicable agreement for further details. - - -LIBRARY ieee; -USE ieee.std_logic_1164.all; - -LIBRARY altera_mf; -USE altera_mf.all; - -ENTITY max10_pll_120M_sdram IS - PORT - ( - inclk0 : IN STD_LOGIC := '0'; - c0 : OUT STD_LOGIC ; - c1 : OUT STD_LOGIC ; - c2 : OUT STD_LOGIC ; - locked : OUT STD_LOGIC - ); -END max10_pll_120M_sdram; - - -ARCHITECTURE SYN OF max10_pll_120m_sdram IS - - SIGNAL sub_wire0 : STD_LOGIC ; - SIGNAL sub_wire1 : STD_LOGIC_VECTOR (1 DOWNTO 0); - SIGNAL sub_wire2_bv : BIT_VECTOR (0 DOWNTO 0); - SIGNAL sub_wire2 : STD_LOGIC_VECTOR (0 DOWNTO 0); - SIGNAL sub_wire3 : STD_LOGIC_VECTOR (4 DOWNTO 0); - SIGNAL sub_wire4 : STD_LOGIC ; - SIGNAL sub_wire5 : STD_LOGIC ; - SIGNAL sub_wire6 : STD_LOGIC ; - SIGNAL sub_wire7 : STD_LOGIC ; - - - - COMPONENT altpll - GENERIC ( - bandwidth_type : STRING; - clk0_divide_by : NATURAL; - clk0_duty_cycle : NATURAL; - clk0_multiply_by : NATURAL; - clk0_phase_shift : STRING; - clk1_divide_by : NATURAL; - clk1_duty_cycle : NATURAL; - clk1_multiply_by : NATURAL; - clk1_phase_shift : STRING; - clk2_divide_by : NATURAL; - clk2_duty_cycle : NATURAL; - clk2_multiply_by : NATURAL; - clk2_phase_shift : STRING; - compensate_clock : STRING; - inclk0_input_frequency : NATURAL; - intended_device_family : STRING; - lpm_hint : STRING; - lpm_type : STRING; - operation_mode : STRING; - pll_type : STRING; - port_activeclock : STRING; - port_areset : STRING; - port_clkbad0 : STRING; - port_clkbad1 : STRING; - port_clkloss : STRING; - port_clkswitch : STRING; - port_configupdate : STRING; - port_fbin : STRING; - port_inclk0 : STRING; - port_inclk1 : STRING; - port_locked : STRING; - port_pfdena : STRING; - port_phasecounterselect : STRING; - port_phasedone : STRING; - port_phasestep : STRING; - port_phaseupdown : STRING; - port_pllena : STRING; - port_scanaclr : STRING; - port_scanclk : STRING; - port_scanclkena : STRING; - port_scandata : STRING; - port_scandataout : STRING; - port_scandone : STRING; - port_scanread : STRING; - port_scanwrite : STRING; - port_clk0 : STRING; - port_clk1 : STRING; - port_clk2 : STRING; - port_clk3 : STRING; - port_clk4 : STRING; - port_clk5 : STRING; - port_clkena0 : STRING; - port_clkena1 : STRING; - port_clkena2 : STRING; - port_clkena3 : STRING; - port_clkena4 : STRING; - port_clkena5 : STRING; - port_extclk0 : STRING; - port_extclk1 : STRING; - port_extclk2 : STRING; - port_extclk3 : STRING; - self_reset_on_loss_lock : STRING; - width_clock : NATURAL - ); - PORT ( - inclk : IN STD_LOGIC_VECTOR (1 DOWNTO 0); - clk : OUT STD_LOGIC_VECTOR (4 DOWNTO 0); - locked : OUT STD_LOGIC - ); - END COMPONENT; - -BEGIN - sub_wire2_bv(0 DOWNTO 0) <= "0"; - sub_wire2 <= To_stdlogicvector(sub_wire2_bv); - sub_wire0 <= inclk0; - sub_wire1 <= sub_wire2(0 DOWNTO 0) & sub_wire0; - sub_wire6 <= sub_wire3(2); - sub_wire5 <= sub_wire3(1); - sub_wire4 <= sub_wire3(0); - c0 <= sub_wire4; - c1 <= sub_wire5; - c2 <= sub_wire6; - locked <= sub_wire7; - - altpll_component : altpll - GENERIC MAP ( - bandwidth_type => "AUTO", - clk0_divide_by => 5, - clk0_duty_cycle => 50, - clk0_multiply_by => 12, - clk0_phase_shift => "0", - clk1_divide_by => 5, - clk1_duty_cycle => 50, - clk1_multiply_by => 12, - clk1_phase_shift => "-2000", - clk2_divide_by => 5, - clk2_duty_cycle => 50, - clk2_multiply_by => 4, - clk2_phase_shift => "0", - compensate_clock => "CLK0", - inclk0_input_frequency => 20000, - intended_device_family => "MAX 10", - lpm_hint => "CBX_MODULE_PREFIX=max10_pll_120M_sdram", - lpm_type => "altpll", - operation_mode => "NORMAL", - pll_type => "AUTO", - port_activeclock => "PORT_UNUSED", - port_areset => "PORT_UNUSED", - port_clkbad0 => "PORT_UNUSED", - port_clkbad1 => "PORT_UNUSED", - port_clkloss => "PORT_UNUSED", - port_clkswitch => "PORT_UNUSED", - port_configupdate => "PORT_UNUSED", - port_fbin => "PORT_UNUSED", - port_inclk0 => "PORT_USED", - port_inclk1 => "PORT_UNUSED", - port_locked => "PORT_USED", - port_pfdena => "PORT_UNUSED", - port_phasecounterselect => "PORT_UNUSED", - port_phasedone => "PORT_UNUSED", - port_phasestep => "PORT_UNUSED", - port_phaseupdown => "PORT_UNUSED", - port_pllena => "PORT_UNUSED", - port_scanaclr => "PORT_UNUSED", - port_scanclk => "PORT_UNUSED", - port_scanclkena => "PORT_UNUSED", - port_scandata => "PORT_UNUSED", - port_scandataout => "PORT_UNUSED", - port_scandone => "PORT_UNUSED", - port_scanread => "PORT_UNUSED", - port_scanwrite => "PORT_UNUSED", - port_clk0 => "PORT_USED", - port_clk1 => "PORT_USED", - port_clk2 => "PORT_USED", - port_clk3 => "PORT_UNUSED", - port_clk4 => "PORT_UNUSED", - port_clk5 => "PORT_UNUSED", - port_clkena0 => "PORT_UNUSED", - port_clkena1 => "PORT_UNUSED", - port_clkena2 => "PORT_UNUSED", - port_clkena3 => "PORT_UNUSED", - port_clkena4 => "PORT_UNUSED", - port_clkena5 => "PORT_UNUSED", - port_extclk0 => "PORT_UNUSED", - port_extclk1 => "PORT_UNUSED", - port_extclk2 => "PORT_UNUSED", - port_extclk3 => "PORT_UNUSED", - self_reset_on_loss_lock => "OFF", - width_clock => 5 - ) - PORT MAP ( - inclk => sub_wire1, - clk => sub_wire3, - locked => sub_wire7 - ); - - - -END SYN; - --- ============================================================ --- CNX file retrieval info --- ============================================================ --- Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0" --- Retrieval info: PRIVATE: BANDWIDTH STRING "1.000" --- Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1" --- Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz" --- Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low" --- Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1" --- Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0" --- Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0" --- Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0" --- Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0" --- Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0" --- Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0" --- Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0" --- Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0" --- Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0" --- Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "Any" --- Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "5" --- Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "5" --- Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC "5" --- Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000" --- Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000" --- Retrieval info: PRIVATE: DUTY_CYCLE2 STRING "50.00000000" --- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "120.000000" --- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "120.000000" --- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING "40.000000" --- Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0" --- Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0" --- Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1" --- Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0" --- Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0" --- Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575" --- Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1" --- Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "50.000" --- Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz" --- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000" --- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1" --- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1" --- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz" --- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "MAX 10" --- Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1" --- Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "1" --- Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1" --- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available" --- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0" --- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg" --- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "deg" --- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT2 STRING "deg" --- Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any" --- Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0" --- Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0" --- Retrieval info: PRIVATE: MIRROR_CLK2 STRING "0" --- Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "12" --- Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "12" --- Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC "4" --- Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1" --- Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "120.00000000" --- Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "120.00000000" --- Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING "40.00000000" --- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0" --- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "0" --- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING "0" --- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz" --- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz" --- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT2 STRING "MHz" --- Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1" --- Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0" --- Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000" --- Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "-2.00000000" --- Retrieval info: PRIVATE: PHASE_SHIFT2 STRING "0.00000000" --- Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0" --- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg" --- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "ns" --- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT2 STRING "deg" --- Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0" --- Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0" --- Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1" --- Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0" --- Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0" --- Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0" --- Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0" --- Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0" --- Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0" --- Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0" --- Retrieval info: PRIVATE: RECONFIG_FILE STRING "max10_pll_120M_sdram.mif" --- Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0" --- Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "1" --- Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0" --- Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0" --- Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0" --- Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000" --- Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz" --- Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500" --- Retrieval info: PRIVATE: SPREAD_USE STRING "0" --- Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0" --- Retrieval info: PRIVATE: STICKY_CLK0 STRING "1" --- Retrieval info: PRIVATE: STICKY_CLK1 STRING "1" --- Retrieval info: PRIVATE: STICKY_CLK2 STRING "1" --- Retrieval info: PRIVATE: STICKY_CLK3 STRING "0" --- Retrieval info: PRIVATE: STICKY_CLK4 STRING "0" --- Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1" --- Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1" --- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" --- Retrieval info: PRIVATE: USE_CLK0 STRING "1" --- Retrieval info: PRIVATE: USE_CLK1 STRING "1" --- Retrieval info: PRIVATE: USE_CLK2 STRING "1" --- Retrieval info: PRIVATE: USE_CLKENA0 STRING "0" --- Retrieval info: PRIVATE: USE_CLKENA1 STRING "0" --- Retrieval info: PRIVATE: USE_CLKENA2 STRING "0" --- Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0" --- Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0" --- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all --- Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO" --- Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "5" --- Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50" --- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "12" --- Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0" --- Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "5" --- Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50" --- Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "12" --- Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "-2000" --- Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "5" --- Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC "50" --- Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC "4" --- Retrieval info: CONSTANT: CLK2_PHASE_SHIFT STRING "0" --- Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0" --- Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "20000" --- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "MAX 10" --- Retrieval info: CONSTANT: LPM_TYPE STRING "altpll" --- Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL" --- Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO" --- Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED" --- Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_USED" --- Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED" --- Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_USED" --- Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_USED" --- Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED" --- Retrieval info: CONSTANT: SELF_RESET_ON_LOSS_LOCK STRING "OFF" --- Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "5" --- Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]" --- Retrieval info: USED_PORT: @inclk 0 0 2 0 INPUT_CLK_EXT VCC "@inclk[1..0]" --- Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0" --- Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1" --- Retrieval info: USED_PORT: c2 0 0 0 0 OUTPUT_CLK_EXT VCC "c2" --- Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0" --- Retrieval info: USED_PORT: locked 0 0 0 0 OUTPUT GND "locked" --- Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0 --- Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0 --- Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0 --- Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1 --- Retrieval info: CONNECT: c2 0 0 0 0 @clk 0 0 1 2 --- Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0 --- Retrieval info: GEN_FILE: TYPE_NORMAL max10_pll_120M_sdram.vhd TRUE --- Retrieval info: GEN_FILE: TYPE_NORMAL max10_pll_120M_sdram.ppf TRUE --- Retrieval info: GEN_FILE: TYPE_NORMAL max10_pll_120M_sdram.inc FALSE --- Retrieval info: GEN_FILE: TYPE_NORMAL max10_pll_120M_sdram.cmp FALSE --- Retrieval info: GEN_FILE: TYPE_NORMAL max10_pll_120M_sdram.bsf FALSE --- Retrieval info: GEN_FILE: TYPE_NORMAL max10_pll_120M_sdram_inst.vhd FALSE --- Retrieval info: LIB_FILE: altera_mf --- Retrieval info: CBX_MODULE_PREFIX: ON diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/de10_lite/spy_hunter_de10_lite.qpf b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/de10_lite/spy_hunter_de10_lite.qpf deleted file mode 100644 index da91b0c7..00000000 --- a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/de10_lite/spy_hunter_de10_lite.qpf +++ /dev/null @@ -1,31 +0,0 @@ -# -------------------------------------------------------------------------- # -# -# Copyright (C) 2018 Intel Corporation. All rights reserved. -# Your use of Intel Corporation's design tools, logic functions -# and other software and tools, and its AMPP partner logic -# functions, and any output files from any of the foregoing -# (including device programming or simulation files), and any -# associated documentation or information are expressly subject -# to the terms and conditions of the Intel Program License -# Subscription Agreement, the Intel Quartus Prime License Agreement, -# the Intel FPGA IP License Agreement, or other applicable license -# agreement, including, without limitation, that your use is for -# the sole purpose of programming logic devices manufactured by -# Intel and sold by Intel or its authorized distributors. Please -# refer to the applicable agreement for further details. -# -# -------------------------------------------------------------------------- # -# -# Quartus Prime -# Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition -# Date created = 08:31:19 December 08, 2019 -# -# -------------------------------------------------------------------------- # - -QUARTUS_VERSION = "18.1" -DATE = "08:31:19 December 08, 2019" - -# Revisions - -PROJECT_REVISION = "spy_hunter_de10_lite" -PROJECT_REVISION = "spy_hunter_de10_lite" diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/de10_lite/spy_hunter_de10_lite.qsf b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/de10_lite/spy_hunter_de10_lite.qsf deleted file mode 100644 index eb6c1029..00000000 --- a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/de10_lite/spy_hunter_de10_lite.qsf +++ /dev/null @@ -1,482 +0,0 @@ -# -------------------------------------------------------------------------- # -# -# Copyright (C) 2018 Intel Corporation. All rights reserved. -# Your use of Intel Corporation's design tools, logic functions -# and other software and tools, and its AMPP partner logic -# functions, and any output files from any of the foregoing -# (including device programming or simulation files), and any -# associated documentation or information are expressly subject -# to the terms and conditions of the Intel Program License -# Subscription Agreement, the Intel Quartus Prime License Agreement, -# the Intel FPGA IP License Agreement, or other applicable license -# agreement, including, without limitation, that your use is for -# the sole purpose of programming logic devices manufactured by -# Intel and sold by Intel or its authorized distributors. Please -# refer to the applicable agreement for further details. -# -# -------------------------------------------------------------------------- # -# -# Quartus Prime -# Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition -# Date created = 18:26:07 November 15, 2019 -# -# -------------------------------------------------------------------------- # -# -# Notes: -# -# 1) The default values for assignments are stored in the file: -# spy_hunter_de10_lite_assignment_defaults.qdf -# If this file doesn't exist, see file: -# assignment_defaults.qdf -# -# 2) Altera recommends that you do not modify this file. This -# file is updated automatically by the Quartus Prime software -# and any changes you make may be lost or overwritten. -# -# -------------------------------------------------------------------------- # - - -set_global_assignment -name FAMILY "MAX 10" -set_global_assignment -name DEVICE 10M50DAF484C6GES -set_global_assignment -name TOP_LEVEL_ENTITY spy_hunter_de10_lite -set_global_assignment -name ORIGINAL_QUARTUS_VERSION 15.1.0 -set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:45:13 JUNE 17,2016" -set_global_assignment -name LAST_QUARTUS_VERSION "18.1.0 Lite Edition" -set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files -set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA -set_global_assignment -name DEVICE_FILTER_PIN_COUNT 484 -set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 6 -set_location_assignment PIN_N5 -to ADC_CLK_10 -set_location_assignment PIN_P11 -to MAX10_CLK1_50 -set_location_assignment PIN_N14 -to MAX10_CLK2_50 -set_location_assignment PIN_U17 -to DRAM_ADDR[0] -set_location_assignment PIN_W19 -to DRAM_ADDR[1] -set_location_assignment PIN_V18 -to DRAM_ADDR[2] -set_location_assignment PIN_U18 -to DRAM_ADDR[3] -set_location_assignment PIN_U19 -to DRAM_ADDR[4] -set_location_assignment PIN_T18 -to DRAM_ADDR[5] -set_location_assignment PIN_T19 -to DRAM_ADDR[6] -set_location_assignment PIN_R18 -to DRAM_ADDR[7] -set_location_assignment PIN_P18 -to DRAM_ADDR[8] -set_location_assignment PIN_P19 -to DRAM_ADDR[9] -set_location_assignment PIN_T20 -to DRAM_ADDR[10] -set_location_assignment PIN_P20 -to DRAM_ADDR[11] -set_location_assignment PIN_R20 -to DRAM_ADDR[12] -set_location_assignment PIN_T21 -to DRAM_BA[0] -set_location_assignment PIN_T22 -to DRAM_BA[1] -set_location_assignment PIN_U21 -to DRAM_CAS_N -set_location_assignment PIN_N22 -to DRAM_CKE -set_location_assignment PIN_L14 -to DRAM_CLK -set_location_assignment PIN_U20 -to DRAM_CS_N -set_location_assignment PIN_Y21 -to DRAM_DQ[0] -set_location_assignment PIN_Y20 -to DRAM_DQ[1] -set_location_assignment PIN_AA22 -to DRAM_DQ[2] -set_location_assignment PIN_AA21 -to DRAM_DQ[3] -set_location_assignment PIN_Y22 -to DRAM_DQ[4] -set_location_assignment PIN_W22 -to DRAM_DQ[5] -set_location_assignment PIN_W20 -to DRAM_DQ[6] -set_location_assignment PIN_V21 -to DRAM_DQ[7] -set_location_assignment PIN_P21 -to DRAM_DQ[8] -set_location_assignment PIN_J22 -to DRAM_DQ[9] -set_location_assignment PIN_H21 -to DRAM_DQ[10] -set_location_assignment PIN_H22 -to DRAM_DQ[11] -set_location_assignment PIN_G22 -to DRAM_DQ[12] -set_location_assignment PIN_G20 -to DRAM_DQ[13] -set_location_assignment PIN_G19 -to DRAM_DQ[14] -set_location_assignment PIN_F22 -to DRAM_DQ[15] -set_location_assignment PIN_V22 -to DRAM_LDQM -set_location_assignment PIN_U22 -to DRAM_RAS_N -set_location_assignment PIN_J21 -to DRAM_UDQM -set_location_assignment PIN_V20 -to DRAM_WE_N -set_location_assignment PIN_C14 -to HEX0[0] -set_location_assignment PIN_E15 -to HEX0[1] -set_location_assignment PIN_C15 -to HEX0[2] -set_location_assignment PIN_C16 -to HEX0[3] -set_location_assignment PIN_E16 -to HEX0[4] -set_location_assignment PIN_D17 -to HEX0[5] -set_location_assignment PIN_C17 -to HEX0[6] -set_location_assignment PIN_D15 -to HEX0[7] -set_location_assignment PIN_C18 -to HEX1[0] -set_location_assignment PIN_D18 -to HEX1[1] -set_location_assignment PIN_E18 -to HEX1[2] -set_location_assignment PIN_B16 -to HEX1[3] -set_location_assignment PIN_A17 -to HEX1[4] -set_location_assignment PIN_A18 -to HEX1[5] -set_location_assignment PIN_B17 -to HEX1[6] -set_location_assignment PIN_A16 -to HEX1[7] -set_location_assignment PIN_B20 -to HEX2[0] -set_location_assignment PIN_A20 -to HEX2[1] -set_location_assignment PIN_B19 -to HEX2[2] -set_location_assignment PIN_A21 -to HEX2[3] -set_location_assignment PIN_B21 -to HEX2[4] -set_location_assignment PIN_C22 -to HEX2[5] -set_location_assignment PIN_B22 -to HEX2[6] -set_location_assignment PIN_A19 -to HEX2[7] -set_location_assignment PIN_F21 -to HEX3[0] -set_location_assignment PIN_E22 -to HEX3[1] -set_location_assignment PIN_E21 -to HEX3[2] -set_location_assignment PIN_C19 -to HEX3[3] -set_location_assignment PIN_C20 -to HEX3[4] -set_location_assignment PIN_D19 -to HEX3[5] -set_location_assignment PIN_E17 -to HEX3[6] -set_location_assignment PIN_D22 -to HEX3[7] -set_location_assignment PIN_F18 -to HEX4[0] -set_location_assignment PIN_E20 -to HEX4[1] -set_location_assignment PIN_E19 -to HEX4[2] -set_location_assignment PIN_J18 -to HEX4[3] -set_location_assignment PIN_H19 -to HEX4[4] -set_location_assignment PIN_F19 -to HEX4[5] -set_location_assignment PIN_F20 -to HEX4[6] -set_location_assignment PIN_F17 -to HEX4[7] -set_location_assignment PIN_J20 -to HEX5[0] -set_location_assignment PIN_K20 -to HEX5[1] -set_location_assignment PIN_L18 -to HEX5[2] -set_location_assignment PIN_N18 -to HEX5[3] -set_location_assignment PIN_M20 -to HEX5[4] -set_location_assignment PIN_N19 -to HEX5[5] -set_location_assignment PIN_N20 -to HEX5[6] -set_location_assignment PIN_L19 -to HEX5[7] -set_location_assignment PIN_B8 -to KEY[0] -set_location_assignment PIN_A7 -to KEY[1] -set_location_assignment PIN_A8 -to LEDR[0] -set_location_assignment PIN_A9 -to LEDR[1] -set_location_assignment PIN_A10 -to LEDR[2] -set_location_assignment PIN_B10 -to LEDR[3] -set_location_assignment PIN_D13 -to LEDR[4] -set_location_assignment PIN_C13 -to LEDR[5] -set_location_assignment PIN_E14 -to LEDR[6] -set_location_assignment PIN_D14 -to LEDR[7] -set_location_assignment PIN_A11 -to LEDR[8] -set_location_assignment PIN_B11 -to LEDR[9] -set_location_assignment PIN_C10 -to SW[0] -set_location_assignment PIN_C11 -to SW[1] -set_location_assignment PIN_D12 -to SW[2] -set_location_assignment PIN_C12 -to SW[3] -set_location_assignment PIN_A12 -to SW[4] -set_location_assignment PIN_B12 -to SW[5] -set_location_assignment PIN_A13 -to SW[6] -set_location_assignment PIN_A14 -to SW[7] -set_location_assignment PIN_B14 -to SW[8] -set_location_assignment PIN_F15 -to SW[9] -set_location_assignment PIN_P1 -to VGA_B[0] -set_location_assignment PIN_T1 -to VGA_B[1] -set_location_assignment PIN_P4 -to VGA_B[2] -set_location_assignment PIN_N2 -to VGA_B[3] -set_location_assignment PIN_W1 -to VGA_G[0] -set_location_assignment PIN_T2 -to VGA_G[1] -set_location_assignment PIN_R2 -to VGA_G[2] -set_location_assignment PIN_R1 -to VGA_G[3] -set_location_assignment PIN_N3 -to VGA_HS -set_location_assignment PIN_AA1 -to VGA_R[0] -set_location_assignment PIN_V1 -to VGA_R[1] -set_location_assignment PIN_Y2 -to VGA_R[2] -set_location_assignment PIN_Y1 -to VGA_R[3] -set_location_assignment PIN_N1 -to VGA_VS -set_location_assignment PIN_AB16 -to GSENSOR_CS_N -set_location_assignment PIN_Y14 -to GSENSOR_INT[1] -set_location_assignment PIN_Y13 -to GSENSOR_INT[2] -set_location_assignment PIN_AB15 -to GSENSOR_SCLK -set_location_assignment PIN_V11 -to GSENSOR_SDI -set_location_assignment PIN_V12 -to GSENSOR_SDO -set_location_assignment PIN_AB5 -to ARDUINO_IO[0] -set_location_assignment PIN_AB6 -to ARDUINO_IO[1] -set_location_assignment PIN_AB7 -to ARDUINO_IO[2] -set_location_assignment PIN_AB8 -to ARDUINO_IO[3] -set_location_assignment PIN_AB9 -to ARDUINO_IO[4] -set_location_assignment PIN_Y10 -to ARDUINO_IO[5] -set_location_assignment PIN_AA11 -to ARDUINO_IO[6] -set_location_assignment PIN_AA12 -to ARDUINO_IO[7] -set_location_assignment PIN_AB17 -to ARDUINO_IO[8] -set_location_assignment PIN_AA17 -to ARDUINO_IO[9] -set_location_assignment PIN_AB19 -to ARDUINO_IO[10] -set_location_assignment PIN_AA19 -to ARDUINO_IO[11] -set_location_assignment PIN_Y19 -to ARDUINO_IO[12] -set_location_assignment PIN_AB20 -to ARDUINO_IO[13] -set_location_assignment PIN_AB21 -to ARDUINO_IO[14] -set_location_assignment PIN_AA20 -to ARDUINO_IO[15] -set_location_assignment PIN_F16 -to ARDUINO_RESET_N -set_location_assignment PIN_V10 -to GPIO[0] -set_location_assignment PIN_W10 -to GPIO[1] -set_location_assignment PIN_V9 -to GPIO[2] -set_location_assignment PIN_W9 -to GPIO[3] -set_location_assignment PIN_V8 -to GPIO[4] -set_location_assignment PIN_W8 -to GPIO[5] -set_location_assignment PIN_V7 -to GPIO[6] -set_location_assignment PIN_W7 -to GPIO[7] -set_location_assignment PIN_W6 -to GPIO[8] -set_location_assignment PIN_V5 -to GPIO[9] -set_location_assignment PIN_W5 -to GPIO[10] -set_location_assignment PIN_AA15 -to GPIO[11] -set_location_assignment PIN_AA14 -to GPIO[12] -set_location_assignment PIN_W13 -to GPIO[13] -set_location_assignment PIN_W12 -to GPIO[14] -set_location_assignment PIN_AB13 -to GPIO[15] -set_location_assignment PIN_AB12 -to GPIO[16] -set_location_assignment PIN_Y11 -to GPIO[17] -set_location_assignment PIN_AB11 -to GPIO[18] -set_location_assignment PIN_W11 -to GPIO[19] -set_location_assignment PIN_AB10 -to GPIO[20] -set_location_assignment PIN_AA10 -to GPIO[21] -set_location_assignment PIN_AA9 -to GPIO[22] -set_location_assignment PIN_Y8 -to GPIO[23] -set_location_assignment PIN_AA8 -to GPIO[24] -set_location_assignment PIN_Y7 -to GPIO[25] -set_location_assignment PIN_AA7 -to GPIO[26] -set_location_assignment PIN_Y6 -to GPIO[27] -set_location_assignment PIN_AA6 -to GPIO[28] -set_location_assignment PIN_Y5 -to GPIO[29] -set_location_assignment PIN_AA5 -to GPIO[30] -set_location_assignment PIN_Y4 -to GPIO[31] -set_location_assignment PIN_AB3 -to GPIO[32] -set_location_assignment PIN_Y3 -to GPIO[33] -set_location_assignment PIN_AB2 -to GPIO[34] -set_location_assignment PIN_AA2 -to GPIO[35] -set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 -set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 -set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW" -set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)" -set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)" -set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation -set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation -set_global_assignment -name ENABLE_OCT_DONE ON -set_global_assignment -name EXTERNAL_FLASH_FALLBACK_ADDRESS 00000000 -set_global_assignment -name USE_CONFIGURATION_DEVICE OFF -set_global_assignment -name INTERNAL_FLASH_UPDATE_MODE "SINGLE COMP IMAGE WITH ERAM" -set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF -set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise -set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall -set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise -set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall -set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top -set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top -set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_CLK_10 -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to MAX10_CLK1_50 -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to MAX10_CLK2_50 -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[0] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[1] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[2] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[3] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[4] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[5] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[6] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[7] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[8] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[9] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[10] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[11] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[12] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_BA[0] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_BA[1] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CAS_N -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CKE -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CLK -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CS_N -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[0] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[1] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[2] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[3] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[4] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[5] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[6] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[7] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[8] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[9] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[10] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[11] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[12] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[13] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[14] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[15] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_LDQM -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_RAS_N -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_UDQM -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_WE_N -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[0] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[1] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[2] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[3] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[4] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[5] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[6] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX0[7] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[0] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[1] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[2] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[3] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[4] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[5] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[6] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX1[7] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[0] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[1] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[2] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[3] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[4] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[5] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[6] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX2[7] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[0] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[1] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[2] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[3] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[4] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[5] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[6] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX3[7] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[0] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[1] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[2] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[3] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[4] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[5] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[6] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX4[7] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[0] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[1] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[2] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[3] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[4] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[5] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[6] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HEX5[7] -set_instance_assignment -name IO_STANDARD "3.3 V SCHMITT TRIGGER" -to KEY[0] -set_instance_assignment -name IO_STANDARD "3.3 V SCHMITT TRIGGER" -to KEY[1] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[0] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[1] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[2] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[3] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[4] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[5] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[6] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[7] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[8] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LEDR[9] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[0] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[1] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[2] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[3] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[4] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[5] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[6] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[7] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[8] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[9] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[0] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[1] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[2] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_B[3] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[0] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[1] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[2] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_G[3] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_HS -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[0] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[1] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[2] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_R[3] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VGA_VS -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GSENSOR_CS_N -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GSENSOR_INT[1] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GSENSOR_INT[2] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GSENSOR_SCLK -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GSENSOR_SDI -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GSENSOR_SDO -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[0] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[1] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[2] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[3] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[4] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[5] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[6] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[7] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[8] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[9] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[10] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[11] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[12] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[13] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[14] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_IO[15] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_RESET_N -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[0] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[1] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[2] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[3] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[4] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[5] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[6] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[7] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[8] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[9] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[10] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[11] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[12] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[13] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[14] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[15] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[16] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[17] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[18] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[19] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[20] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[21] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[22] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[23] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[24] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[25] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[26] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[27] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[28] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[29] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[30] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[31] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[32] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[33] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[34] -set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[35] -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to dram_cke -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to dram_clk -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to dram_cs_n -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to dram_ldqm -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to dram_ras_n -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to dram_udqm -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to dram_we_n -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to dram_addr -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to dram_ba -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to dram_cas_n -set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to dram_dq -set_instance_assignment -name FAST_INPUT_REGISTER ON -to dram_dq -set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to dram_dq -set_global_assignment -name ENABLE_SIGNALTAP OFF -set_global_assignment -name USE_SIGNALTAP_FILE cpu.stp -set_global_assignment -name VHDL_FILE ../rtl_dar/test_char_ram.vhd -set_global_assignment -name VHDL_FILE ../rtl_dar/proms/spy_hunter_sound_cpu.vhd -set_global_assignment -name VHDL_FILE ../rtl_dar/spy_hunter_sound_board.vhd -set_global_assignment -name VHDL_FILE ../rtl_dar/proms/spy_hunter_ch_bits.vhd -set_global_assignment -name QIP_FILE max10_pll_120M_sdram.qip -set_global_assignment -name SYSTEMVERILOG_FILE ../rtl_dar/sdram.sv -set_global_assignment -name SDC_FILE spy_hunter_de10_lite.sdc -set_global_assignment -name VHDL_FILE ../rtl_t80_304/T80se.vhd -set_global_assignment -name VHDL_FILE ../rtl_t80_304/T80_Reg.vhd -set_global_assignment -name VHDL_FILE ../rtl_t80_304/T80_Pack.vhd -set_global_assignment -name VHDL_FILE ../rtl_t80_304/T80_MCode.vhd -set_global_assignment -name VHDL_FILE ../rtl_t80_304/T80_ALU.vhd -set_global_assignment -name VHDL_FILE ../rtl_t80_304/T80.vhd -set_global_assignment -name VHDL_FILE ../rtl_mikej/YM2149_linmix_sep.vhd -set_global_assignment -name VHDL_FILE ../rtl_dar/proms/midssio_82s123.vhd -set_global_assignment -name VHDL_FILE ../rtl_dar/proms/spy_hunter_cpu.vhd -set_global_assignment -name VHDL_FILE ../rtl_dar/proms/spy_hunter_bg_bits_2.vhd -set_global_assignment -name VHDL_FILE ../rtl_dar/proms/spy_hunter_bg_bits_1.vhd -set_global_assignment -name VHDL_FILE ../rtl_dar/kbd_joystick.vhd -set_global_assignment -name VHDL_FILE ../rtl_dar/io_ps2_keyboard.vhd -set_global_assignment -name VHDL_FILE ../rtl_dar/gen_ram.vhd -set_global_assignment -name VHDL_FILE ../rtl_dar/spy_hunter_de10_lite.vhd -set_global_assignment -name VHDL_FILE ../rtl_dar/spy_hunter.vhd -set_global_assignment -name VHDL_FILE ../rtl_dar/decodeur_7_seg.vhd -set_global_assignment -name VHDL_FILE ../rtl_dar/ctc_counter.vhd -set_global_assignment -name VHDL_FILE ../rtl_dar/ctc_controler.vhd -set_global_assignment -name VHDL_FILE ../rtl_dar/cmos_ram.vhd -set_global_assignment -name SIGNALTAP_FILE output_files/sdram_sprites.stp -set_global_assignment -name SIGNALTAP_FILE cpu.stp -set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/de10_lite/spy_hunter_de10_lite.sdc b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/de10_lite/spy_hunter_de10_lite.sdc deleted file mode 100644 index e8a946f4..00000000 --- a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/de10_lite/spy_hunter_de10_lite.sdc +++ /dev/null @@ -1,7 +0,0 @@ -create_clock -name clk1_50 -period 20 [get_ports {max10_clk1_50}] - - -derive_pll_clocks -create_base_clocks - -derive_clock_uncertainty - diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/rtl_dar/decodeur_7_seg.vhd b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/rtl_dar/decodeur_7_seg.vhd deleted file mode 100644 index 05d15d50..00000000 --- a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/rtl_dar/decodeur_7_seg.vhd +++ /dev/null @@ -1,35 +0,0 @@ -library ieee; -use ieee.std_logic_1164.all,ieee.numeric_std.all; - - -entity decodeur_7_seg is -port( - di : in std_logic_vector(3 downto 0); - do : out std_logic_vector(7 downto 0) -); -end decodeur_7_seg; - -architecture struct of decodeur_7_seg is - -begin - -with di select - do <= - "11000000" when "0000", - "11111001" when "0001", - "10100100" when "0010", - "10110000" when "0011", - "10011001" when "0100", - "10010010" when "0101", - "10000010" when "0110", - "11111000" when "0111", - "10000000" when "1000", - "10010000" when "1001", - "10001000" when "1010", - "10000011" when "1011", - "11000110" when "1100", - "10100001" when "1101", - "10000110" when "1110", - "10001110" when others; - -end architecture; \ No newline at end of file diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/rtl_dar/io_ps2_keyboard.vhd b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/rtl_dar/io_ps2_keyboard.vhd deleted file mode 100644 index f2ffa462..00000000 --- a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/rtl_dar/io_ps2_keyboard.vhd +++ /dev/null @@ -1,77 +0,0 @@ --- ----------------------------------------------------------------------- --- --- FPGA 64 --- --- A fully functional commodore 64 implementation in a single FPGA --- --- ----------------------------------------------------------------------- --- Copyright 2005-2008 by Peter Wendrich (pwsoft@syntiac.com) --- http://www.syntiac.com/fpga64.html --- ----------------------------------------------------------------------- - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -entity io_ps2_keyboard is - port ( - clk: in std_logic; - kbd_clk: in std_logic; - kbd_dat: in std_logic; - - interrupt: out std_logic; - scanCode: out std_logic_vector(7 downto 0) - ); -end io_ps2_keyboard; - -architecture Behavioral of io_ps2_keyboard is - signal clk_reg: std_logic; - signal clk_waitNextBit: std_logic; - signal clk_filter: integer range 0 to 15; - signal shift_reg: std_logic_vector(10 downto 0) := (others => '0'); - - signal bitsCount: integer range 0 to 10 := 0; - signal timeout: integer range 0 to 5000 := 0; -- 2* 50 us at 50 Mhz -begin - process(clk) - begin - if rising_edge(clk) then - -- Interrupt is edge triggered. Only 1 clock high. - interrupt <= '0'; - - -- Timeout if keyboard does not send anymore. - if timeout /= 0 then - timeout <= timeout - 1; - else - bitsCount <= 0; - end if; - - -- Filter glitches on the clock - if (clk_reg /= kbd_clk) then - clk_filter <= 15; -- Wait 15 ticks - clk_reg <= kbd_clk; -- Store clock edge to detect changes - clk_waitNextBit <= '0'; -- Next bit comming up... - elsif (clk_filter /= 0) then - -- Wait for clock to stabilise - -- Clock must be stable before we sample the data line. - clk_filter <= clk_filter - 1; - elsif (clk_reg = '1') and (clk_waitNextBit = '0') then - -- We have a stable clock, so assume stable data too. - clk_waitNextBit <= '1'; - - -- Move data into shift register - shift_reg <= kbd_dat & shift_reg(10 downto 1); - timeout <= 5000; - if bitsCount < 10 then - bitsCount <= bitsCount + 1; - else - -- 10 bits received. Output new scancode - bitsCount <= 0; - interrupt <= '1'; - scanCode <= shift_reg(9 downto 2); - end if; - end if; - end if; - end process; - -end Behavioral; diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/rtl_dar/kbd_joystick.vhd b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/rtl_dar/kbd_joystick.vhd deleted file mode 100644 index d9255e90..00000000 --- a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/rtl_dar/kbd_joystick.vhd +++ /dev/null @@ -1,65 +0,0 @@ -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; -use IEEE.numeric_std.ALL; - -entity Kbd_Joystick is -port ( - Clk : in std_logic; - KbdInt : in std_logic; - KbdScanCode : in std_logic_vector(7 downto 0); - joy_BBBBFRLDU : out std_logic_vector(8 downto 0); - fn_pulse : inout std_logic_vector(7 downto 0); - fn_toggle : inout std_logic_vector(7 downto 0) -); -end Kbd_Joystick; - -architecture Behavioral of Kbd_Joystick is - -signal IsReleased : std_logic; -signal fn_pulse_r : std_logic_vector(7 downto 0); - -begin - -process(Clk) -begin - if rising_edge(Clk) then - - fn_pulse_r <= fn_pulse; - - if KbdInt = '1' then - if KbdScanCode = x"F0" then IsReleased <= '1'; else IsReleased <= '0'; end if; - if KbdScanCode = x"75" then joy_BBBBFRLDU(0) <= not(IsReleased); end if; -- up - if KbdScanCode = x"72" then joy_BBBBFRLDU(1) <= not(IsReleased); end if; -- down - if KbdScanCode = x"6B" then joy_BBBBFRLDU(2) <= not(IsReleased); end if; -- left - if KbdScanCode = x"74" then joy_BBBBFRLDU(3) <= not(IsReleased); end if; -- right - if KbdScanCode = x"29" then joy_BBBBFRLDU(4) <= not(IsReleased); end if; -- space - if KbdScanCode = x"2B" then joy_BBBBFRLDU(5) <= not(IsReleased); end if; -- f - if KbdScanCode = x"34" then joy_BBBBFRLDU(6) <= not(IsReleased); end if; -- g - if KbdScanCode = x"2C" then joy_BBBBFRLDU(7) <= not(IsReleased); end if; -- t - if KbdScanCode = x"2A" then joy_BBBBFRLDU(8) <= not(IsReleased); end if; -- v - - if KbdScanCode = x"05" then fn_pulse(0) <= not(IsReleased); end if; -- F1 - if KbdScanCode = x"06" then fn_pulse(1) <= not(IsReleased); end if; -- F2 - if KbdScanCode = x"04" then fn_pulse(2) <= not(IsReleased); end if; -- F3 - if KbdScanCode = x"0C" then fn_pulse(3) <= not(IsReleased); end if; -- F4 - if KbdScanCode = x"03" then fn_pulse(4) <= not(IsReleased); end if; -- F5 - if KbdScanCode = x"0B" then fn_pulse(5) <= not(IsReleased); end if; -- F6 - if KbdScanCode = x"83" then fn_pulse(6) <= not(IsReleased); end if; -- F7 - if KbdScanCode = x"0A" then fn_pulse(7) <= not(IsReleased); end if; -- F8 - end if; - - if fn_pulse_r(0) = '1' and fn_pulse(0) = '0' then fn_toggle(0) <= not fn_toggle(0); end if; - if fn_pulse_r(1) = '1' and fn_pulse(1) = '0' then fn_toggle(1) <= not fn_toggle(1); end if; - if fn_pulse_r(2) = '1' and fn_pulse(2) = '0' then fn_toggle(2) <= not fn_toggle(2); end if; - if fn_pulse_r(3) = '1' and fn_pulse(3) = '0' then fn_toggle(3) <= not fn_toggle(3); end if; - if fn_pulse_r(4) = '1' and fn_pulse(4) = '0' then fn_toggle(4) <= not fn_toggle(4); end if; - if fn_pulse_r(5) = '1' and fn_pulse(5) = '0' then fn_toggle(5) <= not fn_toggle(5); end if; - if fn_pulse_r(6) = '1' and fn_pulse(6) = '0' then fn_toggle(6) <= not fn_toggle(6); end if; - if fn_pulse_r(7) = '1' and fn_pulse(7) = '0' then fn_toggle(7) <= not fn_toggle(7); end if; - - end if; -end process; - -end Behavioral; - - diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/rtl_dar/sdram.sv b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/rtl_dar/sdram.sv deleted file mode 100644 index de815a55..00000000 --- a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/rtl_dar/sdram.sv +++ /dev/null @@ -1,150 +0,0 @@ -// -// sdram.v -// -// (Darfpga configuration for 1x8bits write / 8x16bits read - 01/12/2019) -// -// sdram controller implementation for the MiST board adaptation -// of Luddes NES core -// http://code.google.com/p/mist-board/ -// -// Copyright (c) 2013 Till Harbaum -// -// This source file is free software: you can redistribute it and/or modify -// it under the terms of the GNU General Public License as published -// by the Free Software Foundation, either version 3 of the License, or -// (at your option) any later version. -// -// This source file is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program. If not, see . -// - -module sdram ( - - // interface to the MT48LC16M16 chip - inout [15:0] sd_data, // 16 bit bidirectional data bus - output [12:0] sd_addr, // 13 bit multiplexed address bus - output [1:0] sd_dqm, // two byte masks - output [1:0] sd_ba, // two banks - output sd_cs, // a single chip select - output sd_we, // write enable - output sd_ras, // row address select - output sd_cas, // columns address select - - // cpu/chipset interface - input init, // init signal after FPGA config to initialize RAM - input clk, // sdram is accessed at up to 128MHz - - input [24:0] addr, // 25 bit byte address - input we, // requests write - input [7:0] di, // data input - input rd, // requests data - output[4:0] sm_cycle // state machine cycle - -); - -// burst 8 data configured -localparam RASCAS_DELAY = 3'd3; // tRCD=20ns -> 3 cycles@130MHz -localparam BURST_LENGTH = 3'b011; // 000=1, 001=2, 010=4, 011=8 -localparam ACCESS_TYPE = 1'b0; // 0=sequential, 1=interleaved -localparam CAS_LATENCY = 3'd2; // 2/3 allowed -localparam OP_MODE = 2'b00; // only 00 (standard operation) allowed -localparam NO_WRITE_BURST = 1'b1; // 0= write burst enabled, 1=only single access write - -localparam MODE = { 3'b000, NO_WRITE_BURST, OP_MODE, CAS_LATENCY, ACCESS_TYPE, BURST_LENGTH}; - -// --------------------------------------------------------------------- -// ------------------------ cycle state machine ------------------------ -// --------------------------------------------------------------------- - -localparam STATE_FIRST = 5'd0; // first state in cycle -localparam STATE_CMD_START = 5'd1; // state in which a new command can be started -localparam STATE_CMD_CONT = STATE_CMD_START + RASCAS_DELAY; // 4 command can be continued -localparam STATE_CMD_REF1 = 5'd17; // last state in cycle -localparam STATE_CMD_REF2 = 5'd22; // last state in cycle -localparam STATE_LAST = 5'd31; // last state in cycle - -reg [4:0] q; -always @(posedge clk) begin - // SDRAM (state machine) - // wait for read or write to start cycle - if (q == STATE_LAST) q <= STATE_FIRST; - else if ((q == STATE_FIRST) && (we || rd) || (q != STATE_FIRST)) q <= q + 5'd1; -end - -assign sm_cycle = q; - -// --------------------------------------------------------------------- -// --------------------------- startup/reset --------------------------- -// --------------------------------------------------------------------- - -// wait 700us (85000 cycles) after FPGA config is done before going -// into normal operation. Initialize the ram in the last 16 reset cycles (cycles 15-0) -reg [16:0] reset; -always @(posedge clk) begin - if(init) reset <= 17'h14c08; - else if((q == STATE_LAST) && (reset != 0)) - reset <= reset - 17'd1; -end - -// --------------------------------------------------------------------- -// ------------------ generate ram control signals --------------------- -// --------------------------------------------------------------------- - -// all possible commands -localparam CMD_INHIBIT = 4'b1111; -localparam CMD_NOP = 4'b0111; -localparam CMD_ACTIVE = 4'b0011; -localparam CMD_READ = 4'b0101; -localparam CMD_WRITE = 4'b0100; -localparam CMD_BURST_TERMINATE = 4'b0110; -localparam CMD_PRECHARGE = 4'b0010; -localparam CMD_AUTO_REFRESH = 4'b0001; -localparam CMD_LOAD_MODE = 4'b0000; - -wire [3:0] sd_cmd; // current command sent to sd ram - -// drive control signals according to current command -assign sd_cs = sd_cmd[3]; -assign sd_ras = sd_cmd[2]; -assign sd_cas = sd_cmd[1]; -assign sd_we = sd_cmd[0]; - -// drive ram data lines when writing, set them as inputs otherwise -// the eight bits are sent on both bytes ports. Which one's actually -// written depends on the state of dqm of which only one is active -// at a time when writing -assign sd_data = we?{di, di}:16'bZZZZZZZZZZZZZZZZ; - -wire [3:0] reset_cmd = - ((q == STATE_CMD_START) && (reset == 13))?CMD_PRECHARGE: - ((q == STATE_CMD_START) && (reset == 2))?CMD_LOAD_MODE: - CMD_INHIBIT; - -wire [3:0] run_cmd = - ((we || rd) && (q == STATE_CMD_START))?CMD_ACTIVE: - (we && (q == STATE_CMD_CONT ))?CMD_WRITE: - (!we && rd && (q == STATE_CMD_CONT ))?CMD_READ: -// (!we && !rd && (q == STATE_CMD_START))?CMD_AUTO_REFRESH: - ((q == STATE_CMD_REF1))?CMD_AUTO_REFRESH: - ((q == STATE_CMD_REF2))?CMD_AUTO_REFRESH: - CMD_INHIBIT; - -assign sd_cmd = (reset != 0)?reset_cmd:run_cmd; - -wire [12:0] reset_addr = (reset == 13)?13'b0010000000000:MODE; - -wire [12:0] run_addr = - (q == STATE_CMD_START)?addr[21:9]:{ 4'b0010, addr[24], addr[8:1]}; - -assign sd_addr = (reset != 0)?reset_addr:run_addr; - -assign sd_ba = addr[23:22]; - -assign sd_dqm = we?{ addr[0], ~addr[0] }:2'b00; - -endmodule diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/spy_hunter_de10_lite.vhd b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/spy_hunter_de10_lite.vhd deleted file mode 100644 index 80f58d48..00000000 --- a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/spy_hunter_de10_lite.vhd +++ /dev/null @@ -1,676 +0,0 @@ ---------------------------------------------------------------------------------- --- DE10_lite Top level for Spy hunter (Midway MCR) by Dar (darfpga@aol.fr) (06/12/2019) --- http://darfpga.blogspot.fr ---------------------------------------------------------------------------------- --- --- release rev 00 : initial release --- (06/12/2019) --- --- fit de10_lite OK : --- - use sdram loader to load sprites data first then load spy hunter core - ---------------------------------------------------------------------------------- --- Educational use only --- Do not redistribute synthetized file with roms --- Do not redistribute roms whatever the form --- Use at your own risk ---------------------------------------------------------------------------------- --- Use spy_hunter_de10_lite.sdc to compile (Timequest constraints) --- /!\ --- Don't forget to set device configuration mode with memory initialization --- (Assignments/Device/Pin options/Configuration mode) ---------------------------------------------------------------------------------- --- --- Main features : --- PS2 keyboard input @gpio pins 35/34 (beware voltage translation/protection) --- Audio pwm output @gpio pins 1/3 (beware voltage translation/protection) --- --- Video : VGA 31kHz/60Hz progressive and TV 15kHz interlaced --- Cocktail mode : NO --- Sound : OK - missing Chip/cheap squeak deluxe board --- --- For hardware schematic see my other project : NES --- --- Uses 1 pll 40MHz from 50MHz to make 20MHz and 8Mhz --- --- Board key : --- 0 : reset game --- --- Keyboard players inputs : --- --- F1 : Add coin --- F3 : toggle lamp text display on screen --- F4 : Demo sound --- F5 : Separate audio --- F7 : Service mode --- F8 : 15kHz interlaced / 31 kHz progressive - --- F2 : toggle hi/low gear shift --- SPACE : oil --- f key : missile --- g key : van --- t key : smoke --- v key : gun - --- RIGHT arrow : turn right side (auto center when released) --- LEFT arrow : tirn left side (auto center when released) --- UP arrow : gas increase --- DOWN arrow : gas decrease --- --- Other details : see timber.vhd --- For USB inputs and SGT5000 audio output see my other project: xevious_de10_lite ---------------------------------------------------------------------------------- - -library ieee; -use ieee.std_logic_1164.all; -use ieee.std_logic_unsigned.all; -use ieee.numeric_std.all; - -library work; ---use work.usb_report_pkg.all; - -entity spy_hunter_de10_lite is -port( - max10_clk1_50 : in std_logic; --- max10_clk2_50 : in std_logic; --- adc_clk_10 : in std_logic; - ledr : out std_logic_vector(9 downto 0); - key : in std_logic_vector(1 downto 0); - sw : in std_logic_vector(9 downto 0); - - dram_ba : out std_logic_vector(1 downto 0); - dram_ldqm : out std_logic; - dram_udqm : out std_logic; - dram_ras_n : out std_logic; - dram_cas_n : out std_logic; - dram_cke : out std_logic; - dram_clk : out std_logic; - dram_we_n : out std_logic; - dram_cs_n : out std_logic; - dram_dq : inout std_logic_vector(15 downto 0); - dram_addr : out std_logic_vector(12 downto 0); - - hex0 : out std_logic_vector(7 downto 0); - hex1 : out std_logic_vector(7 downto 0); - hex2 : out std_logic_vector(7 downto 0); - hex3 : out std_logic_vector(7 downto 0); - hex4 : out std_logic_vector(7 downto 0); - hex5 : out std_logic_vector(7 downto 0); - - vga_r : out std_logic_vector(3 downto 0); - vga_g : out std_logic_vector(3 downto 0); - vga_b : out std_logic_vector(3 downto 0); - vga_hs : inout std_logic; - vga_vs : inout std_logic; - --- gsensor_cs_n : out std_logic; --- gsensor_int : in std_logic_vector(2 downto 0); --- gsensor_sdi : inout std_logic; --- gsensor_sdo : inout std_logic; --- gsensor_sclk : out std_logic; - --- arduino_io : inout std_logic_vector(15 downto 0); --- arduino_reset_n : inout std_logic; - - gpio : inout std_logic_vector(35 downto 0) -); -end spy_hunter_de10_lite; - -architecture struct of spy_hunter_de10_lite is - -component sdram is -port ( - - sd_data : inout std_logic_vector(15 downto 0); - sd_addr : out std_logic_vector(12 downto 0); - sd_dqm : out std_logic_vector(1 downto 0); - sd_ba : out std_logic_vector(1 downto 0); - sd_cs : out std_logic; - sd_we : out std_logic; - sd_ras : out std_logic; - sd_cas : out std_logic; - - init : in std_logic; - clk : in std_logic; - - addr : in std_logic_vector(24 downto 0); - - we : in std_logic; - di : in std_logic_vector(7 downto 0); - - rd : in std_logic; - sm_cycle: out std_logic_vector( 4 downto 0) - -); end component sdram; - - signal pll_locked: std_logic; - signal clock_40 : std_logic; - signal clock_kbd : std_logic; - signal reset : std_logic; - - signal clock_div : std_logic_vector(3 downto 0); - - signal clock_120 : std_logic; - signal clock_120_sdram : std_logic; -- (-2ns w.r.t clock_120) - signal dram_dqm : std_logic_vector(1 downto 0); - --- signal max3421e_clk : std_logic; - - signal r : std_logic_vector(2 downto 0); - signal g : std_logic_vector(2 downto 0); - signal b : std_logic_vector(2 downto 0); - signal hsync : std_logic; - signal vsync : std_logic; - signal csync : std_logic; - signal blankn : std_logic; - signal tv15Khz_mode : std_logic; - - signal audio_l : std_logic_vector(15 downto 0); - signal audio_r : std_logic_vector(15 downto 0); - signal pwm_accumulator_l : std_logic_vector(17 downto 0); - signal pwm_accumulator_r : std_logic_vector(17 downto 0); - - alias reset_n : std_logic is key(0); - alias ps2_clk : std_logic is gpio(35); --gpio(0); - alias ps2_dat : std_logic is gpio(34); --gpio(1); - alias pwm_audio_out_l : std_logic is gpio(1); --gpio(2); - alias pwm_audio_out_r : std_logic is gpio(3); --gpio(3); - - signal kbd_intr : std_logic; - signal kbd_scancode : std_logic_vector(7 downto 0); - signal joy_BBBBFRLDU : std_logic_vector(8 downto 0); - signal fn_pulse : std_logic_vector(7 downto 0); - signal fn_toggle : std_logic_vector(7 downto 0); - - signal vsync_r : std_logic; - - signal sp_rom_addr : std_logic_vector(17 downto 0); - signal sp_rom_rd : std_logic; - - signal sp_rom_cycle : std_logic_vector( 4 downto 0); - signal sp_rom_data : std_logic_vector(15 downto 0); - signal sp_graphx0 : std_logic_vector(31 downto 0); - signal sp_graphx1 : std_logic_vector(31 downto 0); - signal sp_graphx2 : std_logic_vector(31 downto 0); - signal sp_graphx3 : std_logic_vector(31 downto 0); - - signal steering : std_logic_vector(7 downto 0); - signal steering_plus : std_logic; - signal steering_plus_r : std_logic; - signal steering_minus : std_logic; - signal steering_minus_r : std_logic; - signal steering_timer : std_logic_vector(5 downto 0); - - signal gas : std_logic_vector(7 downto 0); - signal gas_plus : std_logic; - signal gas_plus_r : std_logic; - signal gas_minus : std_logic; - signal gas_minus_r : std_logic; - signal gas_timer : std_logic_vector(5 downto 0); - --- signal start : std_logic := '0'; --- signal usb_report : usb_report_t; --- signal new_usb_report : std_logic := '0'; - -signal dbg_cpu_addr : std_logic_vector(15 downto 0); - -begin - -reset <= not reset_n; - -tv15Khz_mode <= not fn_toggle(7); -- F8 - ---arduino_io not used pins ---arduino_io(7) <= '1'; -- to usb host shield max3421e RESET ---arduino_io(8) <= 'Z'; -- from usb host shield max3421e GPX ---arduino_io(9) <= 'Z'; -- from usb host shield max3421e INT ---arduino_io(13) <= 'Z'; -- not used ---arduino_io(14) <= 'Z'; -- not used - --- Clock 40MHz for kick core and sound_board ---clocks : entity work.max10_pll_40M ---port map( --- inclk0 => max10_clk1_50, --- c0 => clock_40, --- locked => pll_locked ---); - -clocks : entity work.max10_pll_120M_sdram -port map( - inclk0 => max10_clk1_50, - c0 => clock_120, - c1 => clock_120_sdram, - c2 => clock_40, - locked => pll_locked -); - --- Timber -spy_hunter : entity work.spy_hunter -port map( - clock_40 => clock_40, - reset => reset, - - tv15Khz_mode => tv15Khz_mode, - video_r => r, - video_g => g, - video_b => b, - video_csync => csync, - video_blankn => blankn, - video_hs => hsync, - video_vs => vsync, - - separate_audio => fn_toggle(4), -- F5 - audio_out_l => audio_l, - audio_out_r => audio_r, - - coin1 => fn_pulse(0), -- F1 - coin2 => '0', - - shift => fn_toggle(1), -- F2 - oil => joy_BBBBFRLDU(4), -- space - missile => joy_BBBBFRLDU(5), -- f - van => joy_BBBBFRLDU(6), -- g - smoke => joy_BBBBFRLDU(7), -- t - gun => joy_BBBBFRLDU(8), -- v - --- lamp_oil => ledr(0), --- lamp_missile => ledr(1), --- lamp_van => ledr(2), --- lamp_smoke => ledr(3), --- lamp_gun => ledr(4), - show_lamps => fn_toggle(2), -- F3 - - steering => steering, - gas => gas, - - timer => '1', - demo_sound => fn_toggle(3), -- F4 - service => fn_toggle(6), -- F7 -- (allow machine settings access) - - -- external sprite roms - sp_rom_addr => sp_rom_addr, -- highest bit tell direct or reverse order - sp_rom_rd => sp_rom_rd, -- read trigger should last enough for sdram.v - --- External (sd)ram has 4cycles @ 40MHz = 100ns to deliver sp_rom_data_0 --- then sp_rom_data_1 4 cycles later and so on. --- Code may be adapted to slower ram with the risk of having not all sprites --- displayed. --- --- direct ordrer : --- sp_graphx0, bytes# 1 of rom1 & rom2 & rom3 & rom4 --- sp_graphx1, bytes# 2 of rom1 & rom2 & rom3 & rom4 --- sp_graphx2, bytes# 3 of rom1 & rom2 & rom3 & rom4 --- sp_graphx3, bytes# 4 of rom1 & rom2 & rom3 & rom4 - --- reverse ordrer : --- sp_graphx0, bytes# 4 of rom4 & rom3 & rom2 & rom1 --- sp_graphx1, bytes# 3 of rom4 & rom3 & rom2 & rom1 --- sp_graphx2, bytes# 2 of rom4 & rom3 & rom2 & rom1 --- sp_graphx3, bytes# 1 of rom4 & rom3 & rom2 & rom1 - - sp_graphx0 => sp_graphx0, - sp_graphx1 => sp_graphx1, - sp_graphx2 => sp_graphx2, - sp_graphx3 => sp_graphx3, - - dbg_cpu_addr => dbg_cpu_addr -); - -dram_ldqm <= dram_dqm(0); -dram_udqm <= dram_dqm(1); -dram_cke <= '1'; -dram_clk <= clock_120_sdram; - -sdram_if : sdram -port map( - -- sdram interface - sd_data => dram_dq, -- 16 bit bidirectional data bus - sd_addr => dram_addr, -- 13 bit multiplexed address bus - sd_dqm => dram_dqm, -- two byte masks - sd_ba => dram_ba, -- two banks - sd_cs => dram_cs_n, -- a single chip select - sd_we => dram_we_n, -- write enable - sd_ras => dram_ras_n, -- row address select - sd_cas => dram_cas_n, -- columns address select - - -- cpu/chipset interface - init => not pll_locked, -- init signal after FPGA config to initialize RAM - clk => clock_120, -- sdram is accessed at up to 128MHz - - addr => "0000000"& sp_rom_addr, -- 25 bit byte address - - we => '0', -- requests write - di => x"FF", -- data input - - rd => sp_rom_rd, -- requests data - sm_cycle => sp_rom_cycle -- state machine cycle -); - -process (clock_120) -begin - if falling_edge(clock_120) then - sp_rom_data <= dram_dq; - if sp_rom_cycle = 8 then sp_graphx0(31 downto 16) <= sp_rom_data; end if; - if sp_rom_cycle = 9 then sp_graphx0(15 downto 0) <= sp_rom_data; end if; - if sp_rom_cycle = 10 then sp_graphx1(31 downto 16) <= sp_rom_data; end if; - if sp_rom_cycle = 11 then sp_graphx1(15 downto 0) <= sp_rom_data; end if; - if sp_rom_cycle = 12 then sp_graphx2(31 downto 16) <= sp_rom_data; end if; - if sp_rom_cycle = 13 then sp_graphx2(15 downto 0) <= sp_rom_data; end if; - if sp_rom_cycle = 14 then sp_graphx3(31 downto 16) <= sp_rom_data; end if; - if sp_rom_cycle = 15 then sp_graphx3(15 downto 0) <= sp_rom_data; end if; - end if; -end process; - --- absolute position decoder simulation --- --- steering : --- thresholds median --- F5 < left 8 < 34 30 --- 35 < left 7 < 3C 38 --- 3D < left 6 < 44 40 --- 45 < left 5 < 4C 48 --- 4D < left 4 < 54 50 --- 45 < left 3 < 5C 58 --- 5D < left 2 < 64 60 --- 65 < left 1 < 6C 68 --- 6D < centrered < 74 70 --- 75 < right 1 < 7C 78 --- 7D < right 2 < 84 80 --- 85 < right 3 < 8C 88 --- 8D < right 4 < 94 90 --- 95 < right 5 < 9C 98 --- 9D < right 6 < A4 A0 --- A5 < right 7 < AC A8 --- AD < right 8 < F4 BO - --- gas : --- threshold median --- 00 < gas pedal 00 < 3B (39) 3E-5 --- 3C < gas pedal 01 < 40 3E --- 41 < gas pedal 02 < 45 43 --- 46 < gas pedal 03 < 4A 48 --- 4B < gas pedal 04 < 4F 4D --- 50 < gas pedal 05 < 54 52 --- 55 < gas pedal 06 < 59 57 --- 5A < gas pedal 07 < 5E 5C --- 5F < gas pedal 08 < 63 61 --- ... --- FA < gas pedal 27 < FE FC --- FF = gas pedal 28 (FF) FC+4 - - -gas_plus <= joy_BBBBFRLDU(0); -gas_minus <= joy_BBBBFRLDU(1); -steering_plus <= joy_BBBBFRLDU(3); -steering_minus <= joy_BBBBFRLDU(2); - -process (clock_40) -begin - if reset = '1' then - gas <= x"39"; - steering <= x"70"; - else - - if rising_edge(clock_40) then - gas_plus_r <= gas_plus; - gas_minus_r <= gas_minus; - steering_plus_r <= steering_plus; - steering_minus_r <= steering_minus; - vsync_r <= vsync; - - -- gas increase/decrease as long as btn is pushed - -- keep current value when no btn is pushed - if gas < x"39" then - gas <= x"39"; - else - if (gas_plus_r = not gas_plus) or - (gas_minus_r = not gas_minus) then - gas_timer <= (others => '0'); - else - if vsync_r ='0' and vsync = '1' then - if (gas_timer >= 5 and (gas_minus_r = '1' or gas_plus_r = '1')) then --tune inc/dec rate - gas_timer <= (others => '0'); - else - gas_timer <= gas_timer + 1; - end if; - end if; - end if; - - if vsync_r ='0' and vsync = '1' and gas_timer = 0 then - if gas_plus = '1' then - if gas >= x"FC" then gas <= x"FF"; else gas <= gas + 5; end if; - elsif gas_minus = '1' then - if gas <= x"3E" then gas <= x"39"; else gas <= gas - 5; end if; - end if; - end if; - - end if; - - -- steering increase/decrease as long as btn is pushed - -- return to center value when no btn is pushed - if steering < x"30" then - steering <= x"30"; - elsif steering > x"B0" then - steering <= x"B0"; - else - if (steering_plus_r = not steering_plus) or - (steering_minus_r = not steering_minus) then - steering_timer <= (others => '0'); - else - if vsync_r ='0' and vsync = '1' then - if (steering_timer >= 7 and (steering_minus_r = '1' or steering_plus_r = '1')) or -- tune btn pushed rate - (steering_timer >= 3 and (steering_minus_r = '0' and steering_plus_r = '0')) then -- tune btn released rate - steering_timer <= (others => '0'); - else - steering_timer <= steering_timer + 1; - end if; - end if; - end if; - - if vsync_r ='0' and vsync = '1' and steering_timer = 0 then - if steering_plus = '1' then - if steering >= x"A8" then steering <= x"B0"; else steering <= steering + 8; end if; - elsif steering_minus = '1' then - if steering <= x"38" then steering <= x"30"; else steering <= steering - 8; end if; - else - if steering <= x"68" then steering <= steering + 8; end if; - if steering >= x"78" then steering <= steering - 8; end if; - if (steering > x"68") and (steering < x"78") then steering <= x"70"; end if; - end if; - end if; - - end if; - - end if; - - end if; -end process; - - --- adapt video to 4bits/color only and blank -vga_r <= r & '0' when blankn = '1' else "0000"; -vga_g <= g & '0' when blankn = '1' else "0000"; -vga_b <= b & '0' when blankn = '1' else "0000"; - --- synchro composite/ synchro horizontale --- vga_hs <= csync; --- vga_hs <= hsync; -vga_hs <= csync when tv15Khz_mode = '1' else hsync; --- commutation rapide / synchro verticale --- vga_vs <= '1'; --- vga_vs <= vsync; -vga_vs <= '1' when tv15Khz_mode = '1' else vsync; - ---sound_string <= "00" & audio & "000" & "00" & audio & "000"; - --- get scancode from keyboard -process (reset, clock_40) -begin - if reset='1' then - clock_div <= (others => '0'); - clock_kbd <= '0'; - else - if rising_edge(clock_40) then - if clock_div = "1001" then - clock_div <= (others => '0'); - clock_kbd <= not clock_kbd; - else - clock_div <= clock_div + '1'; - end if; - end if; - end if; -end process; - -keyboard : entity work.io_ps2_keyboard -port map ( - clk => clock_kbd, -- synchrounous clock with core - kbd_clk => ps2_clk, - kbd_dat => ps2_dat, - interrupt => kbd_intr, - scancode => kbd_scancode -); - --- translate scancode to joystick -joystick : entity work.kbd_joystick -port map ( - clk => clock_kbd, -- synchrounous clock with core - kbdint => kbd_intr, - kbdscancode => std_logic_vector(kbd_scancode), - joy_BBBBFRLDU => joy_BBBBFRLDU, - fn_pulse => fn_pulse, - fn_toggle => fn_toggle -); - - --- usb host for max3421e arduino shield (modified) ---max3421e_clk <= clock_11; ---usb_host : entity work.usb_host_max3421e ---port map( --- clk => max3421e_clk, --- reset => reset, --- start => start, --- --- usb_report => usb_report, --- new_usb_report => new_usb_report, --- --- spi_cs_n => arduino_io(10), --- spi_clk => arduino_io(13), --- spi_mosi => arduino_io(11), --- spi_miso => arduino_io(12) ---); - --- usb keyboard report decoder - ---keyboard_decoder : entity work.usb_keyboard_decoder ---port map( --- clk => max3421e_clk, --- --- usb_report => usb_report, --- new_usb_report => new_usb_report, --- --- joyBCPPFRLDU => joyBCPPFRLDU ---); - --- usb joystick decoder (konix drakkar wireless) - ---joystick_decoder : entity work.usb_joystick_decoder ---port map( --- clk => max3421e_clk, --- --- usb_report => usb_report, --- new_usb_report => new_usb_report, --- --- joyBCPPFRLDU => open --joyBCPPFRLDU ---); - --- debug display - ---ledr(8 downto 0) <= joyBCPPFRLDU; --- ---h0 : entity work.decodeur_7_seg port map(kbd_scancode(3 downto 0), hex0); ---h1 : entity work.decodeur_7_seg port map(kbd_scancode(7 downto 4), hex1); -h0 : entity work.decodeur_7_seg port map(dbg_cpu_addr( 3 downto 0),hex0); -h1 : entity work.decodeur_7_seg port map(dbg_cpu_addr( 7 downto 4),hex1); -h2 : entity work.decodeur_7_seg port map(dbg_cpu_addr(11 downto 8),hex2); -h3 : entity work.decodeur_7_seg port map(dbg_cpu_addr(15 downto 12),hex3); - --- HI / LOW gear shift display - --- 7 segment bits: --- --0-- --- 5 1 --- |-6-| --- 4 2 --- --3-- .7 (dot) - -hex5 <= not "01110110" when fn_toggle(1) = '1' else not "00111000"; -- H or L -hex4 <= not "00110000" when fn_toggle(1) = '1' else not "00111111"; -- I or O - ---h4 : entity work.decodeur_7_seg port map(sp_rom_cycle(3 downto 0),hex4); ---h5 : entity work.decodeur_7_seg port map(dummy3,hex5); - --- audio for sgtl5000 - ---sample_data <= "00" & audio & "000" & "00" & audio & "000"; - --- Clock 1us for ym_8910 - ---p_clk_1us_p : process(max10_clk1_50) ---begin --- if rising_edge(max10_clk1_50) then --- if cnt_1us = 0 then --- cnt_1us <= 49; --- clk_1us <= '1'; --- else --- cnt_1us <= cnt_1us - 1; --- clk_1us <= '0'; --- end if; --- end if; ---end process; - --- sgtl5000 (teensy audio shield on top of usb host shield) - ---e_sgtl5000 : entity work.sgtl5000_dac ---port map( --- clock_18 => clock_18, --- reset => reset, --- i2c_clock => clk_1us, --- --- sample_data => sample_data, --- --- i2c_sda => arduino_io(0), -- i2c_sda, --- i2c_scl => arduino_io(1), -- i2c_scl, --- --- tx_data => arduino_io(2), -- sgtl5000 tx --- mclk => arduino_io(4), -- sgtl5000 mclk --- --- lrclk => arduino_io(3), -- sgtl5000 lrclk --- bclk => arduino_io(6), -- sgtl5000 bclk --- --- -- debug --- hex0_di => open, -- hex0_di, --- hex1_di => open, -- hex1_di, --- hex2_di => open, -- hex2_di, --- hex3_di => open, -- hex3_di, --- --- sw => sw(7 downto 0) ---); - --- pwm sound output -process(clock_40) -- use same clock as kick_sound_board -begin - if rising_edge(clock_40) then - - if clock_div = "0000" then - pwm_accumulator_l <= ('0'&pwm_accumulator_l(16 downto 0)) + ('0'&audio_l&'0'); - pwm_accumulator_r <= ('0'&pwm_accumulator_r(16 downto 0)) + ('0'&audio_r&'0'); - end if; - - end if; -end process; - -pwm_audio_out_l <= pwm_accumulator_l(17); -pwm_audio_out_r <= pwm_accumulator_r(17); - - -end struct; diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/binaries/linux32/duplicate_byte b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/binaries/linux32/duplicate_byte deleted file mode 100644 index f1dff2e9..00000000 Binary files a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/binaries/linux32/duplicate_byte and /dev/null differ diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/binaries/linux32/make_vhdl_prom b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/binaries/linux32/make_vhdl_prom deleted file mode 100644 index a71da100..00000000 Binary files a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/binaries/linux32/make_vhdl_prom and /dev/null differ diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/binaries/win32/duplicate_byte.exe b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/binaries/win32/duplicate_byte.exe deleted file mode 100644 index 9e205c62..00000000 Binary files a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/binaries/win32/duplicate_byte.exe and /dev/null differ diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/binaries/win64/duplicate_byte.exe b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/binaries/win64/duplicate_byte.exe deleted file mode 100644 index 425e9082..00000000 Binary files a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/binaries/win64/duplicate_byte.exe and /dev/null differ diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/binaries/win64/make_vhdl_prom.exe b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/binaries/win64/make_vhdl_prom.exe deleted file mode 100644 index 1e5618bf..00000000 Binary files a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/binaries/win64/make_vhdl_prom.exe and /dev/null differ diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/src/doc_compilation.txt b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/src/doc_compilation.txt deleted file mode 100644 index d12ba3bf..00000000 --- a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/src/doc_compilation.txt +++ /dev/null @@ -1,28 +0,0 @@ ------------------------------------------------------- -LINUX build command ------------------------------------------------------- -gcc duplicate_byte.c -lm -mv a.out duplicate_byte - -gcc make_vhdl_prom.c -lm -mv a.out make_vhdl_prom - ------------------------------------------------------- -Win32 build command (on linux system) ------------------------------------------------------- -i686-w64-mingw32-gcc duplicate_byte.c -lm -m32 -mv a.exe duplicate_byte.exe - -i686-w64-mingw32-gcc make_vhdl_prom.c -lm -m32 -mv a.exe make_vhdl_prom.exe - ------------------------------------------------------- -Win64 build command (on linux system) ------------------------------------------------------- -x86_64-w64-mingw32-gcc duplicate_byte.c -lm -mv a.exe duplicate_byte.exe - -x86_64-w64-mingw32-gcc make_vhdl_prom.c -lm -mv a.exe make_vhdl_prom.exe ------------------------------------------------------- ------------------------------------------------------- diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/src/duplicate_byte.c b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/src/duplicate_byte.c deleted file mode 100644 index 10bd7a02..00000000 --- a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/src/duplicate_byte.c +++ /dev/null @@ -1,37 +0,0 @@ -#include "stdio.h" -#include "stdlib.h" -main (int argc, char **argv) -{ -unsigned char byte; -FILE *fid_in,*fid_out; - -if (argc != 3) -{ - printf("Syntax : %s file_in file_out\n",argv[0]); - exit(0); -} - -fid_in = fopen(argv[1],"rb"); -if (fid_in == NULL) -{ - printf("can't open %s\n",argv[1]); - exit(0); -} - -fid_out = fopen(argv[2],"wb"); -if (fid_out == NULL) -{ - printf("can't open %s\n",argv[2]); - fclose(fid_in); - exit(0); -} - -while (fread(&byte,1,1,fid_in)==1) -{ - fwrite(&byte,1,1,fid_out); - fwrite(&byte,1,1,fid_out); -} - -fclose(fid_in); -fclose(fid_out); -} diff --git a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/src/make_vhdl_prom.c b/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/src/make_vhdl_prom.c deleted file mode 100644 index d6cb87cf..00000000 --- a/Arcade_MiST/Midway MCR Scroll/CraterRaider_MiST/tools/tools_prom_src/src/make_vhdl_prom.c +++ /dev/null @@ -1,83 +0,0 @@ -#include -#include -#include -#include -main (int argc, char **argv) -{ -unsigned char byte; -int data_len,nb_byte,first_byte; -char *end_file_name; -FILE *fid_in,*fid_out; - -if (argc != 3) -{ - printf("Syntax : %s file_in file_out\n",argv[0]); - exit(0); -} - -fid_in = fopen(argv[1],"rb"); -if (fid_in == NULL) -{ - printf("can't open %s\n",argv[1]); - exit(0); -} - -fid_out = fopen(argv[2],"wt"); -if (fid_out == NULL) -{ - printf("can't open %s\n",argv[2]); - fclose(fid_in); - exit(0); -} - -end_file_name = strstr(argv[2],".vhd"); -if (end_file_name!=NULL) *end_file_name='\0'; - -fseek(fid_in,0,SEEK_END); -data_len = ftell(fid_in); -fseek(fid_in,0,SEEK_SET); - -fprintf(fid_out,"library ieee;\n"); -fprintf(fid_out,"use ieee.std_logic_1164.all,ieee.numeric_std.all;\n\n"); -fprintf(fid_out,"entity %s is\n",argv[2]); -fprintf(fid_out,"port (\n"); -fprintf(fid_out,"\tclk : in std_logic;\n"); -fprintf(fid_out,"\taddr : in std_logic_vector(%d downto 0);\n",(int)ceil(log2((double)data_len))-1); -fprintf(fid_out,"\tdata : out std_logic_vector(7 downto 0)\n"); -fprintf(fid_out,");\n"); -fprintf(fid_out,"end entity;\n\n"); -fprintf(fid_out,"architecture prom of %s is\n",argv[2]); -fprintf(fid_out,"\ttype rom is array(0 to %d) of std_logic_vector(7 downto 0);\n",data_len-1); -fprintf(fid_out,"\tsignal rom_data: rom := ("); - -nb_byte = 0; -first_byte = 1; -while(fread(&byte,1,1,fid_in)==1) -{ - if (nb_byte==0) - { - if (first_byte==0) fprintf(fid_out,","); - fprintf(fid_out,"\n\t\t"); - } - else - { fprintf(fid_out,","); } - first_byte = 0; - - fprintf(fid_out,"X\"%02X\"",byte); - nb_byte++; - if (nb_byte==16) nb_byte=0; -} -fprintf(fid_out,");\n"); - -fprintf(fid_out,"begin\n"); -fprintf(fid_out,"process(clk)\n"); -fprintf(fid_out,"begin\n"); -fprintf(fid_out,"\tif rising_edge(clk) then\n"); -fprintf(fid_out,"\t\tdata <= rom_data(to_integer(unsigned(addr)));\n"); -fprintf(fid_out,"\tend if;\n"); -fprintf(fid_out,"end process;\n"); -fprintf(fid_out,"end architecture;\n"); - -fclose(fid_in); -fclose(fid_out); -}