diff --git a/.gitignore b/.gitignore index 4a8326c3..294028bd 100644 --- a/.gitignore +++ b/.gitignore @@ -7,6 +7,7 @@ incremental_db output_files simulation PLLJ_PLLSPE_INFO.txt +console_history *.bak *.orig *.rej @@ -22,7 +23,6 @@ PLLJ_PLLSPE_INFO.txt *.ppf *.ddb *.srf -Arcade_MiST/Jaleco Exerion/exerion.pdf -Arcade_MiST/Jaleco Exerion/meta/Exerion.rbf +*.rbf *.exe *.url diff --git a/Arcade_MiST/Capcom SonSon/Sonson_MiST.qpf b/Arcade_MiST/Capcom SonSon/Sonson.qpf similarity index 97% rename from Arcade_MiST/Capcom SonSon/Sonson_MiST.qpf rename to Arcade_MiST/Capcom SonSon/Sonson.qpf index bd3ad814..c5510382 100644 --- a/Arcade_MiST/Capcom SonSon/Sonson_MiST.qpf +++ b/Arcade_MiST/Capcom SonSon/Sonson.qpf @@ -27,4 +27,4 @@ DATE = "11:47:13 October 18, 2011" # Revisions -PROJECT_REVISION = "Sonson_MiST" +PROJECT_REVISION = "Sonson" diff --git a/Arcade_MiST/Capcom SonSon/Sonson_MiST.qsf b/Arcade_MiST/Capcom SonSon/Sonson.qsf similarity index 100% rename from Arcade_MiST/Capcom SonSon/Sonson_MiST.qsf rename to Arcade_MiST/Capcom SonSon/Sonson.qsf diff --git a/Arcade_MiST/Capcom SonSon/Sonson_MiST.sdc b/Arcade_MiST/Capcom SonSon/Sonson.sdc similarity index 100% rename from Arcade_MiST/Capcom SonSon/Sonson_MiST.sdc rename to Arcade_MiST/Capcom SonSon/Sonson.sdc diff --git a/Arcade_MiST/Data East Express Raider/rtl/video/video.v b/Arcade_MiST/Data East Express Raider/rtl/video/video.v index a70b9250..5b889ca3 100644 --- a/Arcade_MiST/Data East Express Raider/rtl/video/video.v +++ b/Arcade_MiST/Data East Express Raider/rtl/video/video.v @@ -243,13 +243,14 @@ end wire [2:0] fg; reg [7:0] cdata; +reg cdata_d, cdata_l; reg [7:0] char_data_l; reg [9:0] mapad, mapad2; assign vram_addr = { 1'b1, hcount[2], vcount[7:3], hcount[7:3] }; assign char_rom_addr = { hcount[2], mapad[9:8], mapad2[7:0], vcount[2:0] }; assign fg = { - cdata[4], + cdata_l, char_data_l[4+(2'b11^hcount[1:0])], char_data_l[2'b11^hcount[1:0]] }; @@ -259,10 +260,12 @@ always @(posedge clk_sys) begin if (ce_pix) begin if (hcount[2:0] == 3'b111) cdata <= vram_q; if (hcount[2:0] == 3'b011) begin + cdata_d <= cdata[4]; mapad <= { cdata[1:0], vram_q }; mapad2 <= mapad; end if (hcount[1:0] == 2'b11) begin + cdata_l <= cdata_d; char_data_l <= char_data; end end diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/.gitignore b/Arcade_MiST/IremM52 Hardware/MoonPatrol/.gitignore similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/.gitignore rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/.gitignore diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/ReadMe.txt b/Arcade_MiST/IremM52 Hardware/MoonPatrol/ReadMe.txt similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/ReadMe.txt rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/ReadMe.txt diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/clean.bat b/Arcade_MiST/IremM52 Hardware/MoonPatrol/clean.bat similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/clean.bat rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/clean.bat diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/mpatrol.qpf b/Arcade_MiST/IremM52 Hardware/MoonPatrol/mpatrol.qpf similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/mpatrol.qpf rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/mpatrol.qpf diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/mpatrol.qsf b/Arcade_MiST/IremM52 Hardware/MoonPatrol/mpatrol.qsf similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/mpatrol.qsf rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/mpatrol.qsf diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/mpatrol.sdc b/Arcade_MiST/IremM52 Hardware/MoonPatrol/mpatrol.sdc similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/mpatrol.sdc rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/mpatrol.sdc diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/Clock.qip b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/Clock.qip similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/Clock.qip rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/Clock.qip diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/Clock.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/Clock.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/Clock.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/Clock.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/Graphics.VHD b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/Graphics.VHD similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/Graphics.VHD rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/Graphics.VHD diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/Inputs.VHD b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/Inputs.VHD similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/Inputs.VHD rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/Inputs.VHD diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/Z80.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/Z80.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/Z80.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/Z80.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/bitmap1_ctl.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/bitmap1_ctl.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/bitmap1_ctl.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/bitmap1_ctl.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/bitmap2_ctl.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/bitmap2_ctl.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/bitmap2_ctl.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/bitmap2_ctl.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/bitmap3_ctl.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/bitmap3_ctl.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/bitmap3_ctl.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/bitmap3_ctl.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/bitmapctl_e.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/bitmapctl_e.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/bitmapctl_e.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/bitmapctl_e.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/build_id.tcl b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/build_id.tcl similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/build_id.tcl rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/build_id.tcl diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/clk_div.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/clk_div.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/clk_div.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/clk_div.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/dac.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/dac.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/dac.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/dac.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/dpram.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/dpram.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/dpram.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/dpram.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/dprom_2r.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/dprom_2r.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/dprom_2r.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/dprom_2r.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/gen_ram.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/gen_ram.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/gen_ram.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/gen_ram.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/i82c55.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/i82c55.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/i82c55.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/i82c55.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/input_mapper.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/input_mapper.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/input_mapper.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/input_mapper.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/iremm52_video_controller.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/iremm52_video_controller.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/iremm52_video_controller.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/iremm52_video_controller.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/keyboard.v b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/keyboard.v similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/keyboard.v rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/keyboard.v diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/moon_patrol_sound_board.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/moon_patrol_sound_board.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/moon_patrol_sound_board.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/moon_patrol_sound_board.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/moon_patrol_sound_prog.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/moon_patrol_sound_prog.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/moon_patrol_sound_prog.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/moon_patrol_sound_prog.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/mpatrol.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/mpatrol.vhd similarity index 99% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/mpatrol.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/mpatrol.vhd index 7eacfefa..b322277e 100644 --- a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/mpatrol.vhd +++ b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/mpatrol.vhd @@ -289,7 +289,7 @@ mist_video: work.mist.mist_video ypbpr => ypbpr, no_csync => no_csync, rotate => "00", - ce_divider => '1', + ce_divider => "001", SPI_SCK => SPI_SCK, SPI_SS3 => SPI_SS3, diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/pace.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/pace.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/pace.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/pace.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/pace_pkg.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/pace_pkg.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/pace_pkg.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/pace_pkg.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/pace_pkg_body.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/pace_pkg_body.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/pace_pkg_body.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/pace_pkg_body.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/platform.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/platform.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/platform.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/platform.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/platform_pkg.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/platform_pkg.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/platform_pkg.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/platform_pkg.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/platform_variant_pkg.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/platform_variant_pkg.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/platform_variant_pkg.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/platform_variant_pkg.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/pll_aud.qip b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/pll_aud.qip similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/pll_aud.qip rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/pll_aud.qip diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/pll_aud.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/pll_aud.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/pll_aud.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/pll_aud.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/project_pkg.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/project_pkg.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/project_pkg.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/project_pkg.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpa-1.3m.hex b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpa-1.3m.hex similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpa-1.3m.hex rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpa-1.3m.hex diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpa-2.3l.hex b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpa-2.3l.hex similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpa-2.3l.hex rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpa-2.3l.hex diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpa-3.3k.hex b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpa-3.3k.hex similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpa-3.3k.hex rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpa-3.3k.hex diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpa-4.3j.hex b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpa-4.3j.hex similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpa-4.3j.hex rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpa-4.3j.hex diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpb-1.3n.hex b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpb-1.3n.hex similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpb-1.3n.hex rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpb-1.3n.hex diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpb-2.3m.hex b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpb-2.3m.hex similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpb-2.3m.hex rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpb-2.3m.hex diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpe-1.3l.hex b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpe-1.3l.hex similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpe-1.3l.hex rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpe-1.3l.hex diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpe-2.3k.hex b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpe-2.3k.hex similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpe-2.3k.hex rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpe-2.3k.hex diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpe-3.3h.hex b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpe-3.3h.hex similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpe-3.3h.hex rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpe-3.3h.hex diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpe-4.3f.hex b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpe-4.3f.hex similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpe-4.3f.hex rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpe-4.3f.hex diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpe-5.3e.hex b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpe-5.3e.hex similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/roms/mpe-5.3e.hex rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/roms/mpe-5.3e.hex diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/spram.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/spram.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/spram.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/spram.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/sprite_array.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/sprite_array.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/sprite_array.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/sprite_array.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/sprite_pkg.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/sprite_pkg.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/sprite_pkg.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/sprite_pkg.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/sprite_pkg_body.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/sprite_pkg_body.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/sprite_pkg_body.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/sprite_pkg_body.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/spritectl.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/spritectl.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/spritectl.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/spritectl.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/spritereg.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/spritereg.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/spritereg.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/spritereg.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/sprom.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/sprom.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/sprom.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/sprom.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/target_pkg.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/target_pkg.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/target_pkg.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/target_pkg.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/target_top.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/target_top.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/target_top.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/target_top.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/tilemapctl.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/tilemapctl.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/tilemapctl.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/tilemapctl.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/tilemapctl_e.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/tilemapctl_e.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/tilemapctl_e.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/tilemapctl_e.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/video_controller.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/video_controller.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/video_controller.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/video_controller.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/video_controller_pkg.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/video_controller_pkg.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/video_controller_pkg.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/video_controller_pkg.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/video_controller_pkg_body.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/video_controller_pkg_body.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/video_controller_pkg_body.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/video_controller_pkg_body.vhd diff --git a/Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/video_mixer.vhd b/Arcade_MiST/IremM52 Hardware/MoonPatrol/src/video_mixer.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/MoonPatrol_MIST/src/video_mixer.vhd rename to Arcade_MiST/IremM52 Hardware/MoonPatrol/src/video_mixer.vhd diff --git a/Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/ReadMe.txt b/Arcade_MiST/IremM52 Hardware/TraverseUSA/ReadMe.txt similarity index 100% rename from Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/ReadMe.txt rename to Arcade_MiST/IremM52 Hardware/TraverseUSA/ReadMe.txt diff --git a/Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/TraverseUSA_MiST.qpf b/Arcade_MiST/IremM52 Hardware/TraverseUSA/TravrUSA.qpf similarity index 97% rename from Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/TraverseUSA_MiST.qpf rename to Arcade_MiST/IremM52 Hardware/TraverseUSA/TravrUSA.qpf index d0c46139..706afa8d 100644 --- a/Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/TraverseUSA_MiST.qpf +++ b/Arcade_MiST/IremM52 Hardware/TraverseUSA/TravrUSA.qpf @@ -28,4 +28,4 @@ DATE = "04:04:47 October 16, 2017" # Revisions -PROJECT_REVISION = "TraverseUSA_MiST" +PROJECT_REVISION = "TravrUSA" diff --git a/Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/TraverseUSA_MiST.qsf b/Arcade_MiST/IremM52 Hardware/TraverseUSA/TravrUSA.qsf similarity index 100% rename from Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/TraverseUSA_MiST.qsf rename to Arcade_MiST/IremM52 Hardware/TraverseUSA/TravrUSA.qsf diff --git a/Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/TraverseUSA_MiST.sdc b/Arcade_MiST/IremM52 Hardware/TraverseUSA/TravrUSA.sdc similarity index 100% rename from Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/TraverseUSA_MiST.sdc rename to Arcade_MiST/IremM52 Hardware/TraverseUSA/TravrUSA.sdc diff --git a/Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/clean.bat b/Arcade_MiST/IremM52 Hardware/TraverseUSA/clean.bat similarity index 100% rename from Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/clean.bat rename to Arcade_MiST/IremM52 Hardware/TraverseUSA/clean.bat diff --git a/Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/meta/shtrider.mra b/Arcade_MiST/IremM52 Hardware/TraverseUSA/meta/shtrider.mra similarity index 100% rename from Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/meta/shtrider.mra rename to Arcade_MiST/IremM52 Hardware/TraverseUSA/meta/shtrider.mra diff --git a/Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/meta/travrusa.mra b/Arcade_MiST/IremM52 Hardware/TraverseUSA/meta/travrusa.mra similarity index 100% rename from Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/meta/travrusa.mra rename to Arcade_MiST/IremM52 Hardware/TraverseUSA/meta/travrusa.mra diff --git a/Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/TraverseUSA_MiST.sv b/Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/TraverseUSA_MiST.sv similarity index 100% rename from Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/TraverseUSA_MiST.sv rename to Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/TraverseUSA_MiST.sv diff --git a/Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/build_id.tcl b/Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/build_id.tcl similarity index 100% rename from Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/build_id.tcl rename to Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/build_id.tcl diff --git a/Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/dpram.vhd b/Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/dpram.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/dpram.vhd rename to Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/dpram.vhd diff --git a/Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/gen_ram.vhd b/Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/gen_ram.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/gen_ram.vhd rename to Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/gen_ram.vhd diff --git a/Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/moon_patrol_sound_board.vhd b/Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/moon_patrol_sound_board.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/moon_patrol_sound_board.vhd rename to Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/moon_patrol_sound_board.vhd diff --git a/Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/pll_aud.qip b/Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/pll_aud.qip similarity index 100% rename from Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/pll_aud.qip rename to Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/pll_aud.qip diff --git a/Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/pll_aud.vhd b/Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/pll_aud.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/pll_aud.vhd rename to Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/pll_aud.vhd diff --git a/Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/pll_mist.qip b/Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/pll_mist.qip similarity index 100% rename from Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/pll_mist.qip rename to Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/pll_mist.qip diff --git a/Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/pll_mist.vhd b/Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/pll_mist.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/pll_mist.vhd rename to Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/pll_mist.vhd diff --git a/Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/sdram.sv b/Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/sdram.sv similarity index 100% rename from Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/sdram.sv rename to Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/sdram.sv diff --git a/Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/traverse_usa.vhd b/Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/traverse_usa.vhd similarity index 100% rename from Arcade_MiST/IremM52 Hardware/TraverseUSA_MiST/rtl/traverse_usa.vhd rename to Arcade_MiST/IremM52 Hardware/TraverseUSA/rtl/traverse_usa.vhd diff --git a/Arcade_MiST/Konami Jackal/rtl/Jackal.sv b/Arcade_MiST/Konami Jackal/rtl/Jackal.sv index 4feecdc9..1e4f1e4d 100644 --- a/Arcade_MiST/Konami Jackal/rtl/Jackal.sv +++ b/Arcade_MiST/Konami Jackal/rtl/Jackal.sv @@ -441,7 +441,8 @@ dpram_dc #(.widthad_a(8)) u14H //Sound chip - Yamaha YM2151 (uses JT51 implementation by Jotego) wire [7:0] ym2151_Dout; wire signed [15:0] sound_l_raw, sound_r_raw; -wire [15:0] unsgined_sound_l_raw, unsgined_sound_r_raw; +wire [15:0] unsgined_sound_l_raw = {~sound_l_raw[15], sound_l_raw[14:0]}; +wire [15:0] unsgined_sound_r_raw = {~sound_r_raw[15], sound_r_raw[14:0]}; jt51 u8C ( .rst(~reset), @@ -454,9 +455,7 @@ jt51 u8C .din(soundcpu_Dout), .dout(ym2151_Dout), .xleft(sound_l_raw), - .xright(sound_r_raw), - .dacleft(unsgined_sound_l_raw), - .dacright(unsgined_sound_r_raw) + .xright(sound_r_raw) ); //----------------------------------------------------- Final video output -----------------------------------------------------// diff --git a/Arcade_MiST/Konami Jackal/rtl/Jackal_MiST.sv b/Arcade_MiST/Konami Jackal/rtl/Jackal_MiST.sv index 4bd94dab..948fc607 100644 --- a/Arcade_MiST/Konami Jackal/rtl/Jackal_MiST.sv +++ b/Arcade_MiST/Konami Jackal/rtl/Jackal_MiST.sv @@ -70,8 +70,8 @@ pll pll( wire [31:0] status; wire [1:0] buttons; wire [1:0] switches; -wire [7:0] joystick_0; -wire [7:0] joystick_1; +wire [31:0] joystick_0; +wire [31:0] joystick_1; wire scandoublerD; wire ypbpr; wire no_csync; @@ -190,12 +190,12 @@ Jackal Jackal( .clk_49m(clock_49), .coins({~m_coin2,~m_coin1}), .btn_start({~m_two_players,~m_one_player}), - .p1_joystick({~m_down, ~m_up, ~m_right, ~m_left}), + .p1_joystick({~m_down1, ~m_up1, ~m_right1, ~m_left1}), .p2_joystick({~m_down2, ~m_up2, ~m_right2, ~m_left2}), .p1_rotary(~p1_rotary), .p2_rotary(~p2_rotary), - .p1_buttons({~m_fireB, ~m_fireA}), - .p2_buttons({~m_fire2B, ~m_fire2A}), + .p1_buttons({~m_fire1[1], ~m_fire1[0]}), + .p2_buttons({~m_fire2[1], ~m_fire2[0]}), .btn_service(~service), .dipsw(dip_sw), .is_bootleg(is_bootleg), @@ -298,10 +298,10 @@ dac #(.C_bits(16))dac_r( reg [22:0] rotary_div = 23'd0; reg [7:0] rotary1 = 8'h01; reg [7:0] rotary2 = 8'h01; -wire m_rotary1_l = m_fireC; -wire m_rotary1_r = m_fireD; -wire m_rotary2_l = m_fire2C; -wire m_rotary2_r = m_fire2D; +wire m_rotary1_l = m_fire1[2] | m_left1B | m_down1B; +wire m_rotary1_r = m_fire1[3] | m_right1B | m_up1B; +wire m_rotary2_l = m_fire2[2] | m_left2B | m_down2B; +wire m_rotary2_r = m_fire2[3] | m_right2B | m_up2B; wire rotary_en = rotary_speed ? !rotary_div[21:0] : !rotary_div; always_ff @(posedge clock_49) begin @@ -337,9 +337,10 @@ end wire [7:0] p1_rotary = (is_bootleg == 2'b01) ? 8'hFF : rotary1; wire [7:0] p2_rotary = (is_bootleg == 2'b01) ? 8'hFF : rotary2; -wire m_up, m_down, m_left, m_right, m_fireA, m_fireB, m_fireC, m_fireD, m_fireE, m_fireF; -wire m_up2, m_down2, m_left2, m_right2, m_fire2A, m_fire2B, m_fire2C, m_fire2D, m_fire2E, m_fire2F; +wire m_up1, m_down1, m_left1, m_right1, m_up1B, m_down1B, m_left1B, m_right1B; +wire m_up2, m_down2, m_left2, m_right2, m_up2B, m_down2B, m_left2B, m_right2B; wire m_tilt, m_coin1, m_coin2, m_coin3, m_coin4, m_one_player, m_two_players, m_three_players, m_four_players; +wire [11:0] m_fire1, m_fire2; arcade_inputs inputs ( .clk ( clock_49 ), @@ -353,8 +354,8 @@ arcade_inputs inputs ( .joyswap ( joyswap ), .oneplayer ( 1'b0 ), .controls ( {m_tilt, m_coin4, m_coin3, m_coin2, m_coin1, m_four_players, m_three_players, m_two_players, m_one_player} ), - .player1 ( {m_fireF, m_fireE, m_fireD, m_fireC, m_fireB, m_fireA, m_up, m_down, m_left, m_right} ), - .player2 ( {m_fire2F, m_fire2E, m_fire2D, m_fire2C, m_fire2B, m_fire2A, m_up2, m_down2, m_left2, m_right2} ) + .player1 ( {m_up1B, m_down1B, m_left1B, m_right1B, m_fire1, m_up1, m_down1, m_left1, m_right1} ), + .player2 ( {m_up2B, m_down2B, m_left2B, m_right2B, m_fire2, m_up2, m_down2, m_left2, m_right2} ) ); endmodule diff --git a/Arcade_MiST/Konami Jackal/rtl/custom/k005885.sv.bakk b/Arcade_MiST/Konami Jackal/rtl/custom/k005885.sv.bakk deleted file mode 100644 index 243cd8eb..00000000 --- a/Arcade_MiST/Konami Jackal/rtl/custom/k005885.sv.bakk +++ /dev/null @@ -1,911 +0,0 @@ -//============================================================================ -// -// SystemVerilog implementation of the Konami 005885 custom tilemap -// generator -// Graphics logic based on the video section of the Green Beret core for -// MiSTer by MiSTer-X -// Copyright (C) 2020, 2021 Ace -// -// Permission is hereby granted, free of charge, to any person obtaining a -// copy of this software and associated documentation files (the "Software"), -// to deal in the Software without restriction, including without limitation -// the rights to use, copy, modify, merge, publish, distribute, sublicense, -// and/or sell copies of the Software, and to permit persons to whom the -// Software is furnished to do so, subject to the following conditions: -// -// The above copyright notice and this permission notice shall be included in -// all copies or substantial portions of the Software. -// -// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -// FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER -// DEALINGS IN THE SOFTWARE. -// -//============================================================================ - -//Note: This model of the 005885 cannot be used as-is to replace an original 005885. - -module k005885 -( - input CK49, //49.152MHz clock input - output NCK2, //6.144MHz clock output - output H1O, //3.072MHz clock output - output NCPE, //E clock for MC6809E - output NCPQ, //Q clock for MC6809E - output NEQ, //AND of E and Q clocks for MC6809E - input NRD, //Read enable (active low) - output NRES, //Reset passthrough - input [13:0] A, //Address bus from CPU - input [7:0] DBi, //Data bus input from CPU - output [7:0] DBo, //Data output to CPU - output [3:0] VCF, //Color address to tilemap LUT PROM - output [3:0] VCB, //Tile index to tilemap LUT PROM - input [3:0] VCD, //Data input from tilemap LUT PROM - output [3:0] OCF, //Color address to sprite LUT PROM - output [3:0] OCB, //Sprite index to sprite LUT PROM - input [3:0] OCD, //Data input from sprite LUT PROM - output [4:0] COL, //Color data output from color mixer - input NEXR, //Reset input (active low) - input NXCS, //Chip select (active low) - output NCSY, //Composite sync (active low) - output NHSY, //HSync (active low) - Not exposed on the original chip - output NVSY, //VSync (active low) - output HBLK, //HBlank (active high) - Not exposed on the original chip - output VBLK, //VBlank (active high) - Not exposed on the original chip - input NBUE, //Unknown - output NFIR, //Fast IRQ (FIRQ) output for MC6809E - output NIRQ, //IRQ output for MC6809E (VBlank IRQ) - output NNMI, //Non-maskable IRQ (NMI) for MC6809E - output NIOC, //Inverse of address line A11 for external address decoding logic - output NRMW, - - //Split I/O for tile and sprite data - output [15:0] R, //Address output to graphics ROMs (tiles) - input [7:0] RDU, //Upper 8 bits of graphics ROM data (tiles) - input [7:0] RDL, //Lower 8 bits of graphics ROM data (tiles) - output [15:0] S, //Address output to graphics ROMs (sprites) - input [7:0] SDU, //Upper 8 bits of graphics ROM data (sprites) - input [7:0] SDL, //Lower 8 bits of graphics ROM data (sprites) - - //Extra inputs for screen centering (alters HSync and VSync timing to reposition the video output) - input [3:0] HCTR, VCTR, - - //Special flag for reconfiguring the chip to mimic the anomalies found on bootlegs of games that use the 005885 - //Valid values: - //-00: Original behavior - //-01: Jackal bootleg (faster video timings, missing 4 lines from the video signal, misplaced HBlank, altered screen - // centering, sprite layer is missing one line per sprite, sprite layer is misplaced by one line when the screen is - // flipped) - //-10: Iron Horse bootleg (10 extra vertical lines resulting in slower VSync, altered screen centering, sprite layer is - // offset vertically by 1 line, sprite limit significantly lower than normal) - input [1:0] BTLG, - - //Extra data outputs for graphics ROMs - output ATR4, //Tilemap attribute bit 4 - output ATR5, //Tilemap attribute bit 5 - - //MiSTer high score system I/O (to be used only with Iron Horse) - input [11:0] hs_address, - input [7:0] hs_data_in, - output [7:0] hs_data_out, - input hs_write, - input hs_access -); - -//------------------------------------------------------- Signal outputs -------------------------------------------------------// - -//Reset line passthrough -assign NRES = NEXR; - -//Generate NIOC output (active low) -assign NIOC = ~(~NXCS & (A[13:11] == 3'b001)); - -//TODO: The timing of the NRMW output is currently unknown - set to 1 for now -assign NRMW = 1; - -//Output bits 4 and 5 of tilemap attributes for graphics ROM addressing -assign ATR4 = tileram_attrib_D[4]; -assign ATR5 = tileram_attrib_D[5]; - -//Data output to CPU -assign DBo = (ram_cs & ~NRD) ? ram_Dout: - (zram0_cs & ~NRD) ? zram0_Dout: - (zram1_cs & ~NRD) ? zram1_Dout: - (zram2_cs & ~NRD) ? zram2_Dout: - (tile_attrib_cs & ~NRD) ? tileram_attrib_Dout: - (tile_cs & ~NRD) ? tileram_Dout: - (tile1_attrib_cs & ~NRD) ? tileram1_attrib_Dout: - (tile1_cs & ~NRD) ? tileram1_Dout: - (spriteram_cs & ~NRD) ? spriteram_Dout: - 8'hFF; - -//------------------------------------------------------- Clock division -------------------------------------------------------// - -//Divide the incoming 49.152MHz clock to 6.144MHz and 3.072MHz -reg [3:0] div = 4'd0; -always_ff @(posedge CK49) begin - div <= div + 4'd1; -end -reg [2:0] n_div = 3'd0; -always_ff @(negedge CK49) begin - n_div <= n_div + 3'd1; -end -wire cen_6m = !div[2:0]; -wire n_cen_6m = !n_div; -wire cen_3m = !div; -assign NCK2 = div[2]; -assign H1O = div[3]; - -//The MC6809E requires two identical clocks with a 90-degree offset - assign these here -reg mc6809e_E = 0; -reg mc6809e_Q = 0; -always_ff @(posedge CK49) begin - reg [1:0] clk_phase = 0; - if(cen_6m) begin - clk_phase <= clk_phase + 1'd1; - case(clk_phase) - 2'b00: mc6809e_E <= 0; - 2'b01: mc6809e_Q <= 1; - 2'b10: mc6809e_E <= 1; - 2'b11: mc6809e_Q <= 0; - endcase - end -end -assign NCPQ = mc6809e_Q; -assign NCPE = mc6809e_E; - -//Output NEQ combines NCPE and NCPQ together via an AND gate - assign this here -assign NEQ = NCPE & NCPQ; - -//-------------------------------------------------------- Video timings -------------------------------------------------------// - -//The 005885's video output has 384 horziontal lines and 262 vertical lines with an active resolution of 240x224. Declare both -//counters as 9-bit registers. -reg [8:0] h_cnt = 9'd0; -reg [8:0] v_cnt = 9'd0; - -//Increment horizontal counter on every falling edge of the pixel clock and increment vertical counter when horizontal counter -//rolls over -reg hblank = 0; -reg vblank = 0; -reg vblank_irq_en = 0; -reg frame_odd_even = 0; -//Add an extra 10 lines to the vertical counter if a bootleg Iron Horse ROM set is loaded or remove 9 lines from the vertical -//counter if a bootleg Jackal ROM set is loaded -reg [8:0] vcnt_end = 0; -always_ff @(posedge CK49) begin - if(cen_6m) begin - if(BTLG == 2'b01) - vcnt_end <= 9'd252; - else if(BTLG == 2'b10) - vcnt_end <= 9'd271; - else - vcnt_end <= 9'd261; - end -end -//Reposition HSync and VSync if a bootleg Iron Horse or Jackal ROM set is loaded -reg [8:0] hsync_start = 9'd0; -reg [8:0] hsync_end = 9'd0; -reg [8:0] vsync_start = 9'd0; -reg [8:0] vsync_end = 9'd0; -always_ff @(posedge CK49) begin - if(BTLG == 2'b01) begin - hsync_start <= HCTR[3] ? 9'd287 : 9'd295; - hsync_end <= HCTR[3] ? 9'd318 : 9'd326; - vsync_start <= 9'd244; - vsync_end <= 9'd251; - end - else if(BTLG == 2'b10) begin - hsync_start <= HCTR[3] ? 9'd290 : 9'd310; - hsync_end <= HCTR[3] ? 9'd321 : 9'd341; - vsync_start <= 9'd255; - vsync_end <= 9'd262; - end - else begin - hsync_start <= HCTR[3] ? 9'd288 : 9'd296; - hsync_end <= HCTR[3] ? 9'd319 : 9'd327; - vsync_start <= 9'd254; - vsync_end <= 9'd261; - end -end -always_ff @(posedge CK49) begin - if(cen_6m) begin - case(h_cnt) - 0: begin - vblank_irq_en <= 0; - h_cnt <= h_cnt + 9'd1; - end - //HBlank ends two lines earlier than normal on bootleg Jackal PCBs - 11: begin - if(BTLG == 2'b01) - hblank <= 0; - h_cnt <= h_cnt + 9'd1; - end - 13: begin - if(BTLG != 2'b01) - hblank <= 0; - h_cnt <= h_cnt + 9'd1; - end - //Shift the start of HBlank two lines earlier when bootleg Jackal ROMs are loaded - 251: begin - if(BTLG == 2'b01) - hblank <= 1; - h_cnt <= h_cnt + 9'd1; - end - 253: begin - if(BTLG != 2'b01) - hblank <= 1; - h_cnt <= h_cnt + 9'd1; - end - 383: begin - h_cnt <= 0; - case(v_cnt) - 15: begin - vblank <= 0; - v_cnt <= v_cnt + 9'd1; - end - 239: begin - vblank <= 1; - vblank_irq_en <= 1; - frame_odd_even <= ~frame_odd_even; - v_cnt <= v_cnt + 9'd1; - end - vcnt_end: begin - v_cnt <= 9'd0; - end - default: v_cnt <= v_cnt + 9'd1; - endcase - end - default: h_cnt <= h_cnt + 9'd1; - endcase - end -end - -//Output HBlank and VBlank (both active high) -assign HBLK = hblank; -assign VBLK = vblank; - -//Generate horizontal sync and vertical sync (both active low) -assign NHSY = HCTR[3] ? ~(h_cnt >= hsync_start - ~HCTR[2:0] && h_cnt <= hsync_end - ~HCTR[2:0]): - ~(h_cnt >= hsync_start + HCTR[2:0] && h_cnt <= hsync_end + HCTR[2:0]); -assign NVSY = ~(v_cnt >= vsync_start - VCTR && v_cnt <= vsync_end - VCTR); -assign NCSY = NHSY ^ NVSY; - -//------------------------------------------------------------- IRQs -----------------------------------------------------------// - -//IRQ (triggers every VBlank) -reg vblank_irq = 1; -always_ff @(posedge CK49 or negedge NEXR) begin - if(!NEXR) - vblank_irq <= 1; - else if(cen_6m) begin - if(!irq_mask) - vblank_irq <= 1; - else if(vblank_irq_en) - vblank_irq <= 0; - end -end -assign NIRQ = vblank_irq; - -//NMI (triggers every 64 scanlines starting from scanline 48) -reg nmi = 1; -always_ff @(posedge CK49 or negedge NEXR) begin - if(!NEXR) - nmi <= 1; - else if(cen_3m) begin - if(!nmi_mask) - nmi <= 1; - else if((v_cnt[7:0] + 9'd16) % 9'd64 == 0) - nmi <= 0; - end -end -assign NNMI = nmi; - -//FIRQ (triggers every second VBlank) -reg firq = 1; -always_ff @(posedge CK49 or negedge NEXR) begin - if(!NEXR) - firq <= 1; - else if(cen_3m) begin - if(!firq_mask) - firq <= 1; - else if(!frame_odd_even && v_cnt == 9'd239) - firq <= 0; - end -end -assign NFIR = firq; - -//----------------------------------------------------- Internal registers -----------------------------------------------------// - -//The 005885 has five 8-bit registers set up as follows according to information in konamiic.txt found in MAME's source code: -/* -control registers -000: scroll y -001: scroll x (low 8 bits) -002: -------x scroll x (high bit) - ----xxx- row/colscroll control - 000 = solid scroll (finalizr, ddribble bg) - 100 = solid scroll (jackal) - 001 = ? (ddribble fg) - 011 = colscroll (jackal high scores) - 101 = rowscroll (ironhors, jackal map) -003: ------xx high bits of the tile code - -----x-- unknown (finalizr) - ----x--- selects sprite buffer (and makes a copy to a private buffer?) - --x----- unknown (ironhors) - -x------ unknown (ironhors) - x------- unknown (ironhors, jackal) -004: -------x nmi enable - ------x- irq enable - -----x-- firq enable - ----x--- flip screen -*/ - -wire regs_cs = ~NXCS & (A[13:11] == 2'b00) & (A[6:3] == 4'd0); - -reg [7:0] scroll_y, scroll_x, scroll_ctrl, tile_ctrl; -reg nmi_mask = 0; -reg irq_mask = 0; -reg firq_mask = 0; -reg flipscreen = 0; - -//Write to the appropriate register -always_ff @(posedge CK49) begin - if(cen_3m) begin - if(regs_cs && NRD) - case(A[2:0]) - 3'b000: scroll_y <= DBi; - 3'b001: scroll_x <= DBi; - 3'b010: scroll_ctrl <= DBi; - 3'b011: tile_ctrl <= DBi; - 3'b100: begin - nmi_mask <= DBi[0]; - irq_mask <= DBi[1]; - firq_mask <= DBi[2]; - flipscreen <= DBi[3]; - end - default; - endcase - end -end - -//--------------------------------------------------------- Unknown RAM --------------------------------------------------------// - -wire ram_cs = ~NXCS & (A >= 14'h0005 && A <= 14'h001F); - -wire [7:0] ram_Dout; -spram #(8, 5) RAM -( - .clk(CK49), - .we(ram_cs & NRD), - .addr(A[4:0]), - .data(DBi), - .q(ram_Dout) -); - -//-------------------------------------------------------- Internal ZRAM -------------------------------------------------------// - -wire zram0_cs = ~NXCS & (A >= 16'h0020 && A <= 16'h003F); -wire zram1_cs = ~NXCS & (A >= 16'h0040 && A <= 16'h005F); -wire zram2_cs = ~NXCS & (A >= 16'h0060 && A <= 16'h00DF); - -//The 005885 addresses ZRAM with either horizontal or vertical position bits depending on whether its scroll mode is set to -//line scroll or column scroll - use vertical position bits for line scroll and horizontal position bits for column scroll, -//otherwise don't address it -wire [4:0] zram_A = (scroll_ctrl[3:1] == 3'b101) ? tilemap_vpos[7:3]: - (scroll_ctrl[3:1] == 3'b011) ? tilemap_hpos[7:3]: - 5'h00; -wire [7:0] zram0_D, zram1_D, zram2_D, zram0_Dout, zram1_Dout, zram2_Dout; -dpram_dc #(.widthad_a(5)) ZRAM0 -( - .clock_a(CK49), - .address_a(A[4:0]), - .data_a(DBi), - .q_a(zram0_Dout), - .wren_a(zram0_cs & NRD), - - .clock_b(CK49), - .address_b(zram_A), - .q_b(zram0_D) -); -spram #(8, 5) ZRAM1 -( - .clk(CK49), - .we(zram1_cs & NRD), - .addr(A[4:0]), - .data(DBi), - .q(zram1_Dout) -); -spram #(8, 5) ZRAM2 -( - .clk(CK49), - .we(zram2_cs & NRD), - .addr(A[4:0]), - .data(DBi), - .q(zram2_Dout) -); - -//------------------------------------------------------------ VRAM ------------------------------------------------------------// - -//VRAM is external to the 005885 and combines multiple banks into a single 8KB RAM chip for tile attributes and data (two layers), -//and two sprite banks. For simplicity, this RAM has been made internal to the 005885 implementation and split into its -//constituent components. -wire tile_attrib_cs = ~NXCS & (A[13:10] == 4'b1000); -wire tile_cs = ~NXCS & (A[13:10] == 4'b1001); -wire tile1_attrib_cs = ~NXCS & (A[13:10] == 4'b1010); -wire tile1_cs = ~NXCS & (A[13:10] == 4'b1011); -wire spriteram_cs = ~NXCS & (A[13:12] == 2'b11); - -wire [7:0] tileram_attrib_Dout, tileram_Dout, tileram1_attrib_Dout, tileram1_Dout, spriteram_Dout; -wire [7:0] tileram_attrib_D, tileram_D, tileram1_attrib_D, tileram1_D, spriteram_D; -//Tilemap layer 0 -dpram_dc #(.widthad_a(10)) VRAM_TILEATTRIB0 -( - .clock_a(CK49), - .address_a(A[9:0]), - .data_a(DBi), - .q_a(tileram_attrib_Dout), - .wren_a(tile_attrib_cs & NRD), - - .clock_b(CK49), - .address_b(vram_A), - .q_b(tileram_attrib_D) -); -dpram_dc #(.widthad_a(10)) VRAM_TILECODE0 -( - .clock_a(CK49), - .address_a(A[9:0]), - .data_a(DBi), - .q_a(tileram_Dout), - .wren_a(tile_cs & NRD), - - .clock_b(CK49), - .address_b(vram_A), - .q_b(tileram_D) -); -//Tilemap layer 1 -dpram_dc #(.widthad_a(10)) VRAM_TILEATTRIB1 -( - .clock_a(CK49), - .address_a(A[9:0]), - .data_a(DBi), - .q_a(tileram1_attrib_Dout), - .wren_a(tile1_attrib_cs & NRD), - - .clock_b(CK49), - .address_b(vram_A), - .q_b(tileram1_attrib_D) -); -dpram_dc #(.widthad_a(10)) VRAM_TILECODE1 -( - .clock_a(CK49), - .address_a(A[9:0]), - .data_a(DBi), - .q_a(tileram1_Dout), - .wren_a(tile1_cs & NRD), - - .clock_b(CK49), - .address_b(vram_A), - .q_b(tileram1_D) -); - -// Hiscore mux (this is only to be used with Iron Horse as its high scores are stored in sprite RAM) -wire [11:0] VRAM_SPR_AD = hs_access ? hs_address : A[11:0]; -wire [7:0] VRAM_SPR_DIN = hs_access ? hs_data_in : DBi; -wire VRAM_SPR_WE = hs_access ? hs_write : (spriteram_cs & NRD); -wire [7:0] VRAM_SPR_DOUT; - -assign hs_data_out = hs_access ? VRAM_SPR_DOUT : 8'h00; -assign spriteram_Dout = hs_access ? 8'h00 : VRAM_SPR_DOUT; - -//Sprites -dpram_dc #(.widthad_a(12)) VRAM_SPR -( - .clock_a(CK49), - .address_a(VRAM_SPR_AD), - .data_a(VRAM_SPR_DIN), - .q_a(VRAM_SPR_DOUT), - .wren_a(VRAM_SPR_WE), - - .clock_b(~CK49), - .address_b(spriteram_A), - .q_b(spriteram_D) -); - -//-------------------------------------------------------- Tilemap layer -------------------------------------------------------// - -//TODO: The current implementation only handles one of the 005885's two tilemap layers - add logic to handle both layers - -//XOR horizontal and vertical counter bits with flipscreen bit -wire [8:0] hcnt_x = h_cnt ^ {9{flipscreen}}; -wire [8:0] vcnt_x = v_cnt ^ {9{flipscreen}}; - -//Generate tilemap position by summing the XORed counter bits with their respective scroll registers or ZRAM bank 0 based on -//whether row scroll or column scroll is enabled -wire [8:0] row_scroll = (scroll_ctrl[3:1] == 3'b101) ? zram0_D : {scroll_ctrl[0], scroll_x}; -wire [8:0] col_scroll = (scroll_ctrl[3:1] == 3'b011) ? zram0_D : scroll_y; -wire [8:0] tilemap_hpos = hcnt_x + row_scroll; -wire [8:0] tilemap_vpos = vcnt_x + col_scroll; - -//Address output to tilemap section of VRAM -wire [9:0] vram_A = {tilemap_vpos[7:3], tilemap_hpos[7:3]}; - -//Assign tile index as bits 5 and 6 of tilemap attributes and the tile code -wire [9:0] tile_index = {tileram_attrib_D[7:6], tileram_D}; - -//XOR tile H/V flip bits with the flipscreen bit -wire tile_hflip = tileram_attrib_D[4]; -wire tile_vflip = tileram_attrib_D[5]; - -//Address output to graphics ROMs -assign R = {tile_ctrl[1:0], tile_index, (tilemap_vpos[2:0] ^ {3{tile_vflip}}), (tilemap_hpos[2] ^ tile_hflip)}; - -//Latch tile data from graphics ROMs, tile colors and tile H flip bit from VRAM on the falling edge of tilemap horizontal position -//bit 1 -reg [15:0] RD_lat = 16'd0; -reg [3:0] tile_color = 4'd0; -reg tile_hflip_lat = 0; -reg old_tilehpos1; -always_ff @(posedge CK49) begin - old_tilehpos1 <= tilemap_hpos[1]; - if(old_tilehpos1 && !tilemap_hpos[1]) begin - tile_color <= tileram_attrib_D[3:0]; - RD_lat <= flipscreen ? {RDL, RDU} : {RDU, RDL}; - tile_hflip_lat <= tileram_attrib_D[4]; - end -end - -//Multiplex graphics ROM data down from 16 bits to 8 using bit 1 of the horizontal position -wire [7:0] RD = (tilemap_hpos[1] ^ tile_hflip_lat) ? RD_lat[7:0] : RD_lat[15:8]; - -//Further multiplex graphics ROM data down from 8 bits to 4 using bit 0 of the horizontal position -wire [3:0] tile_pixel = (tilemap_hpos[0] ^ tile_hflip_lat) ? RD[3:0] : RD[7:4]; - -//Retrieve tilemap select bit from bit 1 of the tile control register XORed with bit 5 of the same register -wire tile_sel = tile_ctrl[1] ^ tile_ctrl[5]; -reg tilemap_en = 0; -always_ff @(posedge CK49) begin - if(n_cen_6m) begin - tilemap_en <= tile_sel; - end -end - -//Address output to tilemap LUT PROM -assign VCF = tile_color; -assign VCB = tile_pixel; - -//Shift the tilemap layer left by two lines when the screen is flipped -reg [7:0] tilemap_shift; -always_ff @(posedge CK49) begin - if(cen_6m) - tilemap_shift <= {VCD, tilemap_shift[7:4]}; -end -wire [3:0] tilemap_D = flipscreen ? tilemap_shift[3:0] : VCD; - -//-------------------------------------------------------- Sprite layer --------------------------------------------------------// - -//The following code is an adaptation of the sprite renderer from MiSTer-X's Green Beret core tweaked for the 005885's sprite format -reg [8:0] sprite_hpos = 9'd0; -reg [8:0] sprite_vpos = 9'd0; -always_ff @(posedge CK49) begin - if(cen_6m) begin - sprite_hpos <= h_cnt; - //If a bootleg Iron Horse ROM set is loaded, apply a vertical offset of 65 lines (66 when flipped) to recreate the - //bootleg hardware's 1-line downward vertical offset between the sprite and tilemap layers, otherwise apply a - //vertical offset of 66 lines (65 lines when flipped) - if(BTLG == 2'b10) - if(flipscreen) - sprite_vpos <= v_cnt + 9'd66; - else - sprite_vpos <= v_cnt + 9'd65; - else - if(flipscreen) - sprite_vpos <= v_cnt + 9'd65; - else - sprite_vpos <= v_cnt + 9'd66; - end -end - -//Sprite state machine -reg [8:0] sprite_index; -reg [2:0] sprite_offset; -reg [7:0] sprite_attrib0, sprite_attrib1, sprite_attrib2, sprite_attrib3, sprite_attrib4; -reg [2:0] sprite_fsm_state; -reg [5:0] sprite_width; -reg [15:0] sprite_rom_addr; -//Bootleg Iron Horse PCBs have a lower-than-normal sprite limit causing noticeable sprite flickering - reduce the sprite limit -//to 32 sprites (0 - 155 in increments of 5) if one such ROM set is loaded (render 96 sprites at once, 0 - 485 in increments of -//5, otherwise) -wire [8:0] sprite_limit = (BTLG == 2'b10) ? 9'd155 : 9'd485; -reg [3:0] waitstate; - -always_ff @(posedge CK49) begin - //Reset the sprite state machine whenever the sprite horizontal postion, and in turn the horziontal counter, returns to 0 - //Also hold the sprite state machine in this initial state for the first line while drawing sprites for bootleg Iron Horse - //ROM sets to prevent graphical garbage from occurring on the top-most line - if(sprite_hpos == 9'd0 || (BTLG == 2'b10 && (!flipscreen && sprite_vpos <= 9'd80) || (flipscreen && sprite_vpos >= 9'd304))) begin - sprite_width <= 0; - sprite_index <= 0; - sprite_offset <= 3'd4; - sprite_fsm_state <= 1; - waitstate <= 0; - end - else - case(sprite_fsm_state) - 0: /* empty */ ; - 1: begin - waitstate <= 0; - if(sprite_index > sprite_limit) - sprite_fsm_state <= 0; - else begin - sprite_attrib4 <= spriteram_D; - sprite_offset <= 3'd3; - sprite_fsm_state <= sprite_fsm_state + 3'd1; - end - end - 2: begin - sprite_attrib3 <= spriteram_D; - sprite_offset <= 3'd2; - sprite_fsm_state <= sprite_fsm_state + 3'd1; - end - 3: begin - //Skip the current sprite if it's inactive, otherwise obtain the sprite Y attribute and continue - //scanning out the rest of the sprite attributes - if(sprite_active) begin - sprite_attrib2 <= spriteram_D; - sprite_offset <= 3'd1; - sprite_fsm_state <= sprite_fsm_state + 3'd1; - end - else begin - sprite_index <= sprite_index + 9'd5; - sprite_offset <= 3'd4; - sprite_fsm_state <= 3'd1; - end - end - 4: begin - sprite_attrib1 <= spriteram_D; - sprite_offset <= 3'd0; - sprite_fsm_state <= sprite_fsm_state + 3'd1; - end - 5: begin - sprite_attrib0 <= spriteram_D; - sprite_offset <= 3'd4; - sprite_index <= sprite_index + 9'd5; - case(sprite_size) - 3'b000: sprite_width <= 6'b110000 + (BTLG == 2'b01 && flipscreen); - 3'b001: sprite_width <= 6'b110000 + (BTLG == 2'b01 && flipscreen); - 3'b010: sprite_width <= 6'b111000 + (BTLG == 2'b01 && flipscreen); - 3'b011: sprite_width <= 6'b111000 + (BTLG == 2'b01 && flipscreen); - 3'b100: sprite_width <= 6'b100000 + (BTLG == 2'b01 && flipscreen); - default: sprite_width <= 6'b100000 + (BTLG == 2'b01 && flipscreen); - endcase - sprite_fsm_state <= sprite_fsm_state + 3'd1; - waitstate <= 4'd14; - end - 6: if (waitstate == 0) begin - //Skip the last line of a sprite if a bootleg Jackal ROM set is loaded (the hardware on such bootlegs fails - //to render the last line of sprites), otherwise write sprites as normal - if(BTLG == 2'b01 && !flipscreen) - if(sprite_width == 6'b111110) - sprite_width <= sprite_width + 6'd2; - else - sprite_width <= sprite_width + 6'd1; - else - sprite_width <= sprite_width + 6'd1; - - if (sprite_width[1:0] == 2'b11) waitstate <= 4'd14; - sprite_fsm_state <= wre ? sprite_fsm_state : 3'd1; - end - else begin - sprite_rom_addr <= {sprite_code_sized, ly[2:0], lx[2]}; - waitstate <= waitstate - 1'd1; - end - default:; - endcase -end - -//Obtain sprite X position from sprite attribute byte 3 - append a 9th bit based on the state of bit 1 sprite attribute byte 4, -//bit 0 of sprite attribute byte 4 if high or the AND of the upper 5 bits of the horizontal position if low -reg sprite_x8; -always_ff @(posedge CK49) begin - if(sprite_attrib4[1]) - sprite_x8 <= sprite_attrib4[0]; - else - sprite_x8 <= &sprite_attrib3[7:3]; -end -wire [8:0] sprite_x = {sprite_x8 ^ flipscreen, sprite_attrib3 ^ {8{flipscreen}}}; - -//If the sprite state machine is in state 3, obtain sprite Y position directly from sprite RAM, otherwise obtain it from -//sprite attribute byte 2 -wire [7:0] sprite_y = (sprite_fsm_state == 3'd3) ? spriteram_D : sprite_attrib2; - -//Sprite flip attributes are stored in bits 5 (horizontal) and 6 (vertical) of sprite attribute byte 4 -//Also XOR these attributes with the flipscreen bit (XOR with the inverse for vertical flip) -wire sprite_hflip = sprite_attrib4[5] ^ flipscreen; -wire sprite_vflip = sprite_attrib4[6] ^ ~flipscreen; - -//Sprite code is sprite attribute byte 0 sandwiched between bits 1 and 0 and bits 3 and 2 of sprite attribute byte 1 -wire [11:0] sprite_code = {sprite_attrib1[1:0], sprite_fsm_state == 5 ? spriteram_D : sprite_attrib0, sprite_attrib1[3:2]}; - -//Sprite color is the upper 4 bits of sprite attribute byte 1 -wire [3:0] sprite_color = sprite_attrib1[7:4]; - -//The 005885 supports 5 different sprite sizes: 8x8, 8x16, 16x8, 16x16 and 32x32. Retrieve this attribute from bits [4:2] of -//sprite attribute byte 4 -wire [2:0] sprite_size = sprite_attrib4[4:2]; - -//Adjust sprite code based on sprite size -wire [11:0] sprite_code_sized = sprite_size == 3'b000 ? {sprite_code[11:2], ly[3], lx[3]}: //16x16 - sprite_size == 3'b001 ? {sprite_code[11:1], lx[3]}: //16x8 - sprite_size == 3'b010 ? {sprite_code[11:2], ly[3], sprite_code[0]}: //8x16 - sprite_size == 3'b011 ? sprite_code: //8x8 - {sprite_code[11:2] + {ly[4], lx[4]}, ly[3], lx[3]}; //32x32 - -//Subtract vertical sprite position from sprite Y parameter to obtain sprite height -wire [8:0] sprite_height = {(sprite_y[7:4] == 4'hF), sprite_y ^ {8{flipscreen}}} - sprite_vpos; - -//Set when a sprite is active depending on whether it is 8, 16 or 32 pixels tall -reg sprite_active; -always @(*) begin - case(sprite_size) - 3'b000: sprite_active = (sprite_height[8:7] == 2'b11) & (sprite_height[6] ^ ~flipscreen) & (sprite_height[5] ^ flipscreen) - & (sprite_height[4] ^ flipscreen); - 3'b001: sprite_active = (sprite_height[8:7] == 2'b11) & (sprite_height[6] ^ ~flipscreen) & (sprite_height[5] ^ flipscreen) - & (sprite_height[4] ^ flipscreen) & (sprite_height[3] ^ flipscreen); - 3'b010: sprite_active = (sprite_height[8:7] == 2'b11) & (sprite_height[6] ^ ~flipscreen) & (sprite_height[5] ^ flipscreen) - & (sprite_height[4] ^ flipscreen); - 3'b011: sprite_active = (sprite_height[8:7] == 2'b11) & (sprite_height[6] ^ ~flipscreen) & (sprite_height[5] ^ flipscreen) - & (sprite_height[4] ^ flipscreen) & (sprite_height[3] ^ flipscreen); - 3'b100: sprite_active = (sprite_height[8:7] == 2'b11) & (sprite_height[6] ^ ~flipscreen) & (sprite_height[5] ^ flipscreen); - default: sprite_active = (sprite_height[8:7] == 2'b11) & (sprite_height[6] ^ ~flipscreen) & (sprite_height[5] ^ flipscreen); - endcase -end - -wire [4:0] lx = sprite_width[4:0] ^ {5{sprite_hflip}}; -wire [4:0] ly = sprite_height[4:0] ^ {5{sprite_vflip}}; - -//Assign address outputs to sprite ROMs -assign S = sprite_rom_addr; - - -//Multiplex sprite ROM data down from 16 bits to 8 using bit 1 of the horizontal position -wire [7:0] SD = lx[1] ? SDL : SDU; - -//Further multiplex sprite ROM data down from 8 bits to 4 using bit 0 of the horizontal position -wire [3:0] sprite_pixel = lx[0] ? SD[3:0] : SD[7:4]; - -//Sum the sprite index with the sprite offset and address sprite RAM with it along with tile control register bit 3 -wire [8:0] sprite_address = (sprite_index + sprite_offset); -reg sprite_bank = 0; -reg old_vsync; -//Normally, the 005885 latches the sprite bank from bit 3 of the tile control register on the rising edge of VSync, though this causes -//jerky scrolling with sprites for bootleg Jackal ROM sets - bypass this latch if such ROM sets are loaded -always_ff @(posedge CK49) begin - old_vsync <= NVSY; - if(!NEXR) - sprite_bank <= 0; - else if(!old_vsync && NVSY) - sprite_bank <= tile_ctrl[3]; -end -wire [11:0] spriteram_A = {(BTLG == 2'b01) ? tile_ctrl[3] : sprite_bank, 2'b00, sprite_address}; - -//Address output to sprite LUT PROM -assign OCF = sprite_color; -assign OCB = sprite_pixel; - -//----------------------------------------------------- Sprite line buffer -----------------------------------------------------// - -//The sprite line buffer is external to the 005885 and consists of two 4464 DRAM chips. For simplicity, both the logic for the -//sprite line buffer and the sprite line buffer itself are internal to the 005885 implementation. - -//Enable writing to sprite line buffer when bit 5 of the sprite width is 1 -wire wre = sprite_width[5]; - -//Set sprite line buffer bank as bit 0 of the sprite vertical position -wire sprite_lbuff_bank = sprite_vpos[0]; - -//Sum sprite X position with the following bits of the sprite width to address the sprite line buffer based on sprite size: -//32 pixels wide: bits [4:0] -//16 pixels wide: bits [3:0] -//8 pixels wide: bits [2:0] -//XOR the upper bits for screen flipping on 16 pixel and 8 pixel wide sprites -reg [4:0] final_sprite_width; -always @(*) begin - case(sprite_size) - 3'b000: final_sprite_width <= {sprite_width[4] ^ ~flipscreen, sprite_width[3:0]}; - 3'b001: final_sprite_width <= {sprite_width[4] ^ ~flipscreen, sprite_width[3:0]}; - 3'b010: final_sprite_width <= {sprite_width[4:3] ^ {2{~flipscreen}}, sprite_width[2:0]}; - 3'b011: final_sprite_width <= {sprite_width[4:3] ^ {2{~flipscreen}}, sprite_width[2:0]}; - 3'b100: final_sprite_width <= sprite_width[4:0]; - default: final_sprite_width <= sprite_width[4:0]; - endcase -end -wire [8:0] wpx = sprite_x + final_sprite_width; - -//Generate sprite line buffer write addresses -reg [9:0] lbuff_A; -reg lbuff_we; -always_ff @(posedge CK49) begin - lbuff_A <= {~sprite_lbuff_bank, wpx}; - lbuff_we <= wre & (waitstate == 0); - //lbuff_Din <= OCD; -end - -//Latch sprite LUT PROM data on the falling edge of the main clock -wire [3:0] lbuff_Din = OCD; -//always_ff @(negedge CK49) begin -// lbuff_Din <= OCD; -//end - -//Generate read address for sprite line buffer on the rising edge of the pixel clock (apply a -225 offset when the screen -//is flipped) -reg [9:0] radr0 = 10'd0; -reg [9:0] radr1 = 10'd1; -always_ff @(posedge CK49) begin - if(cen_6m) - radr0 <= {sprite_lbuff_bank, flipscreen ? sprite_hpos - 9'd225 : sprite_hpos}; -end - -//Sprite line buffer -wire [3:0] lbuff_Dout; -dpram_dc #(.widthad_a(10)) LBUFF -( - .clock_a(CK49), - .address_a(lbuff_A), - .data_a({4'd0, lbuff_Din}), - .wren_a(lbuff_we & (lbuff_Din != 0)), - - .clock_b(CK49), - .address_b(radr0), - .data_b(8'h0), - .wren_b(radr0 == radr1), - .q_b({4'bZZZZ, lbuff_Dout}) -); - -//Latch sprite data from the sprite line buffer -wire lbuff_read_en = (div[2:0] == 3'b100); -reg [3:0] lbuff_read = 4'd0; -always_ff @(posedge CK49) begin - if(lbuff_read_en) begin - if(radr0 != radr1) - lbuff_read <= lbuff_Dout; - radr1 <= radr0; - end -end - -//Delay sprite layer by 2 horizontal lines (1 line if a bootleg Jackal ROM set is loaded and the screen is flipped) -reg [7:0] sprite_dly = 8'd0; -always_ff @(posedge CK49) begin - if(cen_6m) begin - if(BTLG == 2'b01 && flipscreen) - sprite_dly <= {4'd0, lbuff_read}; - else - sprite_dly <= {lbuff_read, sprite_dly[7:4]}; - end -end -//Jackal bootlegs fail to render the last two vertical lines of the sprite layer - model this behavior here -wire [3:0] sprite_D = (BTLG == 2'b01 && ((h_cnt >= 244 && ~flipscreen) || (h_cnt >= 248 && flipscreen))) ? 4'd0 : sprite_dly[3:0]; - -//--------------------------------------------------------- Color mixer --------------------------------------------------------// - -//Multiplex tile and sprite data, then output the final result -wire tile_sprite_sel = (tilemap_en | ~(|sprite_D)); -wire [3:0] tile_sprite_D = tile_sprite_sel ? tilemap_D : sprite_D; - -//Latch and output pixel data -reg [4:0] pixel_D; -always_ff @(posedge CK49) begin - if(cen_6m) - pixel_D <= {tile_sprite_sel, tile_sprite_D}; -end -assign COL = (BTLG == 2'b01 && ((h_cnt >= 247 && ~flipscreen) || (h_cnt <= 14 && flipscreen))) || - (BTLG == 2'b10 && ((h_cnt <= 20 && ~flipscreen) || ((h_cnt <= 18 || h_cnt >= 251) && flipscreen))) ? 5'd0 : pixel_D; -//The above condition blacks out the last 4 lines on the right side of the screen (left when flipped) when a bootleg Jackal ROM set -//is loaded and blacks out the left-most 8 lines (7 when flipped plus an extra 2 lines on the right side) when a bootleg Iron Horse -//ROM set is loaded - this simulates the earlier-than-normal start of HBlank for Jackal bootlegs and later-than-normal end of -//HBlank for Iron Horse bootlegs while maintaining the usual 240x224 display area - -endmodule diff --git a/Arcade_MiST/Konami Timepilot Hardware/TimePlt_MiST.qpf b/Arcade_MiST/Konami Timepilot Hardware/TimePlt.qpf similarity index 97% rename from Arcade_MiST/Konami Timepilot Hardware/TimePlt_MiST.qpf rename to Arcade_MiST/Konami Timepilot Hardware/TimePlt.qpf index 0f781249..4ccba65e 100644 --- a/Arcade_MiST/Konami Timepilot Hardware/TimePlt_MiST.qpf +++ b/Arcade_MiST/Konami Timepilot Hardware/TimePlt.qpf @@ -28,4 +28,4 @@ DATE = "11:17:10 October 25, 2017" # Revisions -PROJECT_REVISION = "TimePlt_MiST" +PROJECT_REVISION = "TimePlt" diff --git a/Arcade_MiST/Konami Timepilot Hardware/TimePlt_MiST.qsf b/Arcade_MiST/Konami Timepilot Hardware/TimePlt.qsf similarity index 100% rename from Arcade_MiST/Konami Timepilot Hardware/TimePlt_MiST.qsf rename to Arcade_MiST/Konami Timepilot Hardware/TimePlt.qsf diff --git a/Arcade_MiST/Konami Timepilot Hardware/TimePlt_MiST.sdc b/Arcade_MiST/Konami Timepilot Hardware/TimePlt.sdc similarity index 100% rename from Arcade_MiST/Konami Timepilot Hardware/TimePlt_MiST.sdc rename to Arcade_MiST/Konami Timepilot Hardware/TimePlt.sdc diff --git a/Arcade_MiST/Midway MCR 3/rtl/MCR3_MiST.sv b/Arcade_MiST/Midway MCR 3/rtl/MCR3_MiST.sv index 764b2d8f..c46d921d 100644 --- a/Arcade_MiST/Midway MCR 3/rtl/MCR3_MiST.sv +++ b/Arcade_MiST/Midway MCR 3/rtl/MCR3_MiST.sv @@ -594,7 +594,7 @@ spinner spinner4 (clk_sys, reset, m_left4, m_right4, 1'b0, vs, wheel4); // dotron spinner wire [5:0] dotron_spinner; -spinner #(15) dotron_spn (clk_sys, reset, m_fireE | m_fireG, m_fireF | m_fireH, 1'b0, vs, dotron_spinner); +spinner #(15) dotron_spn (clk_sys, reset, m_fireE | m_fireG | m_leftB, m_fireF | m_fireH | m_rightB, 1'b0, vs, dotron_spinner); // Common inputs wire m_up, m_down, m_left, m_right, m_fireA, m_fireB, m_fireC, m_fireD, m_fireE, m_fireF, m_fireG, m_fireH, m_upB, m_downB, m_leftB, m_rightB; diff --git a/Arcade_MiST/Midway MCR 3/rtl/sounds_good.vhd b/Arcade_MiST/Midway MCR 3/rtl/sounds_good.vhd index 01d7a07a..2bbf9db5 100644 --- a/Arcade_MiST/Midway MCR 3/rtl/sounds_good.vhd +++ b/Arcade_MiST/Midway MCR 3/rtl/sounds_good.vhd @@ -218,7 +218,7 @@ cpu_data_in <= rom_do when cs_rom = '1' else audio_out <= pia_pa_out(7 downto 0)&pia_pb_out(7 downto 6); pia_pb_in <= "1100"&sndsel; pia_ca1_in <= not sint; -pia_pa_in <= (others => '0'); +pia_pa_in <= pia_pa_out; pia_cb1_in <= '0'; -- spare stat <= pia_pb_out(5 downto 4); diff --git a/Arcade_MiST/Midway MCR 3/rtl/turbo_cheap_squeak.vhd b/Arcade_MiST/Midway MCR 3/rtl/turbo_cheap_squeak.vhd index 68942ef9..3af86333 100644 --- a/Arcade_MiST/Midway MCR 3/rtl/turbo_cheap_squeak.vhd +++ b/Arcade_MiST/Midway MCR 3/rtl/turbo_cheap_squeak.vhd @@ -137,7 +137,7 @@ cpu_irq <= pia_irqa or pia_irqb; audio_out <= pia_pa_out(7 downto 0)&pia_pb_out(7 downto 6); pia_pb_in(5 downto 0) <= "00"&input(4 downto 1); -- stat1-stat0, sr3-sr0 pia_ca1_in <= not input(0); -- sirq -pia_pa_in <= (others => '0'); +pia_pa_in <= pia_pa_out; pia_cb1_in <= '0'; -- spare end rtl; diff --git a/Arcade_MiST/Midway MCR Scroll/SpyHunter_MiST/rtl/cheap_squeak_deluxe.vhd b/Arcade_MiST/Midway MCR Scroll/SpyHunter_MiST/rtl/cheap_squeak_deluxe.vhd index 6e9dc8f1..10513de0 100644 --- a/Arcade_MiST/Midway MCR Scroll/SpyHunter_MiST/rtl/cheap_squeak_deluxe.vhd +++ b/Arcade_MiST/Midway MCR Scroll/SpyHunter_MiST/rtl/cheap_squeak_deluxe.vhd @@ -212,7 +212,7 @@ rom_addr <= rom_addr_out; audio_out <= pia_pa_out(7 downto 0)&pia_pb_out(7 downto 6); pia_pb_in(5 downto 0) <= "00"&input(3 downto 0); -- stat1-stat0, sr3-sr0 pia_ca1_in <= not input(4); -- sirq -pia_pa_in <= (others => '0'); +pia_pa_in <= pia_pa_out; pia_cb1_in <= '0'; -- spare diff --git a/Arcade_MiST/Midway MCR Scroll/TurboTag_MiST/rtl/cheap_squeak_deluxe.vhd b/Arcade_MiST/Midway MCR Scroll/TurboTag_MiST/rtl/cheap_squeak_deluxe.vhd index 6e9dc8f1..10513de0 100644 --- a/Arcade_MiST/Midway MCR Scroll/TurboTag_MiST/rtl/cheap_squeak_deluxe.vhd +++ b/Arcade_MiST/Midway MCR Scroll/TurboTag_MiST/rtl/cheap_squeak_deluxe.vhd @@ -212,7 +212,7 @@ rom_addr <= rom_addr_out; audio_out <= pia_pa_out(7 downto 0)&pia_pb_out(7 downto 6); pia_pb_in(5 downto 0) <= "00"&input(3 downto 0); -- stat1-stat0, sr3-sr0 pia_ca1_in <= not input(4); -- sirq -pia_pa_in <= (others => '0'); +pia_pa_in <= pia_pa_out; pia_cb1_in <= '0'; -- spare diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/Galaga_MiST.qpf b/Arcade_MiST/Namco Galaga Hardware/Galaga/Galaga.qpf similarity index 97% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/Galaga_MiST.qpf rename to Arcade_MiST/Namco Galaga Hardware/Galaga/Galaga.qpf index c26ff238..93597c69 100644 --- a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/Galaga_MiST.qpf +++ b/Arcade_MiST/Namco Galaga Hardware/Galaga/Galaga.qpf @@ -27,4 +27,4 @@ DATE = "17:44:51 March 04, 2019" # Revisions -PROJECT_REVISION = "Galaga_MiST" +PROJECT_REVISION = "Galaga" diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/Galaga_MiST.qsf b/Arcade_MiST/Namco Galaga Hardware/Galaga/Galaga.qsf similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/Galaga_MiST.qsf rename to Arcade_MiST/Namco Galaga Hardware/Galaga/Galaga.qsf diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/Galaga_MiST.sdc b/Arcade_MiST/Namco Galaga Hardware/Galaga/Galaga.sdc similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/Galaga_MiST.sdc rename to Arcade_MiST/Namco Galaga Hardware/Galaga/Galaga.sdc diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/README.txt b/Arcade_MiST/Namco Galaga Hardware/Galaga/README.txt similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/README.txt rename to Arcade_MiST/Namco Galaga Hardware/Galaga/README.txt diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/clean.bat b/Arcade_MiST/Namco Galaga Hardware/Galaga/clean.bat similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/clean.bat rename to Arcade_MiST/Namco Galaga Hardware/Galaga/clean.bat diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/meta/Galaga (Midway set 1 with fast shoot hack).mra b/Arcade_MiST/Namco Galaga Hardware/Galaga/meta/Galaga (Midway set 1 with fast shoot hack).mra similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/meta/Galaga (Midway set 1 with fast shoot hack).mra rename to Arcade_MiST/Namco Galaga Hardware/Galaga/meta/Galaga (Midway set 1 with fast shoot hack).mra diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/meta/Galaga (Midway, Set 1).mra b/Arcade_MiST/Namco Galaga Hardware/Galaga/meta/Galaga (Midway, Set 1).mra similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/meta/Galaga (Midway, Set 1).mra rename to Arcade_MiST/Namco Galaga Hardware/Galaga/meta/Galaga (Midway, Set 1).mra diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/meta/Galaga (Namco rev. B).mra b/Arcade_MiST/Namco Galaga Hardware/Galaga/meta/Galaga (Namco rev. B).mra similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/meta/Galaga (Namco rev. B).mra rename to Arcade_MiST/Namco Galaga Hardware/Galaga/meta/Galaga (Namco rev. B).mra diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/meta/Galaga (Namco).mra b/Arcade_MiST/Namco Galaga Hardware/Galaga/meta/Galaga (Namco).mra similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/meta/Galaga (Namco).mra rename to Arcade_MiST/Namco Galaga Hardware/Galaga/meta/Galaga (Namco).mra diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/meta/Gatsbee.mra b/Arcade_MiST/Namco Galaga Hardware/Galaga/meta/Gatsbee.mra similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/meta/Gatsbee.mra rename to Arcade_MiST/Namco Galaga Hardware/Galaga/meta/Gatsbee.mra diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/build_id.tcl b/Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/build_id.tcl similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/build_id.tcl rename to Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/build_id.tcl diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/dpram.vhd b/Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/dpram.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/dpram.vhd rename to Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/dpram.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/galaga.vhd b/Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/galaga.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/galaga.vhd rename to Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/galaga.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/galaga_mist.sv b/Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/galaga_mist.sv similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/galaga_mist.sv rename to Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/galaga_mist.sv diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/galaga_video.vhd b/Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/galaga_video.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/galaga_video.vhd rename to Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/galaga_video.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/gen_ram.vhd b/Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/gen_ram.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/gen_ram.vhd rename to Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/gen_ram.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/gen_video.vhd b/Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/gen_video.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/gen_video.vhd rename to Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/gen_video.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/mb88.vhd b/Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/mb88.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/mb88.vhd rename to Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/mb88.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/pll.v b/Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/pll.v similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/pll.v rename to Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/pll.v diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/roms/bg_palette.vhd b/Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/roms/bg_palette.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/roms/bg_palette.vhd rename to Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/roms/bg_palette.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/roms/rgb.vhd b/Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/roms/rgb.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/roms/rgb.vhd rename to Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/roms/rgb.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/roms/sound_samples.vhd b/Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/roms/sound_samples.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/roms/sound_samples.vhd rename to Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/roms/sound_samples.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/roms/sound_seq.vhd b/Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/roms/sound_seq.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/roms/sound_seq.vhd rename to Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/roms/sound_seq.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/roms/sp_palette.vhd b/Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/roms/sp_palette.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/roms/sp_palette.vhd rename to Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/roms/sp_palette.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/sound_lpf.vhd b/Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/sound_lpf.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/sound_lpf.vhd rename to Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/sound_lpf.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/sound_machine.vhd b/Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/sound_machine.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/sound_machine.vhd rename to Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/sound_machine.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/stars.vhd b/Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/stars.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/stars.vhd rename to Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/stars.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/stars_machine.vhd b/Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/stars_machine.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Galaga_MiST/rtl/stars_machine.vhd rename to Arcade_MiST/Namco Galaga Hardware/Galaga/rtl/stars_machine.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/README.txt b/Arcade_MiST/Namco Galaga Hardware/Xevious/README.txt similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/README.txt rename to Arcade_MiST/Namco Galaga Hardware/Xevious/README.txt diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/Xevious_MiST.qpf b/Arcade_MiST/Namco Galaga Hardware/Xevious/Xevious.qpf similarity index 97% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/Xevious_MiST.qpf rename to Arcade_MiST/Namco Galaga Hardware/Xevious/Xevious.qpf index da606c62..d8b178b0 100644 --- a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/Xevious_MiST.qpf +++ b/Arcade_MiST/Namco Galaga Hardware/Xevious/Xevious.qpf @@ -27,4 +27,4 @@ DATE = "17:44:51 March 04, 2019" # Revisions -PROJECT_REVISION = "Xevious_MiST" +PROJECT_REVISION = "Xevious" diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/Xevious_MiST.qsf b/Arcade_MiST/Namco Galaga Hardware/Xevious/Xevious.qsf similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/Xevious_MiST.qsf rename to Arcade_MiST/Namco Galaga Hardware/Xevious/Xevious.qsf diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/Xevious_MiST.sdc b/Arcade_MiST/Namco Galaga Hardware/Xevious/Xevious.sdc similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/Xevious_MiST.sdc rename to Arcade_MiST/Namco Galaga Hardware/Xevious/Xevious.sdc diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/clean.bat b/Arcade_MiST/Namco Galaga Hardware/Xevious/clean.bat similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/clean.bat rename to Arcade_MiST/Namco Galaga Hardware/Xevious/clean.bat diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/meta/Super Xevious.mra b/Arcade_MiST/Namco Galaga Hardware/Xevious/meta/Super Xevious.mra similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/meta/Super Xevious.mra rename to Arcade_MiST/Namco Galaga Hardware/Xevious/meta/Super Xevious.mra diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/meta/Xevious.mra b/Arcade_MiST/Namco Galaga Hardware/Xevious/meta/Xevious.mra similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/meta/Xevious.mra rename to Arcade_MiST/Namco Galaga Hardware/Xevious/meta/Xevious.mra diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/build_id.tcl b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/build_id.tcl similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/build_id.tcl rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/build_id.tcl diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/dpram.vhd b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/dpram.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/dpram.vhd rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/dpram.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/gen_ram.vhd b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/gen_ram.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/gen_ram.vhd rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/gen_ram.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/gen_video.vhd b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/gen_video.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/gen_video.vhd rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/gen_video.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/mb88.vhd b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/mb88.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/mb88.vhd rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/mb88.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/pll.v b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/pll.v similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/pll.v rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/pll.v diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/bg_palette_lsb.vhd b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/bg_palette_lsb.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/bg_palette_lsb.vhd rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/bg_palette_lsb.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/bg_palette_msb.vhd b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/bg_palette_msb.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/bg_palette_msb.vhd rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/bg_palette_msb.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/blue.vhd b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/blue.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/blue.vhd rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/blue.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/cs50xx_prog.vhd b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/cs50xx_prog.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/cs50xx_prog.vhd rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/cs50xx_prog.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/cs51xx_prog.vhd b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/cs51xx_prog.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/cs51xx_prog.vhd rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/cs51xx_prog.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/cs54xx_prog.vhd b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/cs54xx_prog.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/cs54xx_prog.vhd rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/cs54xx_prog.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/green.vhd b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/green.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/green.vhd rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/green.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/red.vhd b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/red.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/red.vhd rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/red.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/sound_samples.vhd b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/sound_samples.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/sound_samples.vhd rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/sound_samples.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/sound_seq.vhd b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/sound_seq.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/sound_seq.vhd rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/sound_seq.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/sp_palette_lsb.vhd b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/sp_palette_lsb.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/sp_palette_lsb.vhd rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/sp_palette_lsb.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/sp_palette_msb.vhd b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/sp_palette_msb.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/roms/sp_palette_msb.vhd rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/roms/sp_palette_msb.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/sdram.sv b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/sdram.sv similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/sdram.sv rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/sdram.sv diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/sound_machine.vhd b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/sound_machine.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/sound_machine.vhd rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/sound_machine.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/xevious.vhd b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/xevious.vhd similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/xevious.vhd rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/xevious.vhd diff --git a/Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/xevious_mist.sv b/Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/xevious_mist.sv similarity index 100% rename from Arcade_MiST/Namco Galaga Hardware/Xevious_MiST/rtl/xevious_mist.sv rename to Arcade_MiST/Namco Galaga Hardware/Xevious/rtl/xevious_mist.sv diff --git a/Arcade_MiST/Phoenix Hardware/phoenix_mist.qpf b/Arcade_MiST/Phoenix Hardware/phoenix.qpf similarity index 97% rename from Arcade_MiST/Phoenix Hardware/phoenix_mist.qpf rename to Arcade_MiST/Phoenix Hardware/phoenix.qpf index 2b8ba3ed..396cb6d9 100644 --- a/Arcade_MiST/Phoenix Hardware/phoenix_mist.qpf +++ b/Arcade_MiST/Phoenix Hardware/phoenix.qpf @@ -27,4 +27,4 @@ DATE = "02:40:30 January 25, 2017" # Revisions -PROJECT_REVISION = "phoenix_mist" \ No newline at end of file +PROJECT_REVISION = "phoenix" \ No newline at end of file diff --git a/Arcade_MiST/Phoenix Hardware/phoenix_mist.qsf b/Arcade_MiST/Phoenix Hardware/phoenix.qsf similarity index 100% rename from Arcade_MiST/Phoenix Hardware/phoenix_mist.qsf rename to Arcade_MiST/Phoenix Hardware/phoenix.qsf diff --git a/Arcade_MiST/Phoenix Hardware/phoenix_mist.sdc b/Arcade_MiST/Phoenix Hardware/phoenix.sdc similarity index 100% rename from Arcade_MiST/Phoenix Hardware/phoenix_mist.sdc rename to Arcade_MiST/Phoenix Hardware/phoenix.sdc diff --git a/Arcade_MiST/UPL Nova2001_Hardware/NinjaKun_MiST.qpf b/Arcade_MiST/UPL Nova2001_Hardware/NinjaKun.qpf similarity index 97% rename from Arcade_MiST/UPL Nova2001_Hardware/NinjaKun_MiST.qpf rename to Arcade_MiST/UPL Nova2001_Hardware/NinjaKun.qpf index 2c69d2f2..4fda2555 100644 --- a/Arcade_MiST/UPL Nova2001_Hardware/NinjaKun_MiST.qpf +++ b/Arcade_MiST/UPL Nova2001_Hardware/NinjaKun.qpf @@ -27,4 +27,4 @@ DATE = "20:17:38 December 19, 2019" # Revisions -PROJECT_REVISION = "NinjaKun_MiST" \ No newline at end of file +PROJECT_REVISION = "NinjaKun" \ No newline at end of file diff --git a/Arcade_MiST/UPL Nova2001_Hardware/NinjaKun_MiST.qsf b/Arcade_MiST/UPL Nova2001_Hardware/NinjaKun.qsf similarity index 100% rename from Arcade_MiST/UPL Nova2001_Hardware/NinjaKun_MiST.qsf rename to Arcade_MiST/UPL Nova2001_Hardware/NinjaKun.qsf diff --git a/Arcade_MiST/UPL Nova2001_Hardware/NinjaKun_MiST.sdc b/Arcade_MiST/UPL Nova2001_Hardware/NinjaKun.sdc similarity index 100% rename from Arcade_MiST/UPL Nova2001_Hardware/NinjaKun_MiST.sdc rename to Arcade_MiST/UPL Nova2001_Hardware/NinjaKun.sdc diff --git a/Arcade_MiST/Williams 6809 rev.2 Hardware/rtl/williams2.vhd b/Arcade_MiST/Williams 6809 rev.2 Hardware/rtl/williams2.vhd index 9e2dff46..735e05b1 100644 --- a/Arcade_MiST/Williams 6809 rev.2 Hardware/rtl/williams2.vhd +++ b/Arcade_MiST/Williams 6809 rev.2 Hardware/rtl/williams2.vhd @@ -294,8 +294,8 @@ architecture struct of williams2 is signal audio : std_logic_vector( 7 downto 0); signal pia_audio : std_logic_vector( 7 downto 0); signal speech_out : std_logic_vector(15 downto 0); - signal fm_left : unsigned(15 downto 0); - signal fm_right : unsigned(15 downto 0); + signal fm_left : signed(15 downto 0); + signal fm_right : signed(15 downto 0); signal ic79_a : std_logic_vector(3 downto 0); signal ic79_b : std_logic_vector(3 downto 0); @@ -1197,7 +1197,7 @@ port map( snd_rom_do => snd2_rom_do ); -audio_left <= "00000000000000000" + unsigned(audio&"00000") + unsigned(pia_audio&"00000") + unsigned(speech_out(15 downto 1)) + fm_left; -audio_right <= "00000000000000000" + unsigned(audio&"00000") + unsigned(pia_audio&"00000") + unsigned(speech_out(15 downto 1)) + fm_right; +audio_left <= "00000000000000000" + unsigned(audio&"00000") + unsigned(pia_audio&"00000") + unsigned(speech_out(15 downto 1)) + unsigned(not fm_left(15)&fm_left(14 downto 0)); +audio_right <= "00000000000000000" + unsigned(audio&"00000") + unsigned(pia_audio&"00000") + unsigned(speech_out(15 downto 1)) + unsigned(not fm_right(15)&fm_right(14 downto 0)); end struct; \ No newline at end of file diff --git a/Arcade_MiST/Williams 6809 rev.2 Hardware/rtl/williams_cvsd_board.vhd b/Arcade_MiST/Williams 6809 rev.2 Hardware/rtl/williams_cvsd_board.vhd index 9928ae0d..1bb3be18 100644 --- a/Arcade_MiST/Williams 6809 rev.2 Hardware/rtl/williams_cvsd_board.vhd +++ b/Arcade_MiST/Williams 6809 rev.2 Hardware/rtl/williams_cvsd_board.vhd @@ -58,8 +58,8 @@ port( pia_audio : out std_logic_vector( 7 downto 0); speech_out : out std_logic_vector(15 downto 0); - ym2151_left : out unsigned (15 downto 0); - ym2151_right : out unsigned (15 downto 0); + ym2151_left : out signed (15 downto 0); + ym2151_right : out signed (15 downto 0); snd_rom_addr : buffer std_logic_vector(16 downto 0); snd_rom_do : in std_logic_vector( 7 downto 0); @@ -94,10 +94,7 @@ port ( right : out signed (15 downto 0); -- Full resolution output xleft : out signed (15 downto 0); - xright : out signed (15 downto 0); - -- unsigned outputs for sigma delta converters, full resolution - dacleft : out unsigned (15 downto 0); - dacright : out unsigned (15 downto 0) + xright : out signed (15 downto 0) ); end component jt51; @@ -172,7 +169,8 @@ end component mc6809is; -- signal pia_pa_o : std_logic_vector( 7 downto 0); signal pia_irqa : std_logic; signal pia_irqb : std_logic; - + signal pia_a_o : std_logic_vector( 7 downto 0); + signal ym2151_irq_n : std_logic := '0'; signal ym2151_cs_n : std_logic; signal ym2151_do : std_logic_vector( 7 downto 0); @@ -404,8 +402,8 @@ port map data_out => pia_do, irqa => pia_irqa, -- active high irqb => pia_irqb, -- active high - pa_i => x"00", - pa_o => pia_audio, + pa_i => pia_a_o, + pa_o => pia_a_o, pa_oe => open, ca1 => ym2151_irq_n, ca2_i => '0', @@ -420,6 +418,8 @@ port map cb2_oe => open ); +pia_audio <= pia_a_o; + -- CVSD speech decoder cvsd : entity work.HC55564 port map( @@ -485,11 +485,8 @@ port map ( left => open, right => open, -- Full resolution output - xleft => open, - xright => open, - -- unsigned outputs for sigma delta converters, full resolution - dacleft => ym2151_left, - dacright => ym2151_right + xleft => ym2151_left, + xright => ym2151_right ); end struct; diff --git a/common/Sound/jt51/LICENSE b/common/Sound/jt51/LICENSE new file mode 100644 index 00000000..9cecc1d4 --- /dev/null +++ b/common/Sound/jt51/LICENSE @@ -0,0 +1,674 @@ + GNU GENERAL PUBLIC LICENSE + Version 3, 29 June 2007 + + Copyright (C) 2007 Free Software Foundation, Inc. + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The GNU General Public License is a free, copyleft license for +software and other kinds of works. + + The licenses for most software and other practical works are designed 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It is safest +to attach them to the start of each source file to most effectively +state the exclusion of warranty; and each file should have at least +the "copyright" line and a pointer to where the full notice is found. + + {one line to give the program's name and a brief idea of what it does.} + Copyright (C) {year} {name of author} + + This program is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + +Also add information on how to contact you by electronic and paper mail. + + If the program does terminal interaction, make it output a short +notice like this when it starts in an interactive mode: + + {project} Copyright (C) {year} {fullname} + This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, your program's commands +might be different; for a GUI interface, you would use an "about box". + + You should also get your employer (if you work as a programmer) or school, +if any, to sign a "copyright disclaimer" for the program, if necessary. +For more information on this, and how to apply and follow the GNU GPL, see +. + + The GNU General Public License does not permit incorporating your program +into proprietary programs. If your program is a subroutine library, you +may consider it more useful to permit linking proprietary applications with +the library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. But first, please read +. diff --git a/common/Sound/jt51/README.md b/common/Sound/jt51/README.md new file mode 100644 index 00000000..4b12e51c --- /dev/null +++ b/common/Sound/jt51/README.md @@ -0,0 +1,67 @@ +# JT51 +YM2151 clone in verilog. FPGA proven. +(c) Jose Tejada 2016. Twitter: @topapate + +You can show your appreciation through +* [Patreon](https://patreon.com/jotego), by supporting releases +* [Paypal](https://paypal.me/topapate), with a donation + +Originally posted in opencores. The Github repository is now the main one. + +## Using JT51 in a git project + +If you are using JT51 in a git project, the best way to add it to your project is: + +1. Optionally fork JT51's repository to your own GitHub account +2. Add it as a submodule to your git project: `git submodule add https://github.com/jotego/jt51.git` +3. Now you can refer to the RTL files in **jt51/hdl** + +The advantages of a using a git submodule are: + +1. Your project contains a reference to a commit of the JT51 repository +2. As long as you do not manually update the JT51 submodule, it will keep pointing to the same commit +3. Each time you make a commit in your project, it will include a pointer to the JT51 commit used. So you will always know the JT51 that worked for you +4. If JT51 is updated and you want to get the changes, simply update the submodule using git. The new JT51 commit used will be annotated in your project's next commit. So the history of your project will reflect that change too. +5. JT51 files will be intact and you will use the files without altering them. + +## Folders + +* **jt51/doc** contains documentation related to JT51 and YM2151 +* **jt51/hdl** contains all the Verilog source code to implement JT51 on FPGA or ASIC +* **jt51/hdl/filter** contains an interpolator to use as first stage to on-chip sigma-delta DACs +* **jt51/syn** contains some use case examples. It has synthesizable projects in various platforms +* **jt51/syn/xilinx/contra** sound board of the arcade Contra. Checkout **hdl** subfolder for the verilog files + +## Usage +All files are in **jt51/hdl**. The top level file is jt51.v. You need all files in the **jt51/hdl** folder to synthesize or simulate the design. + +Alternatively you can just use the file jt51_v1.1.v at the release folder. It contains all the necessary files concatenated inside. It is generated by the script in bin/jt51_singlefile.sh + +Simulation modules are added if macros + - SIMULATION + - JT51_DEBUG +are defined + +Use macro JT51_ONLYTIMERS in order to avoid simulating the FM signal chain but keep the timer modules working. This is useful if a CPU depends on the timer interrupts but you do not want to simulate the full FM sound (to speed up sims). + +## Related Projects + +Other sound chips from the same author + +Chip | Repository +-----------------------|------------ +YM2203, YM2612, YM2610 | [JT12](https://github.com/jotego/jt12) +YM2151 | [JT51](https://github.com/jotego/jt51) +YM3526 | [JTOPL](https://github.com/jotego/jtopl) +YM2149 | [JT49](https://github.com/jotego/jt49) +sn76489an | [JT89](https://github.com/jotego/jt89) +OKI 6295 | [JT6295](https://github.com/jotego/jt6295) +OKI MSM5205 | [JT5205](https://github.com/jotego/jt5205) + +This sound core has been used at least in the following arcade cores for FPGA + +* [JTCPS1](https://github.com/jotego/jtcps1): CAPCOM SYSTEM arcade clone +* [JTDD](https://github.com/jotego/jtdd): Double Dragon 1 & 2 arcade clone +* [JTGNG](https://github.com/jotego/jt_gng): arcade clones of pre-CPS CAPCOM games. Some use YM2151 through JT51 + +More to come soon! diff --git a/common/Sound/jt51/jt51.qip b/common/Sound/jt51/jt51.qip index 30784c19..53387d7a 100644 --- a/common/Sound/jt51/jt51.qip +++ b/common/Sound/jt51/jt51.qip @@ -1,23 +1,22 @@ -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_acc.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_csr_ch.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_csr_op.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_eg.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_exp2lin.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_exprom.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_kon.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_lfo.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_lfo_lfsr.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_lin2exp.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_mmr.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_mod.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_noise.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_noise_lfsr.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_op.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_pg.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_phinc_rom.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_phrom.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_pm.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_reg.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_sh.v] -set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_timers.v] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_acc.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_eg.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_exp2lin.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_exprom.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_kon.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_lfo.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_lin2exp.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_mmr.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_mod.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_noise_lfsr.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_noise.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_op.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_pg.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_phinc_rom.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_phrom.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_pm.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_reg.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_sh.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_timers.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_csr_ch.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51_csr_op.v ] +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) jt51.v ] diff --git a/common/Sound/jt51/jt51.v b/common/Sound/jt51/jt51.v index c243bed3..0c3ccb8a 100644 --- a/common/Sound/jt51/jt51.v +++ b/common/Sound/jt51/jt51.v @@ -12,19 +12,18 @@ You should have received a copy of the GNU General Public License along with JT51. If not, see . - + Author: Jose Tejada Gomez. Twitter: @topapate Version: 1.0 Date: 27-10-2016 */ -`timescale 1ns / 1ps module jt51( input rst, // reset input clk, // main clock - input cen, // clock enable - input cen_p1, // clock enable at half the speed + (* direct_enable *) input cen, // clock enable + (* direct_enable *) input cen_p1, // clock enable at half the speed input cs_n, // chip select input wr_n, // write input a0, @@ -40,15 +39,9 @@ module jt51( output signed [15:0] right, // Full resolution output output signed [15:0] xleft, - output signed [15:0] xright, - // unsigned outputs for sigma delta converters, full resolution - output [15:0] dacleft, - output [15:0] dacright + output signed [15:0] xright ); -assign dacleft = { ~xleft [15], xleft[14:0] }; -assign dacright = { ~xright[15], xright[14:0] }; - // Timers wire [9:0] value_A; wire [7:0] value_B; @@ -56,9 +49,10 @@ wire load_A, load_B; wire enable_irq_A, enable_irq_B; wire clr_flag_A, clr_flag_B; wire flag_A, flag_B, overflow_A; -wire zero; +wire zero, half; +wire [4:0] cycles; -jt51_timers u_timers( +jt51_timers u_timers( .clk ( clk ), .cen ( cen_p1 ), .rst ( rst ), @@ -77,7 +71,7 @@ jt51_timers u_timers( .irq_n ( irq_n ) ); -/*verilator tracing_off*/ +/*verilator tracing_on*/ `ifndef JT51_ONLYTIMERS `define YM_TIMER_CTRL 8'h14 @@ -102,37 +96,51 @@ wire [3:0] d1l_I; wire [3:0] rrate_II; wire [1:0] cur_op; -assign sample =zero; wire keyon_II; wire [7:0] lfo_freq; wire [1:0] lfo_w; -wire lfo_rst; -wire [6:0] am; +wire lfo_up; +wire [7:0] am; wire [7:0] pm; wire [6:0] amd, pmd; +wire [7:0] test_mode; +wire noise; wire m1_enters, m2_enters, c1_enters, c2_enters; wire use_prevprev1,use_internal_x,use_internal_y, use_prev2,use_prev1; +assign sample = zero & cen_p1; // single strobe + jt51_lfo u_lfo( .rst ( rst ), .clk ( clk ), - .cen ( cen ), // should it be cen_p1? - .zero ( zero ), - .lfo_rst ( lfo_rst ), + .cen ( cen_p1 ), + .cycles ( cycles ), + + // Configuration .lfo_freq ( lfo_freq ), .lfo_w ( lfo_w ), .lfo_amd ( amd ), .lfo_pmd ( pmd ), + .lfo_up ( lfo_up ), + .noise ( noise ), + + // Test + .test ( test_mode ), + .lfo_clk ( ), + .am ( am ), - .pm_u ( pm ) + .pm ( pm ) ); wire [ 4:0] keycode_III; wire [ 9:0] ph_X; wire pg_rst_III; +/*verilator tracing_on*/ + + jt51_pg u_pg( .rst ( rst ), .clk ( clk ), // P1 @@ -163,7 +171,7 @@ wire [9:0] eg_XI; jt51_eg u_eg( `ifdef TEST_SUPPORT .test_eg ( test_eg ), - `endif + `endif .rst ( rst ), .clk ( clk ), .cen ( cen_p1 ), @@ -187,12 +195,13 @@ jt51_eg u_eg( .eg_XI ( eg_XI ) ); +/*verilator tracing_off*/ wire signed [13:0] op_out; jt51_op u_op( `ifdef TEST_SUPPORT .test_eg ( test_eg ), - .test_op0 ( test_op0 ), + .test_op0 ( test_op0 ), `endif .rst ( rst ), .clk ( clk ), @@ -210,7 +219,7 @@ jt51_op u_op( .use_internal_x ( use_internal_x ), .use_internal_y ( use_internal_y ), .use_prev2 ( use_prev2 ), - .use_prev1 ( use_prev1 ), + .use_prev1 ( use_prev1 ), .test_214 ( 1'b0 ), `ifdef SIMULATION .zero ( zero ), @@ -219,18 +228,20 @@ jt51_op u_op( .op_XVII ( op_out ) ); -wire [4:0] nfrq; -wire [10:0] noise_out; -wire ne, op31_acc, op31_no; +wire [ 4:0] nfrq; +wire [11:0] noise_mix; +wire ne, op31_acc, op31_no; jt51_noise u_noise( .rst ( rst ), .clk ( clk ), .cen ( cen_p1 ), - .nfrq ( nfrq ), + .cycles ( cycles ), + .nfrq ( nfrq ), .eg ( eg_XI ), - .out ( noise_out ), - .op31_no( op31_no ) + .op31_no( op31_no ), + .out ( noise ), + .mix ( noise_mix ) ); jt51_acc u_acc( @@ -246,7 +257,7 @@ jt51_acc u_acc( .con_I ( con_I ), .op_out ( op_out ), .ne ( ne ), - .noise ( noise_out ), + .noise_mix ( noise_mix ), .left ( left ), .right ( right ), .xleft ( xleft ), @@ -275,20 +286,21 @@ jt51_mmr u_mmr( .din ( din ), .busy ( busy ), + .test_mode ( test_mode ), // CT - .ct1 ( ct1 ), + .ct1 ( ct1 ), // the LFO clock can be outputted via CT1 -not implemented- .ct2 ( ct2 ), // LFO .lfo_freq ( lfo_freq ), .lfo_w ( lfo_w ), .lfo_amd ( amd ), .lfo_pmd ( pmd ), - .lfo_rst ( lfo_rst ), - + .lfo_up ( lfo_up ), + // Noise .ne ( ne ), .nfrq ( nfrq ), - + // Timers .value_A ( value_A ), .value_B ( value_B ), @@ -297,9 +309,9 @@ jt51_mmr u_mmr( .enable_irq_A( enable_irq_A ), .enable_irq_B( enable_irq_B ), .clr_flag_A ( clr_flag_A ), - .clr_flag_B ( clr_flag_B ), + .clr_flag_B ( clr_flag_B ), .overflow_A ( overflow_A ), - `ifdef TEST_SUPPORT + `ifdef TEST_SUPPORT // Test .test_eg ( test_eg ), .test_op0 ( test_op0 ), @@ -329,6 +341,8 @@ jt51_mmr u_mmr( .op31_no ( op31_no ), .op31_acc ( op31_acc ), .zero ( zero ), + .half ( half ), + .cycles ( cycles ), .m1_enters ( m1_enters ), .m2_enters ( m2_enters ), .c1_enters ( c1_enters ), diff --git a/common/Sound/jt51/jt51_acc.v b/common/Sound/jt51/jt51_acc.v index c13db293..3b601d4f 100644 --- a/common/Sound/jt51/jt51_acc.v +++ b/common/Sound/jt51/jt51_acc.v @@ -12,13 +12,12 @@ You should have received a copy of the GNU General Public License along with JT51. If not, see . - + Author: Jose Tejada Gomez. Twitter: @topapate Version: 1.1 Date: 14- 4-2017 Version: 1.0 Date: 27-10-2016 */ -`timescale 1ns / 1ps module jt51_acc( input rst, @@ -33,18 +32,18 @@ module jt51_acc( input [2:0] con_I, input signed [13:0] op_out, input ne, // noise enable - input signed [10:0] noise, + input signed [11:0] noise_mix, output signed [15:0] left, output signed [15:0] right, output reg signed [15:0] xleft, // exact outputs - output reg signed [15:0] xright + output reg signed [15:0] xright ); reg signed [13:0] op_val; always @(*) begin if( ne && op31_acc ) // cambiar a OP 31 - op_val = { {2{noise[10]}}, noise, 1'd0 }; + op_val = { {2{noise_mix[11]}}, noise_mix }; else op_val = op_out; end @@ -55,7 +54,7 @@ always @(*) begin case ( con_I ) 3'd0,3'd1,3'd2,3'd3: sum_en = m2_enters; 3'd4: sum_en = m1_enters | m2_enters; - 3'd5,3'd6: sum_en = ~c1_enters; + 3'd5,3'd6: sum_en = ~c1_enters; 3'd7: sum_en = 1'b1; default: sum_en = 1'bx; endcase @@ -76,7 +75,7 @@ wire rst_sum = c2_enters; function signed [15:0] lim16; input signed [16:0] din; - lim16 = !din[16] && din[15] ? 16'h7fff : + lim16 = !din[16] && din[15] ? 16'h7fff : ( din[16] && !din[15] ? 16'h8000 : din[15:0] ); endfunction @@ -104,7 +103,7 @@ always @(posedge clk) begin end end end - + reg signed [15:0] opsum; wire signed [16:0] opsum10 = {{3{op_val[13]}},op_val}+{total[15],total}; diff --git a/common/Sound/jt51/jt51_eg.v b/common/Sound/jt51/jt51_eg.v index e7920d13..a77b9d85 100644 --- a/common/Sound/jt51/jt51_eg.v +++ b/common/Sound/jt51/jt51_eg.v @@ -18,7 +18,6 @@ Date: 27-10-2016 */ -`timescale 1ns / 1ps module jt51_eg( `ifdef TEST_SUPPORT @@ -41,7 +40,7 @@ module jt51_eg( output reg pg_rst_III, // envelope number input [6:0] tl_VII, - input [6:0] am, + input [7:0] am, input [1:0] ams_VII, input amsen_VII, output [9:0] eg_XI @@ -56,12 +55,12 @@ localparam ATTACK=2'd0, DECAY2=2'd2, RELEASE=2'd3; -reg [4:0] d1level_II; -reg [2:0] cnt_V; -reg [5:0] rate_IV; -wire [9:0] eg_VI; -reg [9:0] eg_VII, eg_VIII; -wire [9:0] eg_II; +reg [ 4:0] d1level_II; +reg [ 2:0] cnt_V; +reg [ 5:0] rate_IV; +wire [ 9:0] eg_VI; +reg [ 9:0] eg_VII, eg_VIII; +wire [ 9:0] eg_II; reg [11:0] sum_eg_tl_VII; reg step_V, step_VI; @@ -71,10 +70,10 @@ reg [5:1] rate_VI; // remember: { log_msb, pow_addr } <= log_val[11:0] + { tl, 5'd0 } + { eg, 2'd0 }; -reg [1:0] eg_cnt_base; +reg [ 1:0] eg_cnt_base; reg [14:0] eg_cnt /*verilator public*/; -reg [8:0] am_final_VII; +reg [ 9:0] am_final_VII; always @(posedge clk) begin : envelope_counter if( rst ) begin @@ -97,18 +96,12 @@ end wire cnt_out; // = all_cnt_last[3*31-1:3*30]; reg [6:0] pre_rate_III; +reg [4:0] kshift_III; reg [4:0] cfg_III; always @(*) begin : pre_rate_calc - if( cfg_III == 5'd0 ) - pre_rate_III = 7'd0; - else - case( ks_III ) - 2'd3: pre_rate_III = { 1'b0, cfg_III, 1'b0 } + { 2'b0, keycode_III }; - 2'd2: pre_rate_III = { 1'b0, cfg_III, 1'b0 } + { 3'b0, keycode_III[4:1] }; - 2'd1: pre_rate_III = { 1'b0, cfg_III, 1'b0 } + { 4'b0, keycode_III[4:2] }; - 2'd0: pre_rate_III = { 1'b0, cfg_III, 1'b0 } + { 5'b0, keycode_III[4:3] }; - endcase + kshift_III = keycode_III >> ~ks_III; + pre_rate_III = { 1'b0, cfg_III, 1'b0 } + { 2'b0, kshift_III }; end @@ -140,7 +133,7 @@ always @(*) begin : rate_step endcase end // a rate_IV of zero keeps the level still - step_V = rate_V[5:1]==5'd0 ? 1'b0 : step_idx[ cnt_V ]; + step_V = rate_V[5:2]==4'd0 ? 1'b0 : step_idx[ cnt_V ]; end @@ -313,23 +306,24 @@ end // VII always @(*) begin : sum_eg_and_tl casez( {amsen_VII, ams_VII } ) - 3'b0??,3'b100: am_final_VII = 9'd0; - 3'b101: am_final_VII = { 2'b00, am }; - 3'b110: am_final_VII = { 1'b0, am, 1'b0}; - 3'b111: am_final_VII = { am, 2'b0 }; + 3'b0_??, + 3'b1_00: am_final_VII = 10'd0; + 3'b1_01: am_final_VII = { 2'b0, am }; // 23.9 dB max + 3'b1_10: am_final_VII = { 1'b0, am, 1'b0 }; // 47 dB + 3'b1_11: am_final_VII = { am, 2'b0 }; // 95.6 dB endcase `ifdef TEST_SUPPORT if( test_eg && tl_VII!=7'd0 ) sum_eg_tl_VII = 12'd0; else `endif - sum_eg_tl_VII = { 2'b0, tl_VII, 3'd0 } - + {2'b0, eg_VII} - + {2'b0, am_final_VII, 1'b0 }; + sum_eg_tl_VII = { 2'b0, tl_VII, 3'd0 } // 0.75 dB steps + + { 2'b0, eg_VII } // 0.094 dB steps + + { 2'b0, am_final_VII }; end always @(posedge clk) if(cen) begin - eg_VIII <= sum_eg_tl_VII[11:10] > 2'b0 ? {10{1'b1}} : sum_eg_tl_VII[9:0]; + eg_VIII <= |sum_eg_tl_VII[11:10] ? {10{1'b1}} : sum_eg_tl_VII[9:0]; end jt51_sh #( .width(10), .stages(3) ) u_egpadding ( @@ -391,7 +385,7 @@ jt51_sh #( .width(2), .stages(32-3+2), .rstval(1'b1) ) u_statesh( .drop ( state_II ) ); -`ifndef JT51_NODEBUG +`ifdef JT51_DEBUG `ifdef SIMULATION /* verilator lint_off PINMISSING */ wire [4:0] cnt; @@ -412,10 +406,10 @@ sep32 #(.width(7),.stg(7)) sep_tl( .cnt ( cnt ) ); -sep32 #(.width(2),.stg(2)) sep_state( +sep32 #(.width(2),.stg(3)) sep_state( .clk ( clk ), .cen ( cen ), - .mixed ( state_II ), + .mixed ( state_in_III ), .cnt ( cnt ) ); @@ -425,13 +419,20 @@ sep32 #(.width(5),.stg(6)) sep_rate( .cnt ( cnt ) ); -sep32 #(.width(9),.stg(7)) sep_amfinal( +sep32 #(.width(10),.stg(7)) sep_amfinal( .clk ( clk ), .cen ( cen ), .mixed ( am_final_VII ), .cnt ( cnt ) ); +sep32 #(.width(5),.stg(3)) sep_kcfinal( + .clk ( clk ), + .cen ( cen ), + .mixed ( keycode_III ), + .cnt ( cnt ) + ); + /* verilator lint_on PINMISSING */ `endif `endif diff --git a/common/Sound/jt51/jt51_exp2lin.v b/common/Sound/jt51/jt51_exp2lin.v index 4a5ea5ac..39f559dd 100644 --- a/common/Sound/jt51/jt51_exp2lin.v +++ b/common/Sound/jt51/jt51_exp2lin.v @@ -18,7 +18,6 @@ Date: 27-10-2016 */ -`timescale 1ns / 1ps module jt51_exp2lin( output reg signed [15:0] lin, diff --git a/common/Sound/jt51/jt51_exprom.v b/common/Sound/jt51/jt51_exprom.v index 610c44cd..1990339b 100644 --- a/common/Sound/jt51/jt51_exprom.v +++ b/common/Sound/jt51/jt51_exprom.v @@ -1,4 +1,3 @@ -`timescale 1ns / 1ps /* This file is part of JT51. diff --git a/common/Sound/jt51/jt51_kon.v b/common/Sound/jt51/jt51_kon.v index 0197922a..b9865d27 100644 --- a/common/Sound/jt51/jt51_kon.v +++ b/common/Sound/jt51/jt51_kon.v @@ -1,4 +1,3 @@ -`timescale 1ns / 1ps /* This file is part of JT51. diff --git a/common/Sound/jt51/jt51_lfo.v b/common/Sound/jt51/jt51_lfo.v index 12bef7d6..7fb8b1e3 100644 --- a/common/Sound/jt51/jt51_lfo.v +++ b/common/Sound/jt51/jt51_lfo.v @@ -12,260 +12,223 @@ You should have received a copy of the GNU General Public License along with JT51. If not, see . - + Author: Jose Tejada Gomez. Twitter: @topapate Version: 1.0 Date: 27-10-2016 */ -`timescale 1ns / 1ps - -/* - - tab size 4 - -*/ - module jt51_lfo( input rst, input clk, input cen, - input zero, - input lfo_rst, + input [4:0] cycles, + + // configuration input [7:0] lfo_freq, input [6:0] lfo_amd, - input [6:0] lfo_pmd, + input [6:0] lfo_pmd, input [1:0] lfo_w, - output reg [6:0] am, - output reg [7:0] pm_u + input lfo_up, + input noise, + + // test + input [7:0] test, + output reg lfo_clk, + + // data + output reg [7:0] am, + output reg [7:0] pm ); -reg signed [7:0] pm; +localparam [1:0] SAWTOOTH = 2'd0, + SQUARE = 2'd1, + TRIANG = 2'd2, + NOISE = 2'd3; -always @(*) begin: signed_to_unsigned - if( pm[7] ) begin - pm_u[7] = pm[7]; - pm_u[6:0] = ~pm[6:0]; - end - else pm_u = pm; -end +reg [14:0] lfo_lut[0:15]; -wire [6:0] noise_am; -wire [7:0] noise_pm; +// counters +reg [ 3:0] cnt1, cnt3, bitcnt; +reg [14:0] cnt2; +reg [15:0] next_cnt2; +reg [ 1:0] cnt1_ov, cnt2_ov; -parameter b0=3; -reg [15+b0:0] base; +// LFO state (value) +reg [15:0] val, // counts next integrator step + out2; // integrator for PM/AM +reg [ 6:0] out1; +wire pm_sign; +reg trig_sign, saw_sign; -always @(posedge clk) begin : base_counter - if( rst ) begin - base <= {b0+16{1'b0}}; - end - else if(cen) begin - if( zero ) base <= base + 1'b1; - end -end +reg bitcnt_rst, cnt2_load, cnt3_step; +wire lfo_clk_next; +reg lfo_clk_latch; -reg sel_base; -reg [4:0] freq_sel; +wire cyc_5 = cycles[3:0]==4'h5; +wire cyc_6 = cycles[3:0]==4'h6; +wire cyc_c = cycles[3:0]==4'hc; // 12 +wire cyc_d = cycles[3:0]==4'hd; // 13 +wire cyc_e = cycles[3:0]==4'he; // 14 +wire cyc_f = cycles[3:0]==4'hf; // 15 -always @(*) begin : base_mux - freq_sel = {1'b0,lfo_freq[7:4]} - + ( lfo_w==2'd2 ? 5'b1 : 5'b0 ); - case( freq_sel ) - 5'h10: sel_base = base[b0-1]; - 5'hf: sel_base = base[b0+0]; - 5'he: sel_base = base[b0+1]; - 5'hd: sel_base = base[b0+2]; - 5'hc: sel_base = base[b0+3]; - 5'hb: sel_base = base[b0+4]; - 5'ha: sel_base = base[b0+5]; - 5'h9: sel_base = base[b0+6]; - 5'h8: sel_base = base[b0+7]; - 5'h7: sel_base = base[b0+8]; - 5'h6: sel_base = base[b0+9]; - 5'h5: sel_base = base[b0+10]; - 5'h4: sel_base = base[b0+11]; - 5'h3: sel_base = base[b0+12]; - 5'h2: sel_base = base[b0+13]; - 5'h1: sel_base = base[b0+14]; - 5'h0: sel_base = base[b0+15]; - default: sel_base = base[b0-1]; - endcase -end +reg cnt3_clk; +wire ampm_sel = bitcnt[3]; +wire bit7 = &bitcnt[2:0]; -reg [7:0] cnt, cnt_lim; +reg lfo_up_latch; -reg signed [10:0] am_bresenham; -reg signed [ 9:0] pm_bresenham; +assign pm_sign = lfo_w==TRIANG ? trig_sign : saw_sign; +assign lfo_clk_next = test[2] | next_cnt2[15] | cnt3_step; -always @(*) begin : counter_limit - case( lfo_freq[3:0] ) - 4'hf: cnt_lim = 8'd66; - 4'he: cnt_lim = 8'd68; - 4'hd: cnt_lim = 8'd70; - 4'hc: cnt_lim = 8'd73; - 4'hb: cnt_lim = 8'd76; - 4'ha: cnt_lim = 8'd79; - 4'h9: cnt_lim = 8'd82; - 4'h8: cnt_lim = 8'd85; - 4'h7: cnt_lim = 8'd89; - 4'h6: cnt_lim = 8'd93; - 4'h5: cnt_lim = 8'd98; - 4'h4: cnt_lim = 8'd102; - 4'h3: cnt_lim = 8'd108; - 4'h2: cnt_lim = 8'd114; - 4'h1: cnt_lim = 8'd120; - 4'h0: cnt_lim = 8'd128; - endcase -end - -wire signed [7:0] pmd_min = (~{1'b0, lfo_pmd[6:0]})+8'b1; - -reg lfo_clk, last_base, am_up, pm_up; - -always @(posedge clk, posedge rst) - if( rst ) begin - last_base <= 1'd0; - lfo_clk <= 1'b0; - cnt <= 8'd0; - am <= 7'd0; - pm <= 8'd0; - am_up <= 1'b1; - pm_up <= 1'b1; - am_bresenham <= 11'd0; - pm_bresenham <= 10'd0; +always @(*) begin + if( cnt2_load ) begin + next_cnt2 = {1'b0, lfo_lut[ lfo_freq[7:4] ] }; end else begin - if( lfo_rst ) begin // synchronous reset - last_base <= 1'd0; - lfo_clk <= 1'b0; - cnt <= 8'd0; - am <= 7'd0; - pm <= 8'd0; - am_up <= 1'b1; - pm_up <= 1'b1; - am_bresenham <= 11'd0; - pm_bresenham <= 10'd0; - end else if ( cen ) begin - last_base <= sel_base; - if( last_base != sel_base ) begin - case( lfo_w ) - 2'd0: begin // AM sawtooth - if( am_bresenham > 0 ) begin - if( am == lfo_amd ) begin - am <= 7'd0; - am_bresenham <= 11'd0; - end - else begin - am <= am + 1'b1; - am_bresenham <= am_bresenham - - { 2'd0, cnt_lim, 1'b0} + {4'd0,lfo_amd}; - end - end - else am_bresenham <= am_bresenham + {4'd0,lfo_amd}; + next_cnt2 = {1'd0,cnt2 } + {15'd0,cnt1_ov[1]|test[3]}; + end +end - if( pm_bresenham > 0 ) begin - if( pm == { 1'b0, lfo_pmd } ) begin - pm <= pmd_min; - pm_bresenham <= 10'd0; - end - else begin - pm <= pm + 1'b1; - pm_bresenham <= pm_bresenham - - {2'd0,cnt_lim} + {3'd0,lfo_pmd}; - end - end - else pm_bresenham <= pm_bresenham + {3'b0,lfo_pmd}; - end - 2'd1: // AM square waveform - if( cnt == cnt_lim ) begin - cnt <= 8'd0; - lfo_clk <= ~lfo_clk; - am <= lfo_clk ? lfo_amd : 7'd0; - pm <= lfo_clk ? {1'b0, lfo_pmd } : pmd_min; - end - else cnt <= cnt + 1'd1; - 2'd2: begin // AM triangle - if( am_bresenham > 0 ) begin - if( am == lfo_amd && am_up) begin - am_up <= 1'b0; - am_bresenham <= 11'd0; - end - else if( am == 7'd0 && !am_up) begin - am_up <= 1'b1; - am_bresenham <= 11'd0; - end - else begin - am <= am_up ? am+1'b1 : am-1'b1; - am_bresenham <= am_bresenham - - { 2'b0, cnt_lim, 1'b0} + {4'd0,lfo_amd}; - end - end - else am_bresenham <= am_bresenham + {4'd0,lfo_amd}; - - if( pm_bresenham > 0 ) begin - if( pm == {1'b0, lfo_pmd} && pm_up) begin - pm_up <= 1'b0; - pm_bresenham <= 10'd0; - end - else if( pm == pmd_min && !pm_up) begin - pm_up <= 1'b1; - pm_bresenham <= 10'd0; - end - else begin - pm <= pm_up ? pm+1'b1 : pm-1'b1; - pm_bresenham <= pm_bresenham - - {2'd0,cnt_lim} + {3'd0,lfo_pmd}; - end - end - else pm_bresenham <= pm_bresenham + {3'd0,lfo_pmd}; - end - 2'd3: begin - casez( lfo_amd ) // same as real chip - 7'b1??????: am <= noise_am[6:0]; - 7'b01?????: am <= { 1'b0, noise_am[5:0] }; - 7'b001????: am <= { 2'b0, noise_am[4:0] }; - 7'b0001???: am <= { 3'b0, noise_am[3:0] }; - 7'b00001??: am <= { 4'b0, noise_am[2:0] }; - 7'b000001?: am <= { 5'b0, noise_am[1:0] }; - 7'b0000001: am <= { 6'b0, noise_am[0] }; - default: am <= 7'd0; - endcase - casez( lfo_pmd ) - 7'b1??????: pm <= noise_pm; - 7'b01?????: pm <= { {2{noise_pm[7]}}, noise_pm[5:0] }; - 7'b001????: pm <= { {3{noise_pm[7]}}, noise_pm[4:0] }; - 7'b0001???: pm <= { {4{noise_pm[7]}}, noise_pm[3:0] }; - 7'b00001??: pm <= { {5{noise_pm[7]}}, noise_pm[2:0] }; - 7'b000001?: pm <= { {6{noise_pm[7]}}, noise_pm[1:0] }; - 7'b0000001: pm <= { {7{noise_pm[7]}}, noise_pm[0] }; - default: pm <= 8'd0; - endcase - end - endcase +always @(posedge clk) begin + if( lfo_up ) + lfo_up_latch <= 1; + else if( cen ) + lfo_up_latch <= 0; +end + +always @(posedge clk, posedge rst) begin + if( rst ) begin + cnt1 <= 4'd0; + cnt2 <= 15'd0; + cnt3 <= 4'd0; + cnt1_ov <= 2'd0; + cnt3_step <= 0; + bitcnt <= 4'h8; + end else if( cen ) begin + // counter 1 + if( cyc_c ) + { cnt1_ov[0], cnt1 } <= { 1'b0, cnt1 } + 1'd1; + else + cnt1_ov[0] <= 0; + cnt1_ov[1] <= cnt1_ov[0]; + bitcnt_rst <= cnt1==4'd2; + if( bitcnt_rst && !cyc_c ) + bitcnt <= 4'd0; + else if( cyc_e ) + bitcnt <= bitcnt + 1'd1; + // counter 2 + cnt2_load <= lfo_up_latch | next_cnt2[15]; + cnt2 <= next_cnt2[14:0]; + if( cyc_e ) begin + cnt2_ov[0] <= next_cnt2[15]; + lfo_clk_latch <= lfo_clk_next; + end + if( cyc_5 ) cnt2_ov[1] <= cnt2_ov[0]; + // counter 3 + cnt3_step <= 0; + if( cnt2_ov[1] & cyc_d ) begin + cnt3_clk <= 1; + // frequency LSB control + if( !cnt3[0] ) cnt3_step <= lfo_freq[3]; + else if( !cnt3[1] ) cnt3_step <= lfo_freq[2]; + else if( !cnt3[2] ) cnt3_step <= lfo_freq[1]; + else if( !cnt3[3] ) cnt3_step <= lfo_freq[0]; + end else begin + cnt3_clk <= 0; + end + if( cnt3_clk ) + cnt3 <= cnt3 + 1'd1; + // LFO clock + lfo_clk <= lfo_clk_next; + end +end + +// LFO value +reg [1:0] val_sum; +reg val_c, wcarry, val0_next; +reg w1, w2, w3, w4, w5, w6, w7, w8; + +reg [6:0] dmux; +reg integ_c, out1bit; +reg [1:0] out2sum; +wire [7:0] out2b; +reg [2:0] bitsel; + +assign out2b = out2[15:8]; + +always @(*) begin + w1 = !lfo_clk || lfo_w==NOISE || !cyc_f; + w4 = lfo_clk_latch && lfo_w==NOISE; + w3 = !w4 && val[15] && !test[1]; + w2 = !w1 && lfo_w==TRIANG; + wcarry = !w1 || ( !cyc_f && lfo_w!=NOISE && val_c); + val_sum = {1'b0, w2} + {1'b0, w3} + {1'b0, wcarry}; + val0_next = val_sum[0] || (lfo_w==NOISE && lfo_clk_latch && noise); + // LFO compound output, AM/PM base value one after the other + w5 = ampm_sel ? saw_sign : (!trig_sign || lfo_w!=TRIANG); + w6 = w5 ^ w3; + w7 = cycles[3:0]<4'd7 || cycles[3:0]==4'd15; + w8 = lfo_w == SQUARE ? (ampm_sel?cyc_6 : !saw_sign) : w6; + w8 = ~(w8 & w7); + + // Integrator + dmux = (ampm_sel ? lfo_pmd : lfo_amd) &~out1; + bitsel = ~(bitcnt[2:0]+3'd1); + out1bit = dmux[ bitsel ] & ~bit7; + out2sum = {1'b0, out1bit} + {1'b0, out2[0] && bitcnt[2:0]!=0} + {1'b0, integ_c & ~cyc_f }; +end + +always @(posedge clk, posedge rst) begin + if( rst ) begin + val <= 16'd0; + val_c <= 0; + trig_sign <= 0; + saw_sign <= 0; + out1 <= ~7'd0; + out2 <= 16'd0; + integ_c <= 0; + end else if( cen ) begin + val <= {val[14:0], val0_next }; + val_c <= val_sum[1]; + if( cyc_f ) begin + trig_sign <= val[7]; + saw_sign <= val[8]; + end + // current step + out1 <= {out1[5:0], w8}; + // integrator + integ_c <= out2sum[1]; + out2 <= { out2sum[0], out2[15:1] }; + // final output + if( bit7 & cyc_f ) begin + if( ampm_sel ) + pm <= lfo_pmd==7'd0 ? 8'd0 : { out2b[7]^pm_sign, out2b[6:0]}; + else + am <= out2b; end end end -genvar aux; -generate - for( aux=0; aux<7; aux=aux+1 ) begin : amnoise - jt51_lfo_lfsr #(.init(aux*aux+aux) ) u_noise_am( - .rst( rst ), - .clk( clk ), - .cen( cen ), - .base(sel_base), - .out( noise_am[aux] ) - ); - end - for( aux=0; aux<8; aux=aux+1 ) begin : pmnoise - jt51_lfo_lfsr #(.init(4*aux*aux-3*aux+40) ) u_noise_pm( - .rst( rst ), - .clk( clk ), - .cen( cen ), - .base(sel_base), - .out( noise_pm[aux] ) - ); - end -endgenerate - +initial begin + lfo_lut[0] = 15'h0000; + lfo_lut[1] = 15'h4000; + lfo_lut[2] = 15'h6000; + lfo_lut[3] = 15'h7000; + + lfo_lut[4] = 15'h7800; + lfo_lut[5] = 15'h7c00; + lfo_lut[6] = 15'h7e00; + lfo_lut[7] = 15'h7f00; + + lfo_lut[8] = 15'h7f80; + lfo_lut[9] = 15'h7fc0; + lfo_lut[10] = 15'h7fe0; + lfo_lut[11] = 15'h7ff0; + + lfo_lut[12] = 15'h7ff8; + lfo_lut[13] = 15'h7ffc; + lfo_lut[14] = 15'h7ffe; + lfo_lut[15] = 15'h7fff; +end + endmodule diff --git a/common/Sound/jt51/jt51_lin2exp.v b/common/Sound/jt51/jt51_lin2exp.v index b533d0df..75d408ed 100644 --- a/common/Sound/jt51/jt51_lin2exp.v +++ b/common/Sound/jt51/jt51_lin2exp.v @@ -18,7 +18,6 @@ Date: 27-10-2016 */ -`timescale 1ns / 1ps module jt51_lin2exp( input [15:0] lin, diff --git a/common/Sound/jt51/jt51_mmr.v b/common/Sound/jt51/jt51_mmr.v index ee3807f8..a16c02ca 100644 --- a/common/Sound/jt51/jt51_mmr.v +++ b/common/Sound/jt51/jt51_mmr.v @@ -18,7 +18,6 @@ Date: 27-10-2016 */ -`timescale 1ns / 1ps module jt51_mmr( input rst, @@ -29,6 +28,9 @@ module jt51_mmr( input a0, output reg busy, + // Original test bits + output reg [7:0] test_mode, + // CT output reg ct1, output reg ct2, @@ -42,7 +44,7 @@ module jt51_mmr( output reg [1:0] lfo_w, output reg [6:0] lfo_amd, output reg [6:0] lfo_pmd, - output reg lfo_rst, + output reg lfo_up, // Timers output reg [9:0] value_A, output reg [7:0] value_B, @@ -84,7 +86,9 @@ module jt51_mmr( output op31_no, output op31_acc, - output zero, + output zero, // high once per round + output half, // high twice per round + output [4:0] cycles, output m1_enters, output m2_enters, output c1_enters, @@ -105,8 +109,6 @@ reg up_rl, up_kc, up_kf, up_pms, reg [1:0] up_op; reg [2:0] up_ch; -wire busy_reg; - `ifdef SIMULATION reg mmr_dump; `endif @@ -143,12 +145,13 @@ always @(posedge clk, posedge rst) begin : memory_mapped_registers enable_irq_B, enable_irq_A, load_B, load_A } <= 6'd0; // LFO { lfo_amd, lfo_pmd } <= 14'h0; + lfo_up <= 1'b0; lfo_freq <= 8'd0; lfo_w <= 2'd0; - lfo_rst <= 1'b0; { ct2, ct1 } <= 2'd0; csm <= 1'b0; din_copy <= 8'd0; + test_mode <= 8'd0; `ifdef SIMULATION mmr_dump <= 1'b0; `endif @@ -176,7 +179,7 @@ always @(posedge clk, posedge rst) begin : memory_mapped_registers if( selected_register < 8'h20 ) begin case( selected_register) // registros especiales - REG_TEST: lfo_rst <= 1'b1; // regardless of din + REG_TEST: test_mode <= din; // regardless of din `ifdef TEST_SUPPORT REG_TEST2: { test_op0, test_eg } <= din[1:0]; `endif @@ -191,7 +194,10 @@ always @(posedge clk, posedge rst) begin : memory_mapped_registers enable_irq_B, enable_irq_A, load_B, load_A } <= din[5:0]; end - REG_LFRQ: lfo_freq <= din; + REG_LFRQ: begin + lfo_freq <= din; + lfo_up <= 1; + end REG_PMDAMD: begin if( !din[7] ) lfo_amd <= din[6:0]; @@ -237,8 +243,8 @@ always @(posedge clk, posedge rst) begin : memory_mapped_registers `ifdef SIMULATION mmr_dump <= 1'b0; `endif - csm <= 1'b0; - lfo_rst <= 1'b0; + csm <= 0; + lfo_up <= 0; { clr_flag_B, clr_flag_A } <= 2'd0; end end @@ -287,7 +293,6 @@ jt51_reg u_reg( .csm ( csm ), .overflow_A ( overflow_A), - .busy ( busy_reg ), .rl_I ( rl_I ), .fb_II ( fb_II ), .con_I ( con_I ), @@ -315,6 +320,8 @@ jt51_reg u_reg( .op31_no ( op31_no ), .op31_acc ( op31_acc ), .zero ( zero ), + .half ( half ), + .cycles ( cycles ), .m1_enters ( m1_enters ), .m2_enters ( m2_enters ), .c1_enters ( c1_enters ), @@ -345,7 +352,7 @@ end `endif -`ifndef JT51_NODEBUG +`ifdef JT51_DEBUG `ifdef SIMULATION /* verilator lint_off PINMISSING */ wire [4:0] cnt_aux; diff --git a/common/Sound/jt51/jt51_mod.v b/common/Sound/jt51/jt51_mod.v index b84ce675..a7346ba8 100644 --- a/common/Sound/jt51/jt51_mod.v +++ b/common/Sound/jt51/jt51_mod.v @@ -1,4 +1,3 @@ -`timescale 1ns / 1ps /* This file is part of JT51. diff --git a/common/Sound/jt51/jt51_noise.v b/common/Sound/jt51/jt51_noise.v index fa933c5f..1f7d78f6 100644 --- a/common/Sound/jt51/jt51_noise.v +++ b/common/Sound/jt51/jt51_noise.v @@ -12,84 +12,98 @@ You should have received a copy of the GNU General Public License along with JT51. If not, see . - + Author: Jose Tejada Gomez. Twitter: @topapate Version: 1.0 - Date: 27-10-2016 + Date: 6-2-2021 */ -`timescale 1ns / 1ps /* - tab size 4 - - See xapp052.pdf from Xilinx - - The NFRQ formula in the App. Note does not make sense: + NFRQ formula in the App: Output rate is 55kHz but for NFRQ=1 the formula states that - the noise is 111kHz, twice the output rate per channel. - + the noise is 111kHz, twice the output rate per channel. The + reason must be the inversion of the LFSR data + That would suggest that the noise for LEFT and RIGHT are different but the rest of the system suggest that LEFT and RIGHT outputs are calculated at the same time, based on the same OP output. - - Also, the block diagram states a 1 bit serial input from - EG to NOISE and that seems unnecessary too. - + I have not been able to measure noise in actual chip because - operator 31 does not produce any output on my two chips. + operator 31 does not produce any output on my two chips. This + module is based on NukeYKT's work */ module jt51_noise( - input rst, - input clk, - input cen, - input [4:0] nfrq, - input [9:0] eg, - input op31_no, - output reg [10:0] out + input rst, + input clk, + input cen, // phi 1 + input [ 4:0] cycles, + + // Noise Frequency + input [ 4:0] nfrq, + + // Noise envelope + input [ 9:0] eg, // serial signal in the original design + input op31_no, + + output out, + output reg [11:0] mix ); +reg update, nfrq_met; +reg [ 4:0] cnt; +reg [15:0] lfsr; +reg last_lfsr0; +wire all1, fb; +wire mix_sgn; -reg base; -reg [3:0] cnt; +assign out = lfsr[0]; -always @(posedge clk, posedge rst) +// period counter + +always @(posedge clk, posedge rst) begin if( rst ) begin - cnt <= 4'b0; - end - else if(cen) begin - if( op31_no ) begin - if ( &cnt ) begin - cnt <= nfrq[4:1]; // we do not need to use nfrq[0] - // because I run it off P1, YM2151 probably ran off PM - // but the result is the same, as for NFREQ=31 the YM2151 - // trips the noise output at each output sample, and for - // NFREQ=0 (or 1), the output trips every 16 samples - // so NFREQ[0] does not really add resolution - end - else cnt <= cnt + 4'b1; - base <= &cnt; + cnt <= 5'b0; + end else if(cen) begin + if( &cycles[3:0] ) begin + cnt <= update ? 5'd0 : (cnt+5'd1); end - else base <= 1'b0; + update <= nfrq_met; + nfrq_met <= ~nfrq == cnt; end - -wire rnd_sign; - -always @(posedge clk) if(cen) begin - if( op31_no ) - out <= { rnd_sign, {10{~rnd_sign}}^eg }; end -jt51_noise_lfsr #(.init(90)) u_lfsr ( - .rst ( rst ), - .clk ( clk ), - .cen ( cen ), - .base ( base ), - .out ( rnd_sign ) -); +// LFSR + +assign fb = update ? ~((all1 & ~last_lfsr0) | (lfsr[2]^last_lfsr0)) + : ~lfsr[0]; +assign all1 = &lfsr; + +always @(posedge clk, posedge rst) begin + if( rst ) begin + lfsr <= 16'hffff; + last_lfsr0 <= 1'b0; + end else if(cen) begin + lfsr <= { fb, lfsr[15:1] }; + if(update) last_lfsr0 <= ~lfsr[0]; + end +end + + +// Noise mix + +assign mix_sgn = /*eg!=10'd0 ^*/ ~out; + +always @(posedge clk, posedge rst) begin + if( rst ) begin + mix <= 12'd0; + end else if( op31_no && cen ) begin + mix <= { mix_sgn, eg[9:2] ^ {8{out}}, {3{mix_sgn}} }; + end +end endmodule diff --git a/common/Sound/jt51/jt51_noise_lfsr.v b/common/Sound/jt51/jt51_noise_lfsr.v index 0f520a38..4b6a47f5 100644 --- a/common/Sound/jt51/jt51_noise_lfsr.v +++ b/common/Sound/jt51/jt51_noise_lfsr.v @@ -18,7 +18,6 @@ Date: 27-10-2016 */ -`timescale 1ns / 1ps // See xapp052.pdf from Xilinx diff --git a/common/Sound/jt51/jt51_op.v b/common/Sound/jt51/jt51_op.v index beba363e..0058107d 100644 --- a/common/Sound/jt51/jt51_op.v +++ b/common/Sound/jt51/jt51_op.v @@ -18,7 +18,6 @@ Date: 27-10-2016 */ -`timescale 1ns / 1ps // Pipeline operator @@ -324,7 +323,7 @@ jt51_sh #( .width(1), .stages(3)) shsignbit( ); /////////////////// Debug -`ifndef JT51_NODEBUG +`ifdef JT51_DEBUG `ifdef SIMULATION /* verilator lint_off PINMISSING */ wire [4:0] cnt; diff --git a/common/Sound/jt51/jt51_pg.v b/common/Sound/jt51/jt51_pg.v index ab3021cf..1593f00a 100644 --- a/common/Sound/jt51/jt51_pg.v +++ b/common/Sound/jt51/jt51_pg.v @@ -12,13 +12,12 @@ You should have received a copy of the GNU General Public License along with JT51. If not, see . - + Author: Jose Tejada Gomez. Twitter: @topapate Version: 1.0 Date: 27-10-2016 */ -`timescale 1ns / 1ps module jt51_pg( input rst, @@ -40,6 +39,10 @@ module jt51_pg( input pg_rst_III, output reg [ 4:0] keycode_III, output [ 9:0] pg_phase_X + `ifdef JT51_PG_SIM + ,output [19:0] phase_step_VII_out + ,output [12:0] keycode_I_out + `endif ); wire [19:0] ph_VII; @@ -62,6 +65,11 @@ reg [2:0] pow2ind_IV; reg [2:0] dt1_III, dt1_IV, dt1_V; +`ifdef JT51_PG_SIM +assign phase_step_VII_out = phase_step_VII; +assign keycode_I_out = keycode_I; +`endif + jt51_phinc_rom u_phinctable( // .clk ( clk ), .keycode( phinc_addr_III[9:0] ), @@ -100,8 +108,8 @@ always @(*) begin : dt1_limit_mux 3'd5: dt1_unlimited = { pow2[4:0], 1'd0 }; default:dt1_unlimited = 6'd0; endcase - dt1_limited_IV = dt1_unlimited > dt1_limit ? - dt1_limit[4:0] : dt1_unlimited[4:0]; + dt1_limited_IV = dt1_unlimited > dt1_limit ? + dt1_limit[4:0] : dt1_unlimited[4:0]; end reg signed [8:0] mod_I; @@ -115,8 +123,8 @@ always @(*) begin 3'd4: mod_I = { 4'd0, pm[6:2] }; 3'd5: mod_I = { 3'd0, pm[6:1] }; 3'd6: mod_I = { 1'd0, pm[6:0], 1'b0 }; - 3'd7: mod_I = { pm[6:0], 2'b0 }; - endcase + 3'd7: mod_I = { pm[6:0], 2'b0 }; + endcase end @@ -147,16 +155,18 @@ always @(posedge clk) if(cen) begin : phase_calculation (keycode_I[7:6]==2'd3 ? 14'd64:14'd0); 2'd2: keycode_II <= { 1'b0, keycode_I } + 14'd628 + (keycode_I[7:0]>dt2_lim2 ? 14'd64:14'd0); - 2'd3: keycode_II <= { 1'b0, keycode_I } + 14'd800 + + 2'd3: keycode_II <= { 1'b0, keycode_I } + 14'd800 + (keycode_I[7:0]>dt2_lim3 ? 14'd64:14'd0); endcase end // II -always @(posedge clk) if(cen) begin +always @(posedge clk) if(cen) begin phinc_addr_III <= keycode_II[9:0]; octave_III <= keycode_II[13:10]; keycode_III <= keycode_II[12:8]; + // Using bits 13:9 fixes Double Dragon issue #14 + // but notes get too long in Jackal case( dt1_II[1:0] ) 2'd1: dt1_kf_III <= keycode_II[13:8] - (6'b1<<2); 2'd2: dt1_kf_III <= keycode_II[13:8] + (6'b1<<2); @@ -166,7 +176,7 @@ always @(posedge clk) if(cen) begin dt1_III <= dt1_II; end - // III + // III always @(posedge clk) if(cen) begin case( octave_III ) 4'd0: phase_base_IV <= { 8'd0, phinc_III[11:2] }; @@ -187,7 +197,7 @@ end // IV LIMIT_BASE always @(posedge clk) if(cen) begin - if( phase_base_IV > 18'd82976 ) + if( phase_base_IV > 18'd82976 ) phase_base_V <= 18'd82976; else phase_base_V <= phase_base_IV; @@ -219,11 +229,11 @@ end always @(posedge clk, posedge rst) begin if( rst ) ph_VIII <= 20'd0; - else if(cen) begin + else if(cen) begin ph_VIII <= pg_rst_VII ? 20'd0 : ph_VII + phase_step_VII; `ifdef DISPLAY_STEP $display( "%d", phase_step_VII ); - `endif + `endif end end @@ -249,7 +259,7 @@ always @(posedge clk, posedge rst) begin end jt51_sh #( .width(20), .stages(32-3) ) u_phsh( - .rst ( rst ), + .rst ( rst ), .clk ( clk ), .cen ( cen ), .din ( ph_X ), @@ -264,33 +274,62 @@ jt51_sh #( .width(1), .stages(4) ) u_pgrstsh( .drop ( pg_rst_VII) ); -`ifndef JT51_NODEBUG +`ifdef JT51_DEBUG `ifdef SIMULATION /* verilator lint_off PINMISSING */ wire [4:0] cnt; sep32_cnt u_sep32_cnt (.clk(clk), .cen(cen), .zero(zero), .cnt(cnt)); -// wire zero_VIII; -// -// jt51_sh #(.width(1),.stages(7)) u_sep_aux( -// .clk ( clk ), -// .din ( zero ), -// .drop ( zero_VIII ) -// ); -// -// sep32 #(.width(1),.stg(8)) sep_ref( -// .clk ( clk ), -// .cen(cen), -// .mixed ( zero_VIII ), -// .cnt ( cnt ) -// ); + sep32 #(.width(10),.stg(10)) sep_ph( .clk ( clk ), - .cen(cen), + .cen ( cen ), .mixed ( pg_phase_X ), .cnt ( cnt ) - ); +); + +sep32 #(.width(20),.stg(7)) sep_phstep( + .clk ( clk ), + .cen ( cen ), + .mixed ( phase_step_VII), + .cnt ( cnt ) +); + +sep32 #(.width(13),.stg(1)) sep_kc1( + .clk ( clk ), + .cen ( cen ), + .mixed ( keycode_I ), + .cnt ( cnt ) +); + +sep32 #(.width(14),.stg(2)) sep_kc2( + .clk ( clk ), + .cen ( cen ), + .mixed ( keycode_II ), + .cnt ( cnt ) +); + +sep32 #(.width(3),.stg(1)) sep_pms( + .clk ( clk ), + .cen ( cen ), + .mixed ( pms_I ), + .cnt ( cnt ) +); + +sep32 #(.width(18),.stg(4)) sep_base4( + .clk ( clk ), + .cen ( cen ), + .mixed ( phase_base_IV ), + .cnt ( cnt ) +); + +sep32 #(.width(18),.stg(5)) sep_base5( + .clk ( clk ), + .cen ( cen ), + .mixed ( phase_base_V ), + .cnt ( cnt ) +); /* verilator lint_on PINMISSING */ `endif diff --git a/common/Sound/jt51/jt51_phinc_rom.v b/common/Sound/jt51/jt51_phinc_rom.v index 1061640e..d9ebc972 100644 --- a/common/Sound/jt51/jt51_phinc_rom.v +++ b/common/Sound/jt51/jt51_phinc_rom.v @@ -18,7 +18,6 @@ Date: 27-10-2016 */ -`timescale 1ns / 1ps module jt51_phinc_rom( // input clk, diff --git a/common/Sound/jt51/jt51_phrom.v b/common/Sound/jt51/jt51_phrom.v index b02ed7b2..7bf496f2 100644 --- a/common/Sound/jt51/jt51_phrom.v +++ b/common/Sound/jt51/jt51_phrom.v @@ -1,4 +1,3 @@ -`timescale 1ns / 1ps /* This file is part of JT51. diff --git a/common/Sound/jt51/jt51_pm.v b/common/Sound/jt51/jt51_pm.v index a0eb8cc8..3a82ab30 100644 --- a/common/Sound/jt51/jt51_pm.v +++ b/common/Sound/jt51/jt51_pm.v @@ -12,84 +12,83 @@ You should have received a copy of the GNU General Public License along with JT51. If not, see . - - Author: Jose Tejada Gomez. Twitter: @topapate - Version: 1.0 - Date: 27-10-2016 - */ -`timescale 1ns / 1ps + Author: Jose Tejada Gomez. Twitter: @topapate + Version: 1.0 + Date: 27-10-2016 + */ + module jt51_pm( - input [6:0] kc_I, - input [5:0] kf_I, - input [8:0] mod_I, - input add, - output reg [12:0] kcex + input [ 6:0] kc_I, + input [ 5:0] kf_I, + input [ 8:0] mod_I, + input add, + output reg [12:0] kcex ); -reg [9:0] lim; +reg [ 9:0] lim; reg [13:0] kcex0, kcex1; -reg [1:0] extra; +reg [ 1:0] extra; -reg [6:0] kcin; -reg carry; +reg [ 6:0] kcin; +reg carry; always @(*) begin: kc_input_cleaner - { carry, kcin } = kc_I[1:0]==2'd3 ? { 1'b0, kc_I } + 8'd1 : {1'b0,kc_I}; + { carry, kcin } = kc_I[1:0]==2'd3 ? { 1'b0, kc_I } + 8'd1 : {1'b0,kc_I}; end always @(*) begin : addition - lim = { 1'd0, mod_I } + { 4'd0, kf_I }; + lim = { 1'd0, mod_I } + { 4'd0, kf_I }; case( kcin[3:0] ) - default: - if( lim>=10'd448 ) extra = 2'd2; + default: + if( lim>=10'd448 ) extra = 2'd2; else if( lim>=10'd256 ) extra = 2'd1; else extra = 2'd0; 4'd1,4'd5,4'd9,4'd13: - if( lim>=10'd384 ) extra = 2'd2; + if( lim>=10'd384 ) extra = 2'd2; else if( lim>=10'd192 ) extra = 2'd1; else extra = 2'd0; 4'd2,4'd6,4'd10,4'd14: - if( lim>=10'd512 ) extra = 2'd3; - else if( lim>=10'd320 ) extra = 2'd2; + if( lim>=10'd512 ) extra = 2'd3; + else if( lim>=10'd320 ) extra = 2'd2; else if( lim>=10'd128 ) extra = 2'd1; - else extra = 2'd0; + else extra = 2'd0; endcase kcex0 = {1'b0,kcin,kf_I} + { 6'd0, extra, 6'd0 } + { 5'd0, mod_I }; - kcex1 = kcex0[7:6]==2'd3 ? kcex0 + 14'd64 : kcex0; + kcex1 = kcex0[7:6]==2'd3 ? kcex0 + 14'd64 : kcex0; end -reg signed [9:0] slim; -reg [1:0] sextra; -reg [13:0] skcex0, skcex1; +reg signed [ 9:0] slim; +reg [ 1:0] sextra; +reg [13:0] skcex0, skcex1; always @(*) begin : subtraction - slim = { 1'd0, mod_I } - { 4'd0, kf_I }; + slim = { 1'd0, mod_I } - { 4'd0, kf_I }; case( kcin[3:0] ) - default: - if( slim>=10'sd449 ) sextra = 2'd3; - else if( slim>=10'sd257 ) sextra = 2'd2; + default: + if( slim>=10'sd449 ) sextra = 2'd3; + else if( slim>=10'sd257 ) sextra = 2'd2; else if( slim>=10'sd65 ) sextra = 2'd1; else sextra = 2'd0; 4'd1,4'd5,4'd9,4'd13: - if( slim>=10'sd321 ) sextra = 2'd2; + if( slim>=10'sd321 ) sextra = 2'd2; else if( slim>=10'sd129 ) sextra = 2'd1; else sextra = 2'd0; 4'd2,4'd6,4'd10,4'd14: - if( slim>=10'sd385 ) sextra = 2'd2; + if( slim>=10'sd385 ) sextra = 2'd2; else if( slim>=10'sd193 ) sextra = 2'd1; - else sextra = 2'd0; + else sextra = 2'd0; endcase skcex0 = {1'b0,kcin,kf_I} - { 6'd0, sextra, 6'd0 } - { 5'd0, mod_I }; skcex1 = skcex0[7:6]==2'd3 ? skcex0 - 14'd64 : skcex0; end always @(*) begin : mux - if ( add ) - kcex = kcex1[13] | carry ? {3'd7, 4'd14, 6'd63} : kcex1[12:0]; + if ( add ) + kcex = kcex1[13] | carry ? {3'd7, 4'd14, 6'd63} : kcex1[12:0]; else - kcex = carry ? {3'd7, 4'd14, 6'd63} : (skcex1[13] ? 13'd0 : skcex1[12:0]); + kcex = carry ? {3'd7, 4'd14, 6'd63} : (skcex1[13] ? 13'd0 : skcex1[12:0]); end endmodule diff --git a/common/Sound/jt51/jt51_reg.v b/common/Sound/jt51/jt51_reg.v index 24ba2af1..abafe730 100644 --- a/common/Sound/jt51/jt51_reg.v +++ b/common/Sound/jt51/jt51_reg.v @@ -18,7 +18,6 @@ Date: 27-10-2016 */ -`timescale 1ns / 1ps module jt51_reg( input rst, @@ -43,7 +42,6 @@ module jt51_reg( input csm, input overflow_A, - output reg busy, output [1:0] rl_I, output [2:0] fb_II, output [2:0] con_I, @@ -68,6 +66,8 @@ module jt51_reg( // Pipeline order output reg zero, + output reg half, + output [4:0] cycles, output reg m1_enters, output reg m2_enters, output reg c1_enters, @@ -88,8 +88,8 @@ reg kon, koff; reg [1:0] csm_state; reg [4:0] csm_cnt; -wire csm_kon = csm_state[0]; -wire csm_koff = csm_state[1]; +// wire csm_kon = csm_state[0]; +// wire csm_koff = csm_state[1]; always @(*) begin m1_enters = cur_op == 2'b00; @@ -98,8 +98,10 @@ always @(*) begin c2_enters = cur_op == 2'b11; end +`ifdef SIMULATION wire up = up_rl | up_kc | up_kf | up_pms | up_dt1 | up_tl | up_ks | up_amsen | up_dt2 | up_d1l | up_keyon; +`endif reg [4:0] cur; @@ -109,6 +111,7 @@ always @(posedge clk) if(cen) begin end assign cur_op = cur[4:3]; +assign cycles = cur; wire [4:0] req_I = { op, ch }; wire [4:0] req_II = req_I + 5'd1; @@ -122,8 +125,8 @@ wire [4:0] req_VII = req_VI + 5'd1; wire update_op_I = cur == req_I; wire update_op_II = cur == req_II; wire update_op_III = cur == req_III; -wire update_op_IV = cur == req_IV; -wire update_op_V = cur == req_V; +// wire update_op_IV = cur == req_IV; +// wire update_op_V = cur == req_V; wire update_op_VI = cur == req_VI; wire update_op_VII = cur == req_VII; @@ -155,12 +158,12 @@ always @(posedge clk, posedge rst) begin : up_counter if( rst ) begin cur <= 5'h0; zero <= 1'b0; - busy <= 1'b0; + half <= 1'b0; end else if(cen) begin cur <= next; zero <= next== 5'd0; - if( &cur ) busy <= up && !busy; + half <= next[3:0] == 4'd0; end end @@ -176,7 +179,7 @@ jt51_kon u_kon ( .keyon_ch (keyon_ch ), .cur_op (cur_op ), .cur_ch (cur_ch ), - .up_keyon (up_keyon && busy ), + .up_keyon (up_keyon ), .csm (csm ), .overflow_A(overflow_A), .keyon_II (keyon_II ) @@ -252,7 +255,7 @@ jt51_csr_ch u_csr_ch( ); //////////////////// Debug -`ifndef JT51_NODEBUG +`ifdef JT51_DEBUG `ifdef SIMULATION /* verilator lint_off PINMISSING */ wire [4:0] cnt_aux; diff --git a/common/Sound/jt51/jt51_sh.v b/common/Sound/jt51/jt51_sh.v index 64136f8e..8b2335a5 100644 --- a/common/Sound/jt51/jt51_sh.v +++ b/common/Sound/jt51/jt51_sh.v @@ -18,7 +18,6 @@ Date: 27-10-2016 */ -`timescale 1ns / 1ps module jt51_sh #(parameter width=5, stages=32, rstval=1'b0 ) ( input rst, diff --git a/common/Sound/jt51/jt51_timers.v b/common/Sound/jt51/jt51_timers.v index 897012c4..7bcab5c8 100644 --- a/common/Sound/jt51/jt51_timers.v +++ b/common/Sound/jt51/jt51_timers.v @@ -12,13 +12,11 @@ You should have received a copy of the GNU General Public License along with JT51. If not, see . - + Author: Jose Tejada Gomez. Twitter: @topapate Version: 1.0 Date: 27-10-2016 */ - -`timescale 1ns / 1ps module jt51_timers( input rst, @@ -41,24 +39,24 @@ module jt51_timers( assign irq_n = ~( (flag_A&enable_irq_A) | (flag_B&enable_irq_B) ); -jt51_timer #(.counter_width(10)) timer_A( +jt51_timer #(.CW(10)) timer_A( .rst ( rst ), - .clk ( clk ), - .cen ( cen ), + .clk ( clk ), + .cen ( cen ), .zero ( zero ), - .start_value( value_A ), + .start_value( value_A ), .load ( load_A ), .clr_flag ( clr_flag_A), .flag ( flag_A ), .overflow ( overflow_A) ); -jt51_timer #(.counter_width(12)) timer_B( +jt51_timer #(.CW(8),.FREE_EN(1)) timer_B( .rst ( rst ), - .clk ( clk ), - .cen ( cen ), + .clk ( clk ), + .cen ( cen ), .zero ( zero ), - .start_value( {value_B,4'b0}), + .start_value( value_B ), .load ( load_B ), .clr_flag ( clr_flag_B ), .flag ( flag_B ), @@ -67,21 +65,25 @@ jt51_timer #(.counter_width(12)) timer_B( endmodule -module jt51_timer #(parameter counter_width = 10 ) -( +module jt51_timer #(parameter + CW = 8, // counter bit width. This is the counter that can be loaded + FREE_EN = 0 // enables a 4-bit free enable count +) ( input rst, - input clk, - input cen, - input zero, - input [counter_width-1:0] start_value, + input clk, + input cen, + input zero, + input [CW-1:0] start_value, input load, input clr_flag, output reg flag, output reg overflow ); -reg last_load; -reg [counter_width-1:0] cnt, next; +reg last_load; +reg [CW-1:0] cnt, next; +reg [ 3:0] free_cnt, free_next; +reg free_ov; always@(posedge clk, posedge rst) if( rst ) @@ -93,14 +95,27 @@ always@(posedge clk, posedge rst) end always @(*) begin - {overflow, next } = { 1'b0, cnt } + 1'b1; + {free_ov, free_next} = { 1'b0, free_cnt} + 1'b1; + /* verilator lint_off WIDTH */ + {overflow, next } = { 1'b0, cnt } + (FREE_EN ? free_ov : 1'b1); + /* verilator lint_on WIDTH */ end always @(posedge clk) if(cen && zero) begin : counter last_load <= load; if( (load && !last_load) || overflow ) begin cnt <= start_value; - end + end else if( last_load ) cnt <= next; end + +// Free running counter +always @(posedge clk) begin + if( rst ) begin + free_cnt <= 4'd0; + end else if( cen&&zero ) begin + free_cnt <= free_next; + end +end + endmodule