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mirror of https://github.com/Gehstock/Mist_FPGA.git synced 2026-02-02 06:40:51 +00:00

Moon Patrol Cleanup

This commit is contained in:
Marcel
2024-03-01 17:08:19 +01:00
parent 543d4c00cd
commit e2343a11c4
80 changed files with 5024 additions and 5218 deletions

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set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "jtframe_dcrm.v"]
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "jtframe_fir.v"]
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "jtframe_jt49_filters.v"]

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/* This file is part of JT49.
JT49 is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
JT49 is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with JT49. If not, see <http://www.gnu.org/licenses/>.
Author: Jose Tejada Gomez. Twitter: @topapate
Version: 1.0
Date: 25-11-2020
*/
// This is pretty much a copy of jt49_dcrm2
// DC removal filter
// input is unsigned
// output is signed
module jtframe_dcrm #(parameter
SW = 8,
SIGNED_INPUT = 0
)(
input rst,
input clk,
input sample,
input [SW-1:0] din,
output signed [SW-1:0] dout
);
localparam DW=10; // width of the decimal portion
reg signed [SW+DW:0] integ, exact, error;
//reg signed [2*(9+DW)-1:0] mult;
// wire signed [SW+DW:0] plus1 = { {SW+DW{1'b0}},1'b1};
reg signed [SW:0] pre_dout;
// reg signed [SW+DW:0] dout_ext;
reg signed [SW:0] q;
always @(*) begin
exact = integ+error;
q = exact[SW+DW:DW];
pre_dout = { SIGNED_INPUT ? din[SW-1] : 1'b0, din } - q;
//dout_ext = { pre_dout, {DW{1'b0}} };
//mult = dout_ext;
end
assign dout = pre_dout[SW-1:0];
always @(posedge clk)
if( rst ) begin
integ <= {SW+DW+1{1'b0}};
error <= {SW+DW+1{1'b0}};
end else if( sample ) begin
/* verilator lint_off WIDTH */
integ <= integ + pre_dout; //mult[SW+DW*2:DW];
/* verilator lint_on WIDTH */
error <= exact-{q, {DW{1'b0}}};
end
endmodule

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/* This file is part of JTFRAME.
JTFRAME program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
JTFRAME program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with JTFRAME. If not, see <http://www.gnu.org/licenses/>.
Author: Jose Tejada Gomez. Twitter: @topapate
Version: 1.0
Date: 22-11-2020
*/
// Generic FIR filter for stereo signals
// Max 127 coefficients
// Parameters
// KMAX = number of coefficients (8 bit value)
// COEFFS = hex file with filter coefficients
module jtframe_fir(
input rst,
input clk,
input sample,
input signed [15:0] l_in,
input signed [15:0] r_in,
output reg signed [15:0] l_out,
output reg signed [15:0] r_out
);
parameter [6:0] KMAX = 7'd68;
parameter COEFFS = "filter.hex";
reg signed [15:0] ram[0:511]; // dual port RAM
reg [6:0] pt_wr, pt_rd, cnt;
reg st;
reg signed [35:0] acc_l, acc_r;
reg signed [15:0] coeff;
reg signed [31:0] p_l, p_r;
function signed [35:0] ext;
input signed [31:0] p;
ext = { {4{p[31]}}, p };
endfunction
function [6:0] loop_inc;
input [6:0] s;
loop_inc = s == KMAX-7'd1 ? 7'd0 : s+7'd1;
endfunction
function signed [15:0] sat;
input [35:0] a;
sat = a[35:30] == {6{a[29]}} ? a[29:14] : { a[35], {15{~a[35]}} };
endfunction
always@(posedge clk, posedge rst) begin
if( rst ) begin
l_out <= 16'd0;
r_out <= 16'd0;
pt_rd <= 7'd0;
pt_wr <= 7'd0;
cnt <= 7'd0;
acc_l <= 36'd0;
acc_r <= 36'd0;
p_l <= 32'd0;
p_r <= 32'd0;
end else begin
if( sample ) begin
pt_rd <= pt_wr;
cnt <= 0;
ram[ { 2'd1, pt_wr } ] <= l_in;
ram[ { 2'd2, pt_wr } ] <= r_in;
pt_wr <= loop_inc( pt_wr );
acc_l <= 36'd0;
acc_r <= 36'd0;
p_l <= 32'd0;
p_r <= 32'd0;
st <= 0;
end else begin
if( cnt < KMAX ) begin
st <= ~st;
if( st == 0 ) begin
coeff <= ram[ {2'd0, cnt } ];
end else begin
p_l <= ram[ {2'd1, pt_rd } ] * coeff;
p_r <= ram[ {2'd2, pt_rd } ] * coeff;
acc_l <= acc_l + ext(p_l);
acc_r <= acc_r + ext(p_r);
cnt <= cnt+7'd1;
pt_rd <= loop_inc( pt_rd );
end
end else begin
l_out <= sat(acc_l);
r_out <= sat(acc_r);
end
end
end
end
initial begin
$readmemh( COEFFS, ram );
end
endmodule

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/* This file is part of JTFRAME.
JTFRAME program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
JTFRAME program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with JTFRAME. If not, see <http://www.gnu.org/licenses/>.
Author: Jose Tejada Gomez. Twitter: @topapate
Version: 1.0
Date: 25-11-2020
*/
module jtframe_jt49_filters(
input rst,
input clk,
input [ 9:0] din0,
input [ 9:0] din1,
input [ 9:0] din2,
input sample,
output signed [15:0] dout
);
localparam W=11,WD=16-W;
wire signed [W-1:0] dcrm_snd;
reg [W-1:0] base_snd;
wire signed [ 15:0] dcrm16 = { dcrm_snd, dcrm_snd[W-2:W-WD-1] };
//assign dout = dcrm16;
always @(posedge clk, posedge rst ) begin
if( rst ) begin
base_snd <= {W{1'd0}};
end else if(sample) begin
base_snd <= { {W-10{1'b0}}, din0} + { {W-10{1'b0}}, din1} + { {W-10{1'b0}}, din2};
end
end
jtframe_dcrm #(.SW(W)) u_dcrm(
.rst ( rst ),
.clk ( clk ),
.sample ( sample ),
.din ( base_snd ),
.dout ( dcrm_snd )
);
jtframe_fir #(.KMAX(126),.COEFFS("firjt49.hex")) u_fir(
.rst ( rst ),
.clk ( clk ),
.sample ( sample ),
.l_in ( dcrm16 ),
.r_in ( 16'd0 ),
.l_out ( dout ),
.r_out ( )
);
endmodule