diff --git a/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/CClimber.qsf b/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/CClimber.qsf index 575d6878..01b8dae4 100644 --- a/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/CClimber.qsf +++ b/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/CClimber.qsf @@ -40,7 +40,7 @@ # Project-Wide Assignments # ======================== set_global_assignment -name ORIGINAL_QUARTUS_VERSION 16.0.2 -set_global_assignment -name LAST_QUARTUS_VERSION 13.1 +set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1" set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:48:06 MAY 24,2017" set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:rtl/build_id.tcl" set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files @@ -96,8 +96,6 @@ set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8 # Fitter Assignments # ================== set_global_assignment -name DEVICE EP3C25E144C8 -set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF -set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL" set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON diff --git a/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/Release/CClimber.rbf b/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/Release/CClimber.rbf new file mode 100644 index 00000000..dd42e5fb Binary files /dev/null and b/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/Release/CClimber.rbf differ diff --git a/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/Snapshot/CClimber.rbf b/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/Snapshot/CClimber.rbf deleted file mode 100644 index 5ddca617..00000000 Binary files a/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/Snapshot/CClimber.rbf and /dev/null differ diff --git a/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/rtl/CClimber_mist.sv b/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/rtl/CClimber_mist.sv index 42594f30..41faf0bf 100644 --- a/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/rtl/CClimber_mist.sv +++ b/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/rtl/CClimber_mist.sv @@ -37,12 +37,13 @@ wire ps2_kbd_clk, ps2_kbd_data; assign LED = 1; -wire clock_48, clock_12; +wire clock_24, clock_12, clock_6; pll pll ( .inclk0(CLOCK_27), - .c0(clock_48),//48.784 - .c1(clock_12)//12.196 + .c0(clock_24),//48.784 + .c1(clock_12),//12.196 + .c2(clock_6) ); crazy_climber crazy_climber ( @@ -82,7 +83,7 @@ crazy_climber crazy_climber ( wire [15:0] audio; dac dac ( - .CLK(clock_48), + .CLK(clock_24), .RESET(1'b0), .DACin(audio), .DACout(AUDIO_L) @@ -97,9 +98,9 @@ wire [2:0] r, g; wire [1:0] b; video_mixer #(.LINE_LENGTH(480), .HALF_DEPTH(1)) video_mixer ( - .clk_sys(clock_48), - .ce_pix(clock_12), - .ce_pix_actual(clock_12), + .clk_sys(clock_24), + .ce_pix(clock_6), + .ce_pix_actual(clock_6), .SPI_SCK(SPI_SCK), .SPI_SS3(SPI_SS3), .SPI_DI(SPI_DI), @@ -123,7 +124,7 @@ video_mixer #(.LINE_LENGTH(480), .HALF_DEPTH(1)) video_mixer mist_io #(.STRLEN(($size(CONF_STR)>>3))) mist_io ( - .clk_sys (clock_48 ), + .clk_sys (clock_24 ), .conf_str (CONF_STR ), .SPI_SCK (SPI_SCK ), .CONF_DATA0 (CONF_DATA0 ), @@ -142,7 +143,7 @@ mist_io #(.STRLEN(($size(CONF_STR)>>3))) mist_io ); keyboard keyboard( - .clk(clock_48), + .clk(clock_24), .reset(), .ps2_kbd_clk(ps2_kbd_clk), .ps2_kbd_data(ps2_kbd_data), diff --git a/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/rtl/build_id.sv b/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/rtl/build_id.sv index ca1cd54b..18b09458 100644 --- a/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/rtl/build_id.sv +++ b/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/rtl/build_id.sv @@ -1,2 +1,2 @@ -`define BUILD_DATE "180607" -`define BUILD_TIME "194921" +`define BUILD_DATE "180915" +`define BUILD_TIME "160403" diff --git a/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/rtl/pll.qip b/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/rtl/pll.qip new file mode 100644 index 00000000..aaef684a --- /dev/null +++ b/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/rtl/pll.qip @@ -0,0 +1,4 @@ +set_global_assignment -name IP_TOOL_NAME "ALTPLL" +set_global_assignment -name IP_TOOL_VERSION "13.0" +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "pll.v"] +set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll.ppf"] diff --git a/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/rtl/pll.v b/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/rtl/pll.v index 202524dc..c4b8675a 100644 --- a/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/rtl/pll.v +++ b/Arcade_MiST/Unknown-Hardware/CrazyClimber_MiST/rtl/pll.v @@ -14,7 +14,7 @@ // ************************************************************ // THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! // -// 13.1.0 Build 162 10/23/2013 SJ Web Edition +// 13.0.1 Build 232 06/12/2013 SP 1 SJ Full Version // ************************************************************ @@ -40,26 +40,30 @@ module pll ( inclk0, c0, c1, + c2, locked); input inclk0; output c0; output c1; + output c2; output locked; wire [4:0] sub_wire0; wire sub_wire2; - wire [0:0] sub_wire6 = 1'h0; + wire [0:0] sub_wire7 = 1'h0; + wire [2:2] sub_wire4 = sub_wire0[2:2]; wire [0:0] sub_wire3 = sub_wire0[0:0]; wire [1:1] sub_wire1 = sub_wire0[1:1]; wire c1 = sub_wire1; wire locked = sub_wire2; wire c0 = sub_wire3; - wire sub_wire4 = inclk0; - wire [1:0] sub_wire5 = {sub_wire6, sub_wire4}; + wire c2 = sub_wire4; + wire sub_wire5 = inclk0; + wire [1:0] sub_wire6 = {sub_wire7, sub_wire5}; altpll altpll_component ( - .inclk (sub_wire5), + .inclk (sub_wire6), .clk (sub_wire0), .locked (sub_wire2), .activeclock (), @@ -98,7 +102,7 @@ module pll ( .vcounderrange ()); defparam altpll_component.bandwidth_type = "AUTO", - altpll_component.clk0_divide_by = 26, + altpll_component.clk0_divide_by = 52, altpll_component.clk0_duty_cycle = 50, altpll_component.clk0_multiply_by = 47, altpll_component.clk0_phase_shift = "0", @@ -106,6 +110,10 @@ module pll ( altpll_component.clk1_duty_cycle = 50, altpll_component.clk1_multiply_by = 47, altpll_component.clk1_phase_shift = "0", + altpll_component.clk2_divide_by = 208, + altpll_component.clk2_duty_cycle = 50, + altpll_component.clk2_multiply_by = 47, + altpll_component.clk2_phase_shift = "0", altpll_component.compensate_clock = "CLK0", altpll_component.inclk0_input_frequency = 37037, altpll_component.intended_device_family = "Cyclone III", @@ -140,7 +148,7 @@ module pll ( altpll_component.port_scanwrite = "PORT_UNUSED", altpll_component.port_clk0 = "PORT_USED", altpll_component.port_clk1 = "PORT_USED", - altpll_component.port_clk2 = "PORT_UNUSED", + altpll_component.port_clk2 = "PORT_USED", altpll_component.port_clk3 = "PORT_UNUSED", altpll_component.port_clk4 = "PORT_UNUSED", altpll_component.port_clk5 = "PORT_UNUSED", @@ -179,12 +187,15 @@ endmodule // Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0" // Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0" // Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8" -// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "26" +// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "52" // Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "104" +// Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC "208" // Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000" // Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000" -// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "48.807693" +// Retrieval info: PRIVATE: DUTY_CYCLE2 STRING "50.00000000" +// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "24.403847" // Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "12.201923" +// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING "6.100962" // Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0" // Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0" // Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1" @@ -206,25 +217,33 @@ endmodule // Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0" // Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg" // Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "ps" +// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT2 STRING "ps" // Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any" // Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0" // Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0" +// Retrieval info: PRIVATE: MIRROR_CLK2 STRING "0" // Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "47" // Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "47" +// Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC "47" // Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1" -// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "48.78400000" +// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "24.39200000" // Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "12.19600000" +// Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING "6.09800000" // Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0" // Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "0" +// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING "0" // Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz" // Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz" +// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT2 STRING "MHz" // Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1" // Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0" // Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000" // Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "0.00000000" +// Retrieval info: PRIVATE: PHASE_SHIFT2 STRING "0.00000000" // Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0" // Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg" // Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "deg" +// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT2 STRING "ps" // Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0" // Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0" // Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1" @@ -248,18 +267,21 @@ endmodule // Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0" // Retrieval info: PRIVATE: STICKY_CLK0 STRING "1" // Retrieval info: PRIVATE: STICKY_CLK1 STRING "1" +// Retrieval info: PRIVATE: STICKY_CLK2 STRING "1" // Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1" // Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1" // Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" // Retrieval info: PRIVATE: USE_CLK0 STRING "1" // Retrieval info: PRIVATE: USE_CLK1 STRING "1" +// Retrieval info: PRIVATE: USE_CLK2 STRING "1" // Retrieval info: PRIVATE: USE_CLKENA0 STRING "0" // Retrieval info: PRIVATE: USE_CLKENA1 STRING "0" +// Retrieval info: PRIVATE: USE_CLKENA2 STRING "0" // Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0" // Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0" // Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all // Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO" -// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "26" +// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "52" // Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50" // Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "47" // Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0" @@ -267,6 +289,10 @@ endmodule // Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50" // Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "47" // Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0" +// Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "208" +// Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC "50" +// Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC "47" +// Retrieval info: CONSTANT: CLK2_PHASE_SHIFT STRING "0" // Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0" // Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "37037" // Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III" @@ -300,7 +326,7 @@ endmodule // Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED" // Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED" // Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_USED" -// Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_USED" // Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED" // Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED" // Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED" @@ -319,12 +345,14 @@ endmodule // Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]" // Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0" // Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1" +// Retrieval info: USED_PORT: c2 0 0 0 0 OUTPUT_CLK_EXT VCC "c2" // Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0" // Retrieval info: USED_PORT: locked 0 0 0 0 OUTPUT GND "locked" // Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0 // Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0 // Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0 // Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1 +// Retrieval info: CONNECT: c2 0 0 0 0 @clk 0 0 1 2 // Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0 // Retrieval info: GEN_FILE: TYPE_NORMAL pll.v TRUE // Retrieval info: GEN_FILE: TYPE_NORMAL pll.ppf TRUE