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Code Issues Releases Wiki Activity

IremM62: add Lode Runners

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This commit is contained in:
Gyorgy Szombathelyi 2020-03-05 22:03:51 +01:00
parent e9b38ee90b
commit fb2ac942da
16 changed files with 574 additions and 264 deletions
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4
Arcade_MiST/IremM62 Hardware/IremM62.qsf
View File

@ -66,7 +66,6 @@ set_global_assignment -name VHDL_FILE rtl/sprite_pkg.vhd
set_global_assignment -name VHDL_FILE rtl/sprite_array.vhd
set_global_assignment -name VHDL_FILE rtl/Inputs.VHD
set_global_assignment -name VHDL_FILE rtl/input_mapper.vhd
set_global_assignment -name VHDL_FILE rtl/dprom_2r.vhd
set_global_assignment -name VHDL_FILE rtl/dpram.vhd
set_global_assignment -name VHDL_FILE rtl/sprom.vhd
set_global_assignment -name VHDL_FILE rtl/spram.vhd
@ -201,7 +200,7 @@ set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
# SignalTap II Assignments
# ========================
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name USE_SIGNALTAP_FILE output_files/sprite.stp
set_global_assignment -name USE_SIGNALTAP_FILE output_files/cpu.stp
# Power Estimation Assignments
# ============================
@ -273,4 +272,5 @@ set_global_assignment -name SIGNALTAP_FILE output_files/sp.stp
set_location_assignment PLL_1 -to pll|altpll_component|auto_generated|pll1
set_global_assignment -name SIGNALTAP_FILE output_files/tilemap.stp
set_global_assignment -name SIGNALTAP_FILE output_files/sprite.stp
set_global_assignment -name SIGNALTAP_FILE output_files/cpu.stp
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

134
Arcade_MiST/IremM62 Hardware/meta/Kung Fu Master.mra
View File

@ -1,10 +1,10 @@
<misterromdescription>
<name>Lode Runner</name>
<name>Kung Fu Master</name>
<mameversion>0216</mameversion>
<setname>kungfum</setname>
<manufacturer>Irem</manufacturer>
<rbf>iremm62</rbf>
<rom index="1"><part>1</part></rom>
<rom index="1"><part>4</part></rom>
<rom index="0" zip="kungfum.zip" md5="9e4c8423a33f0c5bf558d475d89e041a" type="merged|nonmerged">
<!-- CPU1, 128k -->
<part name="a-4e-c.bin"/>
@ -28,66 +28,80 @@
<part name="a-3h-.bin"/>
<!-- GFX1, 128k -->
<part name="g-4c-a.bin"/>
<part name="g-4d-a.bin"/>
<part name="g-4e-a.bin"/>
<part name="g-4e-a.bin"/>
<part name="g-4c-a.bin"/>
<part name="g-4d-a.bin"/>
<part name="g-4e-a.bin"/>
<part name="g-4e-a.bin"/>
<part name="g-4c-a.bin"/>
<part name="g-4d-a.bin"/>
<part name="g-4e-a.bin"/>
<part name="g-4e-a.bin"/>
<part name="g-4c-a.bin"/>
<part name="g-4d-a.bin"/>
<part name="g-4e-a.bin"/>
<part name="g-4e-a.bin"/>
<group width="32">
<part name="g-4c-a.bin"/>
<part name="g-4d-a.bin"/>
<part name="g-4e-a.bin"/>
<part name="g-4e-a.bin"/>
</group>
<group width="32">
<part name="g-4c-a.bin"/>
<part name="g-4d-a.bin"/>
<part name="g-4e-a.bin"/>
<part name="g-4e-a.bin"/>
</group>
<group width="32">
<part name="g-4c-a.bin"/>
<part name="g-4d-a.bin"/>
<part name="g-4e-a.bin"/>
<part name="g-4e-a.bin"/>
</group>
<group width="32">
<part name="g-4c-a.bin"/>
<part name="g-4d-a.bin"/>
<part name="g-4e-a.bin"/>
<part name="g-4e-a.bin"/>
</group>
<!-- GFX2, 256k -->
<part name="b-4k-.bin"/>
<part name="b-3n-.bin"/>
<part name="b-4c-.bin"/>
<part name="b-4c-.bin"/>
<part name="b-4f-.bin"/>
<part name="b-4n-.bin"/>
<part name="b-4e-.bin"/>
<part name="b-4e-.bin"/>
<part name="b-4l-.bin"/>
<part name="b-4m-.bin"/>
<part name="b-4d-.bin"/>
<part name="b-4d-.bin"/>
<part name="b-4h-.bin"/>
<part name="b-3m-.bin"/>
<part name="b-4a-.bin"/>
<part name="b-4a-.bin"/>
<part name="b-4k-.bin"/>
<part name="b-3n-.bin"/>
<part name="b-4c-.bin"/>
<part name="b-4c-.bin"/>
<part name="b-4f-.bin"/>
<part name="b-4n-.bin"/>
<part name="b-4e-.bin"/>
<part name="b-4e-.bin"/>
<part name="b-4l-.bin"/>
<part name="b-4m-.bin"/>
<part name="b-4d-.bin"/>
<part name="b-4d-.bin"/>
<part name="b-4h-.bin"/>
<part name="b-3m-.bin"/>
<part name="b-4a-.bin"/>
<part name="b-4a-.bin"/>
<group width="32">
<part name="b-4k-.bin"/>
<part name="b-3n-.bin"/>
<part name="b-4c-.bin"/>
<part name="b-4c-.bin"/>
</group>
<group width="32">
<part name="b-4f-.bin"/>
<part name="b-4n-.bin"/>
<part name="b-4e-.bin"/>
<part name="b-4e-.bin"/>
</group>
<group width="32">
<part name="b-4l-.bin"/>
<part name="b-4m-.bin"/>
<part name="b-4d-.bin"/>
<part name="b-4d-.bin"/>
</group>
<group width="32">
<part name="b-4h-.bin"/>
<part name="b-3m-.bin"/>
<part name="b-4a-.bin"/>
<part name="b-4a-.bin"/>
</group>
<group width="32">
<part name="b-4k-.bin"/>
<part name="b-3n-.bin"/>
<part name="b-4c-.bin"/>
<part name="b-4c-.bin"/>
</group>
<group width="32">
<part name="b-4f-.bin"/>
<part name="b-4n-.bin"/>
<part name="b-4e-.bin"/>
<part name="b-4e-.bin"/>
</group>
<group width="32">
<part name="b-4l-.bin"/>
<part name="b-4m-.bin"/>
<part name="b-4d-.bin"/>
<part name="b-4d-.bin"/>
</group>
<group width="32">
<part name="b-4h-.bin"/>
<part name="b-3m-.bin"/>
<part name="b-4a-.bin"/>
<part name="b-4a-.bin"/>
</group>
<!-- GFX3, 64k -->
<part repeat="0x10000">FF</part>

135
Arcade_MiST/IremM62 Hardware/meta/Lode Runner 2.mra Normal file
View File

@ -0,0 +1,135 @@
<misterromdescription>
<name>Lode Runner 2</name>
<mameversion>0216</mameversion>
<setname>ldrun2</setname>
<manufacturer>Irem</manufacturer>
<rbf>iremm62</rbf>
<rom index="1"><part>1</part></rom>
<rom index="0" zip="ldrun2.zip" md5="9e4c8423a33f0c5bf558d475d89e041a" type="merged|nonmerged">
<!-- CPU1, 128k -->
<part name="lr2-a-4e.a"/>
<part name="lr2-a-4d"/>
<part name="lr2-a-4a.a"/>
<part name="lr2-a-4a"/>
<part name="lr2-h-1c.a"/>
<part name="lr2-h-1d.a"/>
<part name="lr2-h-1d.a"/>
<part name="lr2-h-1d.a"/>
<part name="lr2-a-4e.a"/>
<part name="lr2-a-4d"/>
<part name="lr2-a-4a.a"/>
<part name="lr2-a-4a"/>
<part name="lr2-h-1c.a"/>
<part name="lr2-h-1d.a"/>
<part name="lr2-h-1d.a"/>
<part name="lr2-h-1d.a"/>
<!-- SND CPU2, 64k -->
<part name="lr2-a-3e"/>
<part name="lr2-a-3f"/>
<part name="lr2-a-3h"/>
<part name="lr2-a-3h"/>
<part name="lr2-a-3e"/>
<part name="lr2-a-3f"/>
<part name="lr2-a-3h"/>
<part name="lr2-a-3h"/>
<!-- GFX1, 128k -->
<group width="32">
<part name="lr2-h-1e"/>
<part name="lr2-h-1j"/>
<part name="lr2-h-1h"/>
<part name="lr2-h-1h"/>
</group>
<group width="32">
<part name="lr2-h-1e"/>
<part name="lr2-h-1j"/>
<part name="lr2-h-1h"/>
<part name="lr2-h-1h"/>
</group>
<group width="32">
<part name="lr2-h-1e"/>
<part name="lr2-h-1j"/>
<part name="lr2-h-1h"/>
<part name="lr2-h-1h"/>
</group>
<group width="32">
<part name="lr2-h-1e"/>
<part name="lr2-h-1j"/>
<part name="lr2-h-1h"/>
<part name="lr2-h-1h"/>
</group>
<!-- GFX2, 256k -->
<group width="32">
<part name="lr2-b-4k"/>
<part name="lr2-b-3n"/>
<part name="lr2-b-4c"/>
<part name="lr2-b-4c"/>
</group>
<group width="32">
<part name="lr2-b-4f"/>
<part name="lr2-b-4n"/>
<part name="lr2-b-4e"/>
<part name="lr2-b-4e"/>
</group>
<group width="32">
<part name="lr2-b-4k"/>
<part name="lr2-b-3n"/>
<part name="lr2-b-4c"/>
<part name="lr2-b-4c"/>
</group>
<group width="32">
<part name="lr2-b-4f"/>
<part name="lr2-b-4n"/>
<part name="lr2-b-4e"/>
<part name="lr2-b-4e"/>
</group>
<group width="32">
<part name="lr2-b-4k"/>
<part name="lr2-b-3n"/>
<part name="lr2-b-4c"/>
<part name="lr2-b-4c"/>
</group>
<group width="32">
<part name="lr2-b-4f"/>
<part name="lr2-b-4n"/>
<part name="lr2-b-4e"/>
<part name="lr2-b-4e"/>
</group>
<group width="32">
<part name="lr2-b-4k"/>
<part name="lr2-b-3n"/>
<part name="lr2-b-4c"/>
<part name="lr2-b-4c"/>
</group>
<group width="32">
<part name="lr2-b-4f"/>
<part name="lr2-b-4n"/>
<part name="lr2-b-4e"/>
<part name="lr2-b-4e"/>
</group>
<!-- GFX3, 64k -->
<part repeat="0x10000">FF</part>
<!-- spr_color_proms, 3*256b -->
<part name="lr2-b-1m"/>
<part name="lr2-b-1n"/>
<part name="lr2-b-1l"/>
<!-- chr_color_proms, 3*256b -->
<part name="lr2-h-3m"/>
<part name="lr2-h-3l"/>
<part name="lr2-h-3n"/>
<!-- fg_color_proms, 3*256b -->
<part repeat="0x300">FF</part>
<!-- spr_height_prom -->
<part name="lr2-b-5p"/>
</rom>
</misterromdescription>

87
Arcade_MiST/IremM62 Hardware/meta/Lode Runner 3.mra Normal file
View File

@ -0,0 +1,87 @@
<misterromdescription>
<name>Lode Runner 3</name>
<mameversion>0216</mameversion>
<setname>ldrun3</setname>
<manufacturer>Irem</manufacturer>
<rbf>iremm62</rbf>
<rom index="1"><part>2</part></rom>
<rom index="0" zip="ldrun3.zip" md5="9e4c8423a33f0c5bf558d475d89e041a" type="merged|nonmerged">
<!-- CPU1, 128k -->
<part name="lr3a4eb.bin"/>
<part name="lr3a4db.bin"/>
<part name="lr3a4bb.bin"/>
<part name="lr3a4bb.bin"/>
<part name="lr3a4eb.bin"/>
<part name="lr3a4db.bin"/>
<part name="lr3a4bb.bin"/>
<part name="lr3a4bb.bin"/>
<!-- SND CPU2, 64k -->
<part name="lr3-a-3d"/>
<part name="lr3-a-3f"/>
<part name="lr3-a-3d"/>
<part name="lr3-a-3f"/>
<!-- GFX1, 128k -->
<group width="32">
<part name="lr3-n-2a"/>
<part name="lr3-n-2c"/>
<part name="lr3-n-2b"/>
<part name="lr3-n-2b"/>
</group>
<group width="32">
<part name="lr3-n-2a"/>
<part name="lr3-n-2c"/>
<part name="lr3-n-2b"/>
<part name="lr3-n-2b"/>
</group>
<!-- GFX2, 256k -->
<group width="32">
<part name="lr3b4kb.bin"/>
<part name="lr3b3nb.bin"/>
<part name="snxb4cb.bin"/>
<part name="snxb4cb.bin"/>
</group>
<group width="32">
<part name="snxb4fb.bin"/>
<part name="snxb4nb.bin"/>
<part name="snxb4eb.bin"/>
<part name="snxb4eb.bin"/>
</group>
<group width="32">
<part name="lr3b4kb.bin"/>
<part name="lr3b3nb.bin"/>
<part name="snxb4cb.bin"/>
<part name="snxb4cb.bin"/>
</group>
<group width="32">
<part name="snxb4fb.bin"/>
<part name="snxb4nb.bin"/>
<part name="snxb4eb.bin"/>
<part name="snxb4eb.bin"/>
</group>
<!-- GFX3, 64k -->
<part repeat="0x10000">FF</part>
<!-- spr_color_proms, 3*256b -->
<part name="lr3-b-1m"/>
<part name="lr3-b-1n"/>
<part name="lr3-b-1l"/>
<!-- chr_color_proms, 3*256b -->
<part name="lr3-n-2l"/>
<part name="lr3-n-2k"/>
<part name="lr3-n-2m"/>
<!-- fg_color_proms, 3*256b -->
<part repeat="0x300">FF</part>
<!-- spr_height_prom -->
<part name="lr3-b-5p"/>
</rom>
</misterromdescription>

85
Arcade_MiST/IremM62 Hardware/meta/Lode Runner 4.mra Normal file
View File

@ -0,0 +1,85 @@
<misterromdescription>
<name>Lode Runner 4</name>
<mameversion>0216</mameversion>
<setname>ldrun4</setname>
<manufacturer>Irem</manufacturer>
<rbf>iremm62</rbf>
<rom index="1"><part>3</part></rom>
<rom index="0" zip="ldrun4.zip" md5="9e4c8423a33f0c5bf558d475d89e041a" type="merged|nonmerged">
<!-- CPU1, 128k -->
<part name="lr4-a-4e"/>
<part name="lr4-a-4d.c"/>
<part name="lr4-v-4k"/>
<part name="lr4-a-4e"/>
<part name="lr4-a-4d.c"/>
<part name="lr4-v-4k"/>
<!-- SND CPU2, 64k -->
<part name="lr4-a-3d"/>
<part name="lr4-a-3f"/>
<part name="lr4-a-3d"/>
<part name="lr4-a-3f"/>
<!-- GFX1, 128k -->
<group width="32">
<part name="lr4-v-2b"/>
<part name="lr4-v-2d"/>
<part name="lr4-v-2c"/>
<part name="lr4-v-2c"/>
</group>
<group width="32">
<part name="lr4-v-2b"/>
<part name="lr4-v-2d"/>
<part name="lr4-v-2c"/>
<part name="lr4-v-2c"/>
</group>
<!-- GFX2, 256k -->
<group width="32">
<part name="lr4-b-4k"/>
<part name="lr4-b-3n"/>
<part name="lr4-b-4c"/>
<part name="lr4-b-4c"/>
</group>
<group width="32">
<part name="lr4-b-4f"/>
<part name="lr4-b-4n"/>
<part name="lr4-b-4e"/>
<part name="lr4-b-4e"/>
</group>
<group width="32">
<part name="lr4-b-4k"/>
<part name="lr4-b-3n"/>
<part name="lr4-b-4c"/>
<part name="lr4-b-4c"/>
</group>
<group width="32">
<part name="lr4-b-4f"/>
<part name="lr4-b-4n"/>
<part name="lr4-b-4e"/>
<part name="lr4-b-4e"/>
</group>
<!-- GFX3, 64k -->
<part repeat="0x10000">FF</part>
<!-- spr_color_proms, 3*256b -->
<part name="lr4-b-1m"/>
<part name="lr4-b-1n"/>
<part name="lr4-b-1l"/>
<!-- chr_color_proms, 3*256b -->
<part name="lr4-v-1m"/>
<part name="lr4-v-1n"/>
<part name="lr4-v-1p"/>
<!-- fg_color_proms, 3*256b -->
<part repeat="0x300">FF</part>
<!-- spr_height_prom -->
<part name="lr4-b-5p"/>
</rom>
</misterromdescription>

121
Arcade_MiST/IremM62 Hardware/meta/Lode Runner.mra
View File

@ -35,57 +35,80 @@
<part name="lr-a-3h"/>
<!-- GFX1, 128k -->
<part name="lr-e-2d"/>
<part name="lr-e-2j"/>
<part name="lr-e-2f"/>
<part name="lr-e-2f"/>
<part name="lr-e-2d"/>
<part name="lr-e-2j"/>
<part name="lr-e-2f"/>
<part name="lr-e-2f"/>
<part name="lr-e-2d"/>
<part name="lr-e-2j"/>
<part name="lr-e-2f"/>
<part name="lr-e-2f"/>
<part name="lr-e-2d"/>
<part name="lr-e-2j"/>
<part name="lr-e-2f"/>
<part name="lr-e-2f"/>
<group width="32">
<part name="lr-e-2d"/>
<part name="lr-e-2j"/>
<part name="lr-e-2f"/>
<part name="lr-e-2f"/>
</group>
<group width="32">
<part name="lr-e-2d"/>
<part name="lr-e-2j"/>
<part name="lr-e-2f"/>
<part name="lr-e-2f"/>
</group>
<group width="32">
<part name="lr-e-2d"/>
<part name="lr-e-2j"/>
<part name="lr-e-2f"/>
<part name="lr-e-2f"/>
</group>
<group width="32">
<part name="lr-e-2d"/>
<part name="lr-e-2j"/>
<part name="lr-e-2f"/>
<part name="lr-e-2f"/>
</group>
<!-- GFX2, 256k -->
<part name="lr-b-4k"/>
<part name="lr-b-3n"/>
<part name="lr-b-4c"/>
<part name="lr-b-4c"/>
<part name="lr-b-4k"/>
<part name="lr-b-3n"/>
<part name="lr-b-4c"/>
<part name="lr-b-4c"/>
<part name="lr-b-4k"/>
<part name="lr-b-3n"/>
<part name="lr-b-4c"/>
<part name="lr-b-4c"/>
<part name="lr-b-4k"/>
<part name="lr-b-3n"/>
<part name="lr-b-4c"/>
<part name="lr-b-4c"/>
<part name="lr-b-4k"/>
<part name="lr-b-3n"/>
<part name="lr-b-4c"/>
<part name="lr-b-4c"/>
<part name="lr-b-4k"/>
<part name="lr-b-3n"/>
<part name="lr-b-4c"/>
<part name="lr-b-4c"/>
<part name="lr-b-4k"/>
<part name="lr-b-3n"/>
<part name="lr-b-4c"/>
<part name="lr-b-4c"/>
<part name="lr-b-4k"/>
<part name="lr-b-3n"/>
<part name="lr-b-4c"/>
<part name="lr-b-4c"/>
<group width="32">
<part name="lr-b-4k"/>
<part name="lr-b-3n"/>
<part name="lr-b-4c"/>
<part name="lr-b-4c"/>
</group>
<group width="32">
<part name="lr-b-4k"/>
<part name="lr-b-3n"/>
<part name="lr-b-4c"/>
<part name="lr-b-4c"/>
</group>
<group width="32">
<part name="lr-b-4k"/>
<part name="lr-b-3n"/>
<part name="lr-b-4c"/>
<part name="lr-b-4c"/>
</group>
<group width="32">
<part name="lr-b-4k"/>
<part name="lr-b-3n"/>
<part name="lr-b-4c"/>
<part name="lr-b-4c"/>
</group>
<group width="32">
<part name="lr-b-4k"/>
<part name="lr-b-3n"/>
<part name="lr-b-4c"/>
<part name="lr-b-4c"/>
</group>
<group width="32">
<part name="lr-b-4k"/>
<part name="lr-b-3n"/>
<part name="lr-b-4c"/>
<part name="lr-b-4c"/>
</group>
<group width="32">
<part name="lr-b-4k"/>
<part name="lr-b-3n"/>
<part name="lr-b-4c"/>
<part name="lr-b-4c"/>
</group>
<group width="32">
<part name="lr-b-4k"/>
<part name="lr-b-3n"/>
<part name="lr-b-4c"/>
<part name="lr-b-4c"/>
</group>
<!-- GFX3, 64k -->
<part repeat="0x10000">FF</part>

8
Arcade_MiST/IremM62 Hardware/rtl/Graphics.VHD
View File

@ -71,7 +71,11 @@ begin
graphics_o.vblank <= video_o_s.vblank;
--graphics_o.vblank <= from_video_ctl.vblank;
irem62_hsize <= 384+16 when hwsel = HW_LDRUN else 256+16;
irem62_hsize <= 384+16 when hwsel = HW_LDRUN or
hwsel = HW_LDRUN2 or
hwsel = HW_LDRUN3 or
hwsel = HW_LDRUN4 else
256+16;
pace_video_controller_inst : entity work.pace_video_controller
generic map
@ -204,6 +208,7 @@ begin
port map
(
reset => video_i.reset,
hwsel => hwsel,
video_ctl => from_video_ctl,
@ -225,6 +230,7 @@ begin
port map
(
reset => video_i.reset,
hwsel => hwsel,
video_ctl => from_video_ctl,

8
Arcade_MiST/IremM62 Hardware/rtl/IremM62_MiST.sv
View File

@ -99,7 +99,7 @@ user_io(
.status (status )
);
wire [14:0] rom_addr;
wire [16:0] rom_addr;
wire [15:0] rom_do;
wire [17:0] snd_addr;
@ -163,7 +163,7 @@ sdram sdram(
.port1_d ( {ioctl_dout, ioctl_dout} ),
.port1_q ( ),
.cpu1_addr ( ioctl_downl ? 17'h1ffff : {3'b000, rom_addr[14:1]} ),
.cpu1_addr ( ioctl_downl ? 17'h1ffff : {1'b0, rom_addr[16:1]} ),
.cpu1_q ( rom_do ),
.cpu2_addr ( ioctl_downl ? 17'h1ffff : snd_addr[17:1] ),
.cpu2_q ( snd_do ),
@ -171,8 +171,8 @@ sdram sdram(
// port2 for sprite graphics
.port2_req ( port2_req ),
.port2_ack ( ),
.port2_a ( {sp_ioctl_addr[23:15], sp_ioctl_addr[12:0], sp_ioctl_addr[14]} ), // merge sprite roms to 32-bit wide words
.port2_ds ( {sp_ioctl_addr[13], ~sp_ioctl_addr[13]} ),
.port2_a ( sp_ioctl_addr[23:1] ),
.port2_ds ( {sp_ioctl_addr[0], ~sp_ioctl_addr[0]} ),
.port2_we ( ioctl_downl ),
.port2_d ( {ioctl_dout, ioctl_dout} ),
.port2_q ( ),

135
Arcade_MiST/IremM62 Hardware/rtl/dprom_2r.vhd
View File

@ -1,135 +0,0 @@
LIBRARY ieee;
USE ieee.std_logic_1164.all;
LIBRARY altera_mf;
USE altera_mf.all;
ENTITY dprom_2r IS
GENERIC
(
INIT_FILE : string := "";
--NUMWORDS_A : natural;
WIDTHAD_A : natural;
WIDTH_A : natural := 8;
--NUMWORDS_B : natural;
WIDTHAD_B : natural;
WIDTH_B : natural := 8;
outdata_reg_a : string := "UNREGISTERED";
outdata_reg_b : string := "UNREGISTERED"
);
PORT
(
address_a : in std_logic_vector (WIDTHAD_A-1 downto 0);
address_b : in std_logic_vector (WIDTHAD_B-1 downto 0);
clock : in std_logic ;
q_a : out std_logic_vector (WIDTH_A-1 downto 0);
q_b : out std_logic_vector (WIDTH_B-1 downto 0)
);
END dprom_2r;
ARCHITECTURE SYN OF dprom_2r IS
SIGNAL sub_wire0 : STD_LOGIC_VECTOR (WIDTH_A-1 DOWNTO 0);
SIGNAL sub_wire1 : STD_LOGIC_VECTOR (WIDTH_B-1 DOWNTO 0);
SIGNAL sub_wire2 : STD_LOGIC ;
SIGNAL sub_wire3_bv : BIT_VECTOR (WIDTH_A-1 DOWNTO 0);
SIGNAL sub_wire3 : STD_LOGIC_VECTOR (WIDTH_A-1 DOWNTO 0);
SIGNAL sub_wire4_bv : BIT_VECTOR (WIDTH_B-1 DOWNTO 0);
SIGNAL sub_wire4 : STD_LOGIC_VECTOR (WIDTH_B-1 DOWNTO 0);
COMPONENT altsyncram
GENERIC (
address_reg_b : STRING;
clock_enable_input_a : STRING;
clock_enable_input_b : STRING;
clock_enable_output_a : STRING;
clock_enable_output_b : STRING;
indata_reg_b : STRING;
init_file : STRING;
init_file_layout : STRING;
intended_device_family : STRING;
lpm_type : STRING;
numwords_a : NATURAL;
numwords_b : NATURAL;
operation_mode : STRING;
outdata_aclr_a : STRING;
outdata_aclr_b : STRING;
outdata_reg_a : STRING;
outdata_reg_b : STRING;
power_up_uninitialized : STRING;
ram_block_type : STRING;
widthad_a : NATURAL;
widthad_b : NATURAL;
width_a : NATURAL;
width_b : NATURAL;
width_byteena_a : NATURAL;
width_byteena_b : NATURAL;
wrcontrol_wraddress_reg_b : STRING
);
PORT (
wren_a : IN STD_LOGIC ;
wren_b : IN STD_LOGIC ;
clock0 : IN STD_LOGIC ;
address_a : IN STD_LOGIC_VECTOR (WIDTHAD_A-1 DOWNTO 0);
address_b : IN STD_LOGIC_VECTOR (WIDTHAD_B-1 DOWNTO 0);
q_a : OUT STD_LOGIC_VECTOR (WIDTH_A-1 DOWNTO 0);
q_b : OUT STD_LOGIC_VECTOR (WIDTH_B-1 DOWNTO 0);
data_a : IN STD_LOGIC_VECTOR (WIDTH_A-1 DOWNTO 0);
data_b : IN STD_LOGIC_VECTOR (WIDTH_B-1 DOWNTO 0)
);
END COMPONENT;
BEGIN
sub_wire2 <= '0';
sub_wire3_bv(WIDTH_A-1 DOWNTO 0) <= (others => '0');
sub_wire3 <= To_stdlogicvector(sub_wire3_bv);
sub_wire4_bv(WIDTH_B-1 DOWNTO 0) <= (others => '0');
sub_wire4 <= To_stdlogicvector(sub_wire4_bv);
q_a <= sub_wire0(WIDTH_A-1 DOWNTO 0);
q_b <= sub_wire1(WIDTH_B-1 DOWNTO 0);
altsyncram_component : altsyncram
GENERIC MAP (
address_reg_b => "CLOCK0",
clock_enable_input_a => "BYPASS",
clock_enable_input_b => "BYPASS",
clock_enable_output_a => "BYPASS",
clock_enable_output_b => "BYPASS",
indata_reg_b => "CLOCK0",
init_file => INIT_FILE,
init_file_layout => "PORT_A",
intended_device_family => "Cyclone III",
lpm_type => "altsyncram",
numwords_a => 2**WIDTHAD_A,
numwords_b => 2**WIDTHAD_B,
operation_mode => "BIDIR_DUAL_PORT",
outdata_aclr_a => "NONE",
outdata_aclr_b => "NONE",
outdata_reg_a => outdata_reg_a,
outdata_reg_b => outdata_reg_b,
power_up_uninitialized => "FALSE",
ram_block_type => "M9K",
widthad_a => WIDTHAD_A,
widthad_b => WIDTHAD_B,
width_a => WIDTH_A,
width_b => WIDTH_B,
width_byteena_a => 1,
width_byteena_b => 1,
wrcontrol_wraddress_reg_b => "CLOCK0"
)
PORT MAP (
wren_a => sub_wire2,
wren_b => sub_wire2,
clock0 => clock,
address_a => address_a,
address_b => address_b,
data_a => sub_wire3,
data_b => sub_wire4,
q_a => sub_wire0,
q_b => sub_wire1
);
END SYN;

2
Arcade_MiST/IremM62 Hardware/rtl/pace.vhd
View File

@ -43,7 +43,7 @@ entity PACE is
dl_data : in std_logic_vector(7 downto 0);
dl_wr : in std_logic;
cpu_rom_addr : out std_logic_vector(14 downto 0);
cpu_rom_addr : out std_logic_vector(16 downto 0);
cpu_rom_do : in std_logic_vector(7 downto 0);
gfx1_addr : out std_logic_vector(17 downto 2);
gfx1_do : in std_logic_vector(31 downto 0);

91
Arcade_MiST/IremM62 Hardware/rtl/platform.vhd
View File

@ -59,7 +59,7 @@ entity platform is
dl_data : in std_logic_vector(7 downto 0);
dl_wr : in std_logic;
cpu_rom_addr : out std_logic_vector(14 downto 0);
cpu_rom_addr : out std_logic_vector(16 downto 0);
cpu_rom_do : in std_logic_vector(7 downto 0);
gfx1_addr : out std_logic_vector(17 downto 2);
gfx1_do : in std_logic_vector(31 downto 0);
@ -126,6 +126,15 @@ architecture SYN of platform is
signal pause : std_logic;
signal rot_en : std_logic;
-- Lode Runner 2,4
signal ld2_bankr1 : std_logic_vector(5 downto 0);
signal ld2_bankr2 : std_logic_vector(7 downto 0);
signal ld24_bank : std_logic;
-- Lode Runner 3
signal ld3_prot5_cs : std_logic;
signal ld3_prot7_cs : std_logic;
begin
-- handle special keys
@ -164,7 +173,12 @@ begin
-- chip select logic
-- ROM $0000-$7FFF
rom_cs <= '1' when STD_MATCH(cpu_a, "0---------------") else '0';
-- $0000-$9FFF - LDRUN2
-- $0000-$BFFF - LDRUN3,4
rom_cs <= '1' when STD_MATCH(cpu_a, "0---------------") else
'1' when hwsel = HW_LDRUN2 and cpu_a(15 downto 13) = "100" else
'1' when (hwsel = HW_LDRUN3 or hwsel = HW_LDRUN4) and cpu_a(15 downto 14) = "10" else
'0';
-- SPRITE $C000-$C0FF
sprite_cs <= '1' when STD_MATCH(cpu_a, X"C0"& "--------") else '0';
-- VRAM/CRAM $D000-$DFFF
@ -189,6 +203,10 @@ begin
'1' when STD_MATCH(cpu_a(7 downto 0), X"04") else
'0';
-- Lode Runner 3 protection
ld3_prot5_cs <= '1' when hwsel = HW_LDRUN3 and cpu_a = x"c800" else '0';
ld3_prot7_cs <= '1' when hwsel = HW_LDRUN3 and (cpu_a = x"cc00" or cpu_a = x"cfff") else '0';
process (clk_sys, rst_sys) begin
if rst_sys = '1' then
sound_data_o <= X"FF";
@ -201,6 +219,8 @@ begin
-- memory read mux
cpu_d_i <= in_d_o when (cpu_io_rd = '1' and in_cs = '1') else
x"05" when ld3_prot5_cs = '1' else
x"07" when ld3_prot7_cs = '1' else
cpu_rom_do when rom_cs = '1' else
vram_d_o when vram_cs = '1' else
cram_d_o when cram_cs = '1' else
@ -265,10 +285,50 @@ begin
nmi => '0'
);
cpu_rom_addr <= cpu_a(14 downto 0);
cpu_rom_addr <=
'0' & "10" & ld24_bank & cpu_a(12 downto 0) when hwsel = HW_LDRUN2 and cpu_a(15) = '1' else
'0' & '1' & ld24_bank & cpu_a(13 downto 0) when hwsel = HW_LDRUN4 and cpu_a(15) = '1' else
'0' & cpu_a(15 downto 0);
-- Lode Runner 2 bank switching - some kind of protection, only the level number is used to select bank 0 or 1 at $8000
-- writes to $80 (level number)
-- writes to $81 (unknown, from a table)
-- reads from $80 (number of times from a table)
process (clk_sys, rst_sys)
begin
if rst_sys = '1' then
ld2_bankr1 <= (others => '0');
ld2_bankr2 <= (others => '0');
ld24_bank <= '0';
elsif rising_edge(clk_sys) then
if cpu_clk_en = '1' and cpu_io_wr = '1' then
case cpu_a(7 downto 0) is
when X"80" => ld2_bankr1 <= cpu_d_o(5 downto 0);
when X"81" => ld2_bankr2 <= cpu_d_o;
when others => null;
end case;
end if;
if cpu_clk_en = '1' and cpu_io_rd = '1' and cpu_a(7 downto 0) = x"80" then
if ld2_bankr1 = 6 or ld2_bankr1 = 8 or ld2_bankr1 = 12 or ld2_bankr1 = 13 or ld2_bankr1 = 14 or ld2_bankr1 = 15 or ld2_bankr1 = 16 or
ld2_bankr1 = 21 or ld2_bankr1 >= 23
then
ld24_bank <= '1';
else
ld24_bank <= '0';
end if;
end if;
if cpu_clk_en = '1' and cpu_mem_wr = '1' then
if cpu_a = x"c800" and hwsel = HW_LDRUN4 then
ld24_bank <= cpu_d_o(0);
end if;
end if;
end if;
end process;
end block BLK_CPU;
BLK_INTERRUPTS : block
signal vblank_int : std_logic;
@ -317,11 +377,15 @@ begin
BLK_SCROLL : block
signal m62_hscroll : std_logic_vector(15 downto 0);
signal m62_vscroll : std_logic_vector(15 downto 0);
signal m62_topbottom_mask: std_logic;
begin
process (clk_sys, rst_sys)
begin
if rst_sys = '1' then
m62_hscroll <= (others => '0');
m62_vscroll <= (others => '0');
m62_topbottom_mask <= '0';
elsif rising_edge(clk_sys) then
if cpu_clk_en = '1' and cpu_mem_wr = '1' then
case cpu_a is
@ -337,9 +401,26 @@ begin
null;
end case;
end if; -- cpu_wr
if cpu_clk_en = '1' and cpu_io_wr = '1' then
if hwsel = HW_LDRUN3 and cpu_a(7 downto 0) = x"80" then
m62_vscroll(7 downto 0) <= cpu_d_o;
end if;
if hwsel = HW_LDRUN3 and cpu_a(7 downto 0) = x"81" then
m62_topbottom_mask <= cpu_d_o(0);
end if;
if hwsel = HW_LDRUN4 and cpu_a(7 downto 0) = x"82" then
m62_hscroll(15 downto 8) <= cpu_d_o;
end if;
if hwsel = HW_LDRUN4 and cpu_a(7 downto 0) = x"83" then
m62_hscroll(7 downto 0) <= cpu_d_o;
end if;
end if;
end if; -- rising_edge(clk_sys)
end process;
graphics_o.bit16(0) <= m62_hscroll;
graphics_o.bit16(1) <= m62_vscroll;
end block BLK_SCROLL;
@ -353,7 +434,7 @@ begin
begin
-- external background ROMs
gfx1_addr <= "000"&tilemap_i(1).tile_a(12 downto 0);
gfx1_addr <= "00"&tilemap_i(1).tile_a(13 downto 0);
tilemap_o(1).tile_d(23 downto 0) <= gfx1_do(7 downto 0) & gfx1_do(15 downto 8) & gfx1_do(23 downto 16);
-- internal background ROMs

7
Arcade_MiST/IremM62 Hardware/rtl/platform_variant_pkg.vhd
View File

@ -10,8 +10,11 @@ package platform_variant_pkg is
constant HW_LDRUN : integer := 0;
constant HW_KUNGFUM : integer := 1;
constant HW_BATTROAD : integer := 2;
constant HW_LDRUN2 : integer := 1;
constant HW_LDRUN3 : integer := 2;
constant HW_LDRUN4 : integer := 3;
constant HW_KUNGFUM : integer := 4;
constant HW_BATTROAD : integer := 5;
type rom_a is array (natural range <>) of string;

3
Arcade_MiST/IremM62 Hardware/rtl/spritectl.vhd
View File

@ -175,6 +175,9 @@ begin
end if;
if hwsel = HW_LDRUN or
hwsel = HW_LDRUN2 or
hwsel = HW_LDRUN3 or
hwsel = HW_LDRUN4 or
hwsel = HW_BATTROAD then
pal_i := '0' & reg_i.colour(3 downto 0) & pel;
else

2
Arcade_MiST/IremM62 Hardware/rtl/target_top.vhd
View File

@ -44,7 +44,7 @@ entity target_top is port(
dl_data : in std_logic_vector(7 downto 0);
dl_wr : in std_logic;
cpu_rom_addr : out std_logic_vector(14 downto 0);
cpu_rom_addr : out std_logic_vector(16 downto 0);
cpu_rom_do : in std_logic_vector(7 downto 0);
snd_rom_addr : out std_logic_vector(13 downto 0);
snd_rom_do : in std_logic_vector(7 downto 0);

13
Arcade_MiST/IremM62 Hardware/rtl/tilemapctl.vhd
View File

@ -22,6 +22,7 @@ entity tilemapCtl is
port
(
reset : in std_logic;
hwsel : in integer;
-- video control signals
video_ctl : in from_VIDEO_CTL_t;
@ -47,6 +48,7 @@ architecture TILEMAP_1 of tilemapCtl is
alias rot_en : std_logic is graphics_i.bit8(0)(0);
alias hscroll : std_logic_vector(15 downto 0) is graphics_i.bit16(0);
alias vscroll : std_logic_vector(15 downto 0) is graphics_i.bit16(1);
begin
@ -55,14 +57,14 @@ begin
-- not used
ctl_o.map_a(ctl_o.map_a'left downto 11) <= (others => '0');
ctl_o.attr_a(ctl_o.attr_a'left downto 11) <= (others => '0');
ctl_o.tile_a(ctl_o.tile_a'left downto 13) <= (others => '0');
ctl_o.tile_a(ctl_o.tile_a'left downto 14) <= (others => '0');
-- screen rotation
x <= std_logic_vector(video_ctl.video_h_offset + unsigned(video_ctl.x)) when unsigned(y) < 6*8 else
x <= std_logic_vector(video_ctl.video_h_offset + unsigned(video_ctl.x)) when unsigned(y) < 6*8 and HWSEL = HW_KUNGFUM else
std_logic_vector(video_ctl.video_h_offset + unsigned(video_ctl.x) + unsigned(hscroll(8 downto 0)));
-- when rot_en = '0' else not video_ctl.y;
--y <= not video_ctl.y when rot_en = '0' else 32 + video_ctl.x;
y <= video_ctl.y; -- when rot_en = '0' else video_ctl.x;
y <= std_logic_vector(unsigned(video_ctl.y) + unsigned(vscroll(8 downto 0))); -- when rot_en = '0' else video_ctl.x;
-- generate pixel
process (clk, clk_ena)
@ -86,6 +88,11 @@ begin
-- 2nd stage of pipeline
-- - set tile address
if x(2 downto 0) = "010" then
if hwsel = HW_LDRUN4 then
ctl_o.tile_a(13) <= ctl_i.attr_d(5);
else
ctl_o.tile_a(13) <= '0';
end if;
ctl_o.tile_a(12 downto 11) <= ctl_i.attr_d(7 downto 6);
ctl_o.tile_a(10 downto 3) <= ctl_i.map_d(7 downto 0);
ctl_o.tile_a(2 downto 0) <= y(2 downto 0);

3
Arcade_MiST/IremM62 Hardware/rtl/video_controller.vhd
View File

@ -44,7 +44,7 @@ architecture SYN of pace_video_controller is
constant SIM_DELAY : time := 2 ns;
signal VIDEO_H_SIZE : integer := H_SIZE * H_SCALE;
signal VIDEO_H_SIZE : integer;
constant VIDEO_V_SIZE : integer := V_SIZE * V_SCALE;
subtype reg_t is integer range 0 to 2047;
@ -100,6 +100,7 @@ architecture SYN of pace_video_controller is
begin
VIDEO_H_SIZE <= H_SIZE * H_SCALE;
video_ctl_o.video_h_offset <= to_integer(shift_right(to_unsigned(512-VIDEO_H_SIZE, 9), 1));
-- registers