// Copyright Jamie Iles, 2017
//
// This file is part of s80x86.
//
// s80x86 is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// s80x86 is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with s80x86.  If not, see <http://www.gnu.org/licenses/>.

divf6_reg:
    width W8, a_sel RA, alu_op SELA, mdr_write, jmp do_div8;
divf6_mem:
    width W8, segment DS, mem_read, jmp do_div8;
do_div8:
    ra_sel AX;
    // Divisor in MDR, dividend in DX:TMP
    a_sel RA, alu_op SELA, tmp_wr_en;
    width W8, alu_op DIV;
div8_complete:
    width W8, reg_wr_source QUOTIENT, rd_sel_source MICROCODE_RD_SEL, rd_sel AL;
    width W8, reg_wr_source REMAINDER, rd_sel_source MICROCODE_RD_SEL,
        rd_sel AH, next_instruction;

divf7_reg:
    a_sel RA, alu_op SELA, mdr_write, ra_sel AX, jmp do_div16;
divf7_mem:
    segment DS, mem_read, ra_sel AX, jmp do_div16;
do_div16:
    // Divisor in MDR, dividend in DX:TMP
    a_sel RA, alu_op SELA, tmp_wr_en, ra_sel DX;
    ra_sel DX, alu_op DIV;
div16_complete:
    reg_wr_source QUOTIENT, rd_sel_source MICROCODE_RD_SEL, rd_sel AX;
    reg_wr_source REMAINDER, rd_sel_source MICROCODE_RD_SEL, rd_sel DX,
        next_instruction;

idivf6_reg:
    width W8, a_sel RA, alu_op SELA, mdr_write, jmp do_idiv8;
idivf6_mem:
    width W8, segment DS, mem_read, jmp do_idiv8;
do_idiv8:
    ra_sel AX;
    // divisor in MDR, dividend in DX:TMP
    a_sel RA, alu_op SELA, tmp_wr_en;
    width W8, alu_op IDIV, jmp div8_complete;

idivf7_reg:
    a_sel RA, alu_op SELA, mdr_write, ra_sel AX, jmp do_idiv16;
idivf7_mem:
    segment DS, mem_read, ra_sel AX, jmp do_idiv16;
do_idiv16:
    // divisor in MDR, dividend in DX:TMP
    a_sel RA, alu_op SELA, tmp_wr_en, ra_sel DX;
    ra_sel DX, alu_op IDIV, jmp div16_complete;

.at 0xd4;
    width W8, ra_modrm_rm_reg, b_sel IMMEDIATE, alu_op SELB, mdr_write, jmp do_aam;
.auto_address;
do_aam:
    width W8, ra_sel AL;
    // divisor in MDR, dividend in DX:TMP
    a_sel RA, alu_op SELA, tmp_wr_en;
    width W8, alu_op DIV;
    width W8, reg_wr_source QUOTIENT, rd_sel_source MICROCODE_RD_SEL, rd_sel AH;
    width W8, reg_wr_source REMAINDER, rd_sel_source MICROCODE_RD_SEL,
        rd_sel AL;
    ra_sel AX;
    a_sel RA, b_sel IMMEDIATE, immediate 0x0, alu_op ADD,
        update_flags SF ZF PF, next_instruction;