mirror of
https://github.com/Gehstock/Mist_FPGA.git
synced 2026-01-13 15:17:55 +00:00
311 lines
8.6 KiB
Systemverilog
311 lines
8.6 KiB
Systemverilog
module Freeze (
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output LED,
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output [5:0] VGA_R,
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output [5:0] VGA_G,
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output [5:0] VGA_B,
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output VGA_HS,
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output VGA_VS,
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output AUDIO_L,
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output AUDIO_R,
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input SPI_SCK,
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output SPI_DO,
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input SPI_DI,
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input SPI_SS2,
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input SPI_SS3,
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input CONF_DATA0,
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input CLOCK_27,
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output [12:0] SDRAM_A,
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inout [15:0] SDRAM_DQ,
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output SDRAM_DQML,
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output SDRAM_DQMH,
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output SDRAM_nWE,
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output SDRAM_nCAS,
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output SDRAM_nRAS,
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output SDRAM_nCS,
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output [1:0] SDRAM_BA,
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output SDRAM_CLK,
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output SDRAM_CKE
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);
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`include "rtl\build_id.v"
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localparam CONF_STR = {
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"Freeze;;",
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"O2,Rotate Controls,Off,On;",
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"O34,Scanlines,Off,25%,50%,75%;",
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"O5,Blend,Off,On;",
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"O6,Joystick Swap,Off,On;",
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// "OOR,CRT H adjust,0,+1,+2,+3,+4,+5,+6,+7,-8,-7,-6,-5,-4,-3,-2,-1;",
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// "OSV,CRT V adjust,0,+1,+2,+3,+4,+5,+6,+7,-8,-7,-6,-5,-4,-3,-2,-1;",
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// "OC,Monochrome,Off,On;",
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// "O7,Service,Off,On;",
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"T0,Reset;",
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"V,v1.00.",`BUILD_DATE
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};
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wire rotate = status[2];
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wire [1:0] scanlines = status[4:3];
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wire blend = status[5];
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wire joyswap = status[6];
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//wire service = status[7];
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wire [1:0] orientation = 2'b01;
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assign LED = ~ioctl_downl;
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assign AUDIO_R = AUDIO_L;
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assign SDRAM_CLK = ~clock_48;
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assign SDRAM_CKE = 1;
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wire [63:0] status;
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wire [1:0] buttons;
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wire [1:0] switches;
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wire [11:0] kbjoy;
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wire [31:0] joystick_0;
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wire [31:0] joystick_1;
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wire scandoublerD;
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wire ypbpr;
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wire no_csync;
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wire [9:0] audio;
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wire hs, vs, cs;
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wire hb, vb;
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wire blankn = ~(hb | vb);
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wire [2:0] r, g;
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wire [1:0] b;
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wire key_strobe;
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wire key_pressed;
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wire [7:0] key_code;
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wire ioctl_downl;
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wire [7:0] ioctl_index;
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wire ioctl_wr;
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wire [24:0] ioctl_addr;
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wire [7:0] ioctl_dout;
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reg reset = 1;
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reg rom_loaded = 0;
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always @(posedge clock_24) begin
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reg ioctl_downlD;
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ioctl_downlD <= ioctl_downl;
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if (ioctl_downlD & ~ioctl_downl) rom_loaded <= 1;
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reset <= status[0] | buttons[1] | ~rom_loaded;
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end
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wire clock_24, clock_48, pll_locked;
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pll pll(
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.inclk0(CLOCK_27),
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.c0(clock_48),//48 MHz
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.c1(clock_24),//24 MHz
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.locked(pll_locked)
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);
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data_io data_io(
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.clk_sys ( clock_48 ),
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.SPI_SCK ( SPI_SCK ),
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.SPI_SS2 ( SPI_SS2 ),
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.SPI_DI ( SPI_DI ),
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.ioctl_download( ioctl_downl ),
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.ioctl_index ( ioctl_index ),
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.ioctl_wr ( ioctl_wr ),
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.ioctl_addr ( ioctl_addr ),
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.ioctl_dout ( ioctl_dout )
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);
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mist_video #(.COLOR_DEPTH(3), .SD_HCNT_WIDTH(9)) mist_video(
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.clk_sys ( clock_24 ),
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.SPI_SCK ( SPI_SCK ),
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.SPI_SS3 ( SPI_SS3 ),
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.SPI_DI ( SPI_DI ),
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.R ( blankn ? r : 3'b0),
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.G ( blankn ? g : 3'b0),
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.B ( blankn ? {b[1],b} : 3'b0),
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.HSync ( hs ),
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.VSync ( vs ),
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.VGA_R ( VGA_R ),
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.VGA_G ( VGA_G ),
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.VGA_B ( VGA_B ),
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.VGA_VS ( VGA_VS ),
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.VGA_HS ( VGA_HS ),
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.ce_divider ( 0 ),
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.rotate ( { orientation[1], rotate } ),
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.blend ( blend ),
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.scandoubler_disable( scandoublerD ),
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.scanlines ( scanlines ),
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.ypbpr ( ypbpr ),
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.no_csync ( no_csync )
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);
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user_io #(.STRLEN(($size(CONF_STR)>>3)))user_io(
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.clk_sys (clock_24 ),
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.conf_str (CONF_STR ),
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.SPI_CLK (SPI_SCK ),
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.SPI_SS_IO (CONF_DATA0 ),
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.SPI_MISO (SPI_DO ),
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.SPI_MOSI (SPI_DI ),
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.buttons (buttons ),
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.switches (switches ),
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.scandoubler_disable (scandoublerD),
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.ypbpr (ypbpr ),
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.core_mod (core_mod ),
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.no_csync (no_csync ),
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.key_strobe (key_strobe ),
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.key_pressed (key_pressed ),
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.key_code (key_code ),
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.joystick_0 (joystick_0 ),
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.joystick_1 (joystick_1 ),
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.status (status )
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);
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dac #(.C_bits(16))dac_l(
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.clk_i(clock_24),
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.res_n_i(1),
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.dac_i({ 1'b0, audio, 5'd0 }),
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.dac_o(AUDIO_L)
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);
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wire m_up, m_down, m_left, m_right, m_fireA, m_fireB, m_fireC, m_fireD, m_fireE, m_fireF;
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wire m_up2, m_down2, m_left2, m_right2, m_fire2A, m_fire2B, m_fire2C, m_fire2D, m_fire2E, m_fire2F;
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wire m_tilt, m_coin1, m_coin2, m_coin3, m_coin4, m_one_player, m_two_players, m_three_players, m_four_players;
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arcade_inputs inputs (
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.clk ( clock_24 ),
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.key_strobe ( key_strobe ),
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.key_pressed ( key_pressed ),
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.key_code ( key_code ),
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.joystick_0 ( joystick_0 ),
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.joystick_1 ( joystick_1 ),
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.rotate ( rotate ),
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.orientation ( orientation ),
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.joyswap ( joyswap ),
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.oneplayer ( 1'b0 ),
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.controls ( {m_tilt, m_coin4, m_coin3, m_coin2, m_coin1, m_four_players, m_three_players, m_two_players, m_one_player} ),
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.player1 ( {m_fireF, m_fireE, m_fireD, m_fireC, m_fireB, m_fireA, m_up, m_down, m_left, m_right} ),
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.player2 ( {m_fire2F, m_fire2E, m_fire2D, m_fire2C, m_fire2B, m_fire2A, m_up2, m_down2, m_left2, m_right2} )
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);
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wire [13:0] mcpu_rom1_addr;
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wire [15:0] mcpu_rom1_data;
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wire [13:0] mcpu_rom2_addr;
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wire [15:0] mcpu_rom2_data;
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reg port1_req;
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sdram #(48) sdram(
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.*,
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.init_n ( pll_locked ),
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.clk ( clock_48 ),
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// port1
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.port1_req ( port1_req ),
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.port1_ack ( ),
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.port1_a ( ioctl_addr[23:1] ),
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.port1_ds ( {ioctl_addr[0], ~ioctl_addr[0]} ),
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.port1_we ( ioctl_downl ),
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.port1_d ( {ioctl_dout, ioctl_dout} ),
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.port1_q ( ),
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.cpu1_addr ( ioctl_downl ? 16'hffff : {2'b00, mcpu_rom1_addr[13:1]} ),
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.cpu1_q ( mcpu_rom1_data ),
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.cpu2_addr ( ioctl_downl ? 16'hffff : {2'b00, mcpu_rom2_addr[13:1] + 16'h2000} ),//check
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.cpu2_q ( mcpu_rom2_data ),
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// port2
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.port2_req ( ),
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.port2_ack ( ),
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.port2_a ( ),
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.port2_ds ( ),
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.port2_we ( ),
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.port2_d ( ),
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.port2_q ( ),
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.bg_addr ( ),
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.bg_q ( )
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);
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// ROM download controller
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always @(posedge clock_48) begin
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reg ioctl_wr_last = 0;
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ioctl_wr_last <= ioctl_wr;
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if (ioctl_downl) begin
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if (~ioctl_wr_last && ioctl_wr) begin
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port1_req <= ~port1_req;
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end
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end
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end
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//wire [7:0] DSW1 = ~status[15:8];
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//wire [7:0] DSW2 = ~status[23:16];
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wire btn_A, btn_B, btn_C;
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always @* begin
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if(key_strobe) begin
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case(key_code)
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'h1C: btn_A <= key_pressed; // A
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'h32: btn_B <= key_pressed; // B
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'h21: btn_C <= key_pressed; // C
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endcase
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end
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end
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wire [7:0] p0, p1, p2, p3;
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wire [6:0] core_mod;
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always @* begin
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case (core_mod)
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7'h0: begin // freeze
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p0 = { 2'b0, m_coin1 , 3'b0, m_two_players, m_one_player };//unknown
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p1 = { m_left2, m_right2, m_down2, m_up2, m_left, m_right, m_down, m_up };
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p2 = { 6'd0, m_fireB, m_fireA };
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p3 = { 6'd0, m_fire2B, m_fire2A };
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end
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7'h1: begin // jack
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p0 = { 1'b0, m_coin1, m_coin2 , 3'b0, m_two_players, m_one_player };
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p1 = { m_down2, m_up2, m_right2, m_left2, m_down, m_up, m_right, m_left };
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p2 = { 6'd0, m_fireB, m_fireA };
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p3 = { 6'd0, m_fire2B, m_fire2A };
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end
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7'h2: begin // zzyzzyxx
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p0 = { 1'b0, m_coin1, m_coin2 , 3'b0, m_two_players, m_one_player };
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p1 = { m_down2, m_up2, m_right2, m_left2, m_down, m_up, m_right, m_left };
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p2 = { 6'd0, m_fireB, m_fireA };
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p3 = { 6'd0, m_fire2B, m_fire2A };
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end
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7'h3: begin // super casino
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p0 = { 1'b0, m_coin1, 4'b0, m_two_players, m_one_player };
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p1 = { m_down2, m_up2, 1'b0, 1'b0, m_down, m_up, 1'b0, 1'b0 };
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p2 = { 6'd0, m_fireB, m_fireA };
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p3 = { 6'd0, m_fire2B, m_fire2A };
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end
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7'h4: begin // tri-pool
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p0 = { 1'b0, m_coin1, m_coin2 , btn_C, btn_B, btn_A, m_two_players, m_one_player };
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p1 = { m_down2, m_up2, m_right2, m_left2, m_down, m_up, m_right, m_left };
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p2 = { 6'd0, m_fireB, m_fireA };
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p3 = { 6'd0, m_fire2B, m_fire2A };
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end
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default;
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endcase
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end
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core core(
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.reset (reset),
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.clk_sys (clock_48),
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.dsw1 (DSW1),
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.dsw2 (DSW2),
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.p0 (p0),
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.p1 (p1),
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.p2 (p2),
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.p3 (p3),
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.red (r),
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.green (g),
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.blue (b),
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.hb (hb),
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.vb (vb),
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.hs (hs),
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.vs (vs),
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.ce_pix (),//out
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.sound (audio),
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.mcpu_rom1_addr (mcpu_rom1_addr),
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.mcpu_rom1_data (mcpu_rom1_addr[0] ? mcpu_rom1_data[15:8] : mcpu_rom1_data[7:0]),
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.mcpu_rom2_addr (mcpu_rom2_addr),
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.mcpu_rom2_data (mcpu_rom2_addr[0] ? mcpu_rom2_data[15:8] : mcpu_rom2_data[7:0]),
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.ioctl_download (ioctl_downl),
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.ioctl_addr (ioctl_addr),
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.ioctl_dout (ioctl_dout),
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.ioctl_wr (ioctl_wr)
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);
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endmodule
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