mirror of
https://github.com/Gehstock/Mist_FPGA.git
synced 2026-04-24 19:50:18 +00:00
73 lines
4.1 KiB
VHDL
73 lines
4.1 KiB
VHDL
-------------------------------------------------------------------------------
|
|
-- --
|
|
-- X X XXXXXX XXXXXX XXXXXX XXXXXX X --
|
|
-- XX XX X X X X X X X XX --
|
|
-- X X X X X X X X X X X X --
|
|
-- X X X X X X X X X X X X --
|
|
-- X X X X XXXXXX X X XXXXXX X --
|
|
-- X X X X X X X X X --
|
|
-- X X X X X X X X X --
|
|
-- X X X X X X X X X X --
|
|
-- X X XXXXXX XXXXXX XXXXXX XXXXXX X --
|
|
-- --
|
|
-- --
|
|
-- O R E G A N O S Y S T E M S --
|
|
-- --
|
|
-- Design & Consulting --
|
|
-- --
|
|
-------------------------------------------------------------------------------
|
|
-- --
|
|
-- Web: http://www.oregano.at/ --
|
|
-- --
|
|
-- Contact: mc8051@oregano.at --
|
|
-- --
|
|
-------------------------------------------------------------------------------
|
|
-- --
|
|
-- MC8051 - VHDL 8051 Microcontroller IP Core --
|
|
-- Copyright (C) 2001 OREGANO SYSTEMS --
|
|
-- --
|
|
-- This library is free software; you can redistribute it and/or --
|
|
-- modify it under the terms of the GNU Lesser General Public --
|
|
-- License as published by the Free Software Foundation; either --
|
|
-- version 2.1 of the License, or (at your option) any later version. --
|
|
-- --
|
|
-- This library is distributed in the hope that it will be useful, --
|
|
-- but WITHOUT ANY WARRANTY; without even the implied warranty of --
|
|
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU --
|
|
-- Lesser General Public License for more details. --
|
|
-- --
|
|
-- Full details of the license can be found in the file LGPL.TXT. --
|
|
-- --
|
|
-- You should have received a copy of the GNU Lesser General Public --
|
|
-- License along with this library; if not, write to the Free Software --
|
|
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA --
|
|
-- --
|
|
-------------------------------------------------------------------------------
|
|
--
|
|
--
|
|
-- Author: Roland Höller
|
|
--
|
|
-- Filename: dcml_adjust_rtl_cfg.vhd
|
|
--
|
|
-- Date of Creation: Mon Aug 9 12:14:48 1999
|
|
--
|
|
-- Version: $Revision: 1.4 $
|
|
--
|
|
-- Date of Latest Version: $Date: 2002-01-07 12:17:44 $
|
|
--
|
|
--
|
|
-- Description: Combinational design to calculate the decimal
|
|
-- representation (BCD) of a data bus.
|
|
--
|
|
--
|
|
--
|
|
--
|
|
-------------------------------------------------------------------------------
|
|
configuration dcml_adjust_rtl_cfg of dcml_adjust is
|
|
|
|
for rtl
|
|
|
|
end for;
|
|
|
|
end dcml_adjust_rtl_cfg;
|