mirror of
https://github.com/Gehstock/Mist_FPGA.git
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194 lines
4.8 KiB
Systemverilog
194 lines
4.8 KiB
Systemverilog
module AppleII_MiST (
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output LED,
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output [5:0] VGA_R,
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output [5:0] VGA_G,
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output [5:0] VGA_B,
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output VGA_HS,
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output VGA_VS,
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output AUDIO_L,
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output AUDIO_R,
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input SPI_SCK,
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output SPI_DO,
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input SPI_DI,
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input SPI_SS2,
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input SPI_SS3,
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input CONF_DATA0,
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input CLOCK_27
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);
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`include "rtl\build_id.v"
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localparam CONF_STR = {
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"Apple II;;",
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"O12,Screen Type , Green, White, Color;",
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"O34,Scandoubler Fx,None,HQ2x,CRT 25%,CRT 50%;",
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"T6,Reset;",
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"V,v1.00.",`BUILD_DATE
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};
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wire CLK_28M, CLK_14M, CLK_7M;
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wire pll_locked;
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pll pll
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(
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.inclk0(CLOCK_27),
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.areset(0),
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.c0(CLK_28M),
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.c1(CLK_14M),
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.c2(CLK_7M),
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.locked(pll_locked)
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);
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wire [31:0] status;
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wire [1:0] buttons;
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wire [1:0] switches;
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wire power_on_reset;
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wire reset = power_on_reset | status[0] | status[6] | buttons[1];
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wire [22:0] flash_clk;
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wire scandoubler_disable;
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wire ypbpr;
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wire ps2_kbd_clk, ps2_kbd_data;
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wire [9:0] audio;
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wire hsync,vsync;
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assign LED = 1;
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wire blankn = ~(hblank | vblank);
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wire hblank, vblank;
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wire hs, vs;
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wire VIDEO, COLOR_LINE, LD194, speaker;
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wire read;
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wire [7:0] K;
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wire [9:0] r,g,b;
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always @(CLK_14M) begin
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if (flash_clk[22] == 1'b1) power_on_reset = 1'b0;
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end
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always @(CLK_14M) begin
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//rising_edge(CLK_14M) then flash_clk <= flash_clk + 1;
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end
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video_mixer #(.LINE_LENGTH(640), .HALF_DEPTH(0)) video_mixer (
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.clk_sys(CLK_28M),
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.ce_pix(CLK_7M),
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.ce_pix_actual(CLK_7M),
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.SPI_SCK(SPI_SCK),
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.SPI_SS3(SPI_SS3),
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.SPI_DI(SPI_DI),
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.R(status[2:1] ? r[9:4] : 5'b0),
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.G(g[9:4]),
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.B(status[2:1] ? b[9:4] : 5'b0),
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.HSync(hs),
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.VSync(vs),
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.VGA_R(VGA_R),
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.VGA_G(VGA_G),
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.VGA_B(VGA_B),
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.VGA_VS(VGA_VS),
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.VGA_HS(VGA_HS),
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.scandoubler_disable(1'b1),
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.scanlines(scandoubler_disable ? 2'b00 : {status[4:3] == 3, status[4:3] == 2}),
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.hq2x(status[4:3]==1),
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.ypbpr_full(1),
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.line_start(0),
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.mono(0)
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);
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mist_io #(.STRLEN(($size(CONF_STR)>>3))) mist_io (
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.clk_sys (CLK_28M ),
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.conf_str (CONF_STR ),
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.SPI_SCK (SPI_SCK ),
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.CONF_DATA0 (CONF_DATA0 ),
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.SPI_SS2 (SPI_SS2 ),
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.SPI_DO (SPI_DO ),
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.SPI_DI (SPI_DI ),
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.buttons (buttons ),
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.switches (switches ),
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.scandoubler_disable(scandoubler_disable),
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.ypbpr (ypbpr ),
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.ps2_kbd_clk (ps2_kbd_clk ),
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.ps2_kbd_data (ps2_kbd_data ),
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.status (status )
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);
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wire ram_we;
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wire [13:0]ram_address;
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wire [7:0]ram_data;
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wire [7:0]ram_q;
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ram ram(
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.clock(CLK_14M),
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.address(ram_address),
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.data(ram_data),
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.q(ram_q),
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.wren(ram_we)
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);
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apple2 apple2 (
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.CLK_14M (CLK_14M),
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.CLK_2M (),//: out std_logic;
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.PRE_PHASE_ZERO (),//: out std_logic;
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.FLASH_CLK (),//: in std_logic; -- approx. 2 Hz flashing char clock
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.reset (reset),
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.ADDR (),//: out unsigned(15 downto 0); -- CPU address
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.ram_addr (ram_address),//: out unsigned(15 downto 0); -- RAM address
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.D (ram_data),//: out unsigned(7 downto 0); -- Data to RAM
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.ram_do (ram_q),//: in unsigned(7 downto 0); -- Data from RAM
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.PD (),//: in unsigned(7 downto 0); -- Data to CPU from peripherals
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.ram_we (ram_we),//: out std_logic; -- RAM write enable
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.VIDEO (VIDEO),
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.COLOR_LINE (COLOR_LINE),
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.HBL (hblank),
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.VBL (vblank),
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.LD194 (LD194),
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.K (K),
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.READ_KEY (read),
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.AN (),//: out std_logic_vector(3 downto 0); -- Annunciator outputs
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// GAMEPORT input bits:
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// 7 6 5 4 3 2 1 0
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// pdl3 pdl2 pdl1 pdl0 pb3 pb2 pb1 casette
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.GAMEPORT (),//: in std_logic_vector(7 downto 0);
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.PDL_STROBE (),//: out std_logic; -- Pulses high when C07x read
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.STB (),//: out std_logic; -- Pulses high when C04x read
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.IO_SELECT (),//: out std_logic_vector(7 downto 0);
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.DEVICE_SELECT (),//: out std_logic_vector(7 downto 0);
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.pcDebugOut (),//: out unsigned(15 downto 0);
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.opcodeDebugOut (),//: out unsigned(7 downto 0);
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.speaker (speaker)
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);
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keyboard keyboard (
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.PS2_Clk (ps2_kbd_clk),
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.PS2_Data (ps2_kbd_data),
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.CLK_14M (CLK_14M),
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.reset (reset),
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.read (read),
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.K (K),
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);
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vga_controller vga_controller (
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.CLK_28M (CLK_28M),
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.VIDEO (VIDEO),
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.COLOR_LINE (COLOR_LINE),
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.COLOR (status[2:1]==2),
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.HBL (hblank),
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.VBL (vblank),
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.LD194 (LD194),
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.VGA_HS (hs),
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.VGA_VS (vs),
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.VGA_R (r),
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.VGA_G (g),
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.VGA_B (b),
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);
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dac dac (
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.CLK_DAC (CLK_28M),
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.RST (),
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.IN_DAC (speaker & 15'b0),
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.OUT_DAC (AUDIO_L)
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);
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assign AUDIO_R = AUDIO_L;
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endmodule
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