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81 lines
1.7 KiB
Systemverilog
81 lines
1.7 KiB
Systemverilog
/* Atari on an FPGA
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Masters of Engineering Project
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Cornell University, 2007
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Daniel Beer
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TIA.h
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Header file that contains useful definitions for the TIA module.
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*/
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`define CXM0P 7'h70
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`define CXM1P 7'h71
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`define CXP0FB 7'h72
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`define CXP1FB 7'h73
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`define CXM0FB 7'h74
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`define CXM1FB 7'h75
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`define CXBLPF 7'h76
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`define CXPPMM 7'h77
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`define INPT0 7'h78
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`define INPT1 7'h79
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`define INPT2 7'h7A
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`define INPT3 7'h7B
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`define INPT4 7'h7C
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`define INPT5 7'h7D
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`define VSYNC 7'h00
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`define VBLANK 7'h01
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`define WSYNC 7'h02
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`define RSYNC 7'h03
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`define NUSIZ0 7'h04
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`define NUSIZ1 7'h05
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`define COLUP0 7'h06
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`define COLUP1 7'h07
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`define COLUPF 7'h08
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`define COLUBK 7'h09
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`define CTRLPF 7'h0A
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`define REFP0 7'h0B
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`define REFP1 7'h0C
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`define PF0 7'h0D
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`define PF1 7'h0E
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`define PF2 7'h0F
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`define RESP0 7'h10
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`define RESP1 7'h11
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`define RESM0 7'h12
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`define RESM1 7'h13
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`define RESBL 7'h14
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`define AUDC0 7'h15
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`define AUDC1 7'h16
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`define AUDF0 7'h17
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`define AUDF1 7'h18
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`define AUDV0 7'h19
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`define AUDV1 7'h1A
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`define GRP0 7'h1B
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`define GRP1 7'h1C
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`define ENAM0 7'h1D
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`define ENAM1 7'h1E
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`define ENABL 7'h1F
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`define HMP0 7'h20
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`define HMP1 7'h21
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`define HMM0 7'h22
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`define HMM1 7'h23
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`define HMBL 7'h24
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`define VDELP0 7'h25
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`define VDELP1 7'h26
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`define VDELBL 7'h27
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`define RESMP0 7'h28
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`define RESMP1 7'h29
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`define HMOVE 7'h2A
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`define HMCLR 7'h2B
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`define CXCLR 7'h2C
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`define CXM0P_7800 7'h40
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`define CXM1P_7800 7'h41
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`define CXP0FB_7800 7'h42
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`define CXP1FB_7800 7'h43
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`define CXM0FB_7800 7'h44
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`define CXM1FB_7800 7'h45
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`define CXBLPF_7800 7'h46
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`define CXPPMM_7800 7'h47
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`define INPT0_7800 7'h48
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`define INPT1_7800 7'h49
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`define INPT2_7800 7'h4A
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`define INPT3_7800 7'h4B
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`define INPT4_7800 7'h4C
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`define INPT5_7800 7'h4D |