mirror of
https://github.com/Gehstock/Mist_FPGA.git
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176 lines
5.0 KiB
Systemverilog
176 lines
5.0 KiB
Systemverilog
//============================================================================
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//
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// Time Pilot '84 top-level module
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// Copyright (C) 2020 Ace
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//
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// Completely rewritten using fully syncronous logic by Gyorgy Szombathelyi
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//
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// Permission is hereby granted, free of charge, to any person obtaining a
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// copy of this software and associated documentation files (the "Software"),
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// to deal in the Software without restriction, including without limitation
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// the rights to use, copy, modify, merge, publish, distribute, sublicense,
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// and/or sell copies of the Software, and to permit persons to whom the
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// Software is furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in
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// all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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// FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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// DEALINGS IN THE SOFTWARE.
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//
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//============================================================================
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//Module declaration, I/O ports
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module TimePilot84
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(
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input reset,
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input clk_49m, clk_14m, //Actual clocks: 49.152MHz, 14.31818MHz
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input [1:0] coin, //0 = coin 1, 1 = coin 2
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input [1:0] start_buttons, //0 = Player 1, 1 = Player 2
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input [3:0] p1_joystick, p2_joystick, //0 = up, 1 = down, 2 = left, 3 = right
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input [2:0] p1_buttons, //0 = shot, 1 = missile, 2 = spare
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input [1:0] p2_buttons, //0 = shot, 1 = missile
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input btn_service,
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input [15:0] dip_sw,
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output video_hsync, video_vsync, video_csync,
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output video_hblank, video_vblank,
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output [3:0] video_r, video_g, video_b,
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output signed [15:0] sound,
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input is_set3, //Flag to remap primary CPU address space for Time Pilot '84 (Set 3)
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input [24:0] ioctl_addr,
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input [7:0] ioctl_data,
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input ioctl_wr,
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output [15:0] main_cpu_rom_addr,
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input [7:0] main_cpu_rom_do,
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output [12:0] sub_cpu_rom_addr,
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input [7:0] sub_cpu_rom_do,
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output [12:0] char_rom_addr,
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input [15:0] char_rom_do
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);
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//Linking signals between PCBs
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wire A5, A6, sound_on, sound_data, ioen, in5, in6;
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wire [7:0] cpubrd_Dout, sndbrd_Dout;
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//ROM loader signals for MISTer (loads ROMs from SD card)
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wire ep1_cs_i, ep2_cs_i, ep3_cs_i, ep4_cs_i, ep5_cs_i, ep6_cs_i, ep7_cs_i, ep8_cs_i,
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ep9_cs_i, ep10_cs_i, ep11_cs_i, ep12_cs_i;
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wire cp1_cs_i, cp2_cs_i, cp3_cs_i, cl_cs_i, sl_cs_i;
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//MiSTer data write selector
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selector DLSEL
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(
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.ioctl_addr(ioctl_addr),
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.ep1_cs(ep1_cs_i),
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.ep2_cs(ep2_cs_i),
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.ep3_cs(ep3_cs_i),
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.ep4_cs(ep4_cs_i),
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.ep5_cs(ep5_cs_i),
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.ep6_cs(ep6_cs_i),
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.ep7_cs(ep7_cs_i),
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.ep8_cs(ep8_cs_i),
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.ep9_cs(ep9_cs_i),
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.ep10_cs(ep10_cs_i),
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.ep11_cs(ep11_cs_i),
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.ep12_cs(ep12_cs_i),
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.cp1_cs(cp1_cs_i),
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.cp2_cs(cp2_cs_i),
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.cp3_cs(cp3_cs_i),
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.cl_cs(cl_cs_i),
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.sl_cs(sl_cs_i)
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);
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//Instantiate main PCB
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TimePilot84_CPU main_pcb
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(
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.reset(reset),
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.clk_49m(clk_49m),
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.red(video_r),
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.green(video_g),
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.blue(video_b),
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.video_hsync(video_hsync),
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.video_vsync(video_vsync),
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.video_csync(video_csync),
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.video_hblank(video_hblank),
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.video_vblank(video_vblank),
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.sndbrd_D(sndbrd_Dout),
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.cpubrd_D(cpubrd_Dout),
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.cpubrd_A5(A5),
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.cpubrd_A6(A6),
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.n_sda(sound_data),
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.n_son(sound_on),
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.in5(in5),
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.ioen(ioen),
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.is_set3(is_set3),
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.ep1_cs_i(ep1_cs_i),
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.ep2_cs_i(ep2_cs_i),
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.ep3_cs_i(ep3_cs_i),
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.ep4_cs_i(ep4_cs_i),
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.ep5_cs_i(ep5_cs_i),
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.ep7_cs_i(ep7_cs_i),
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.ep8_cs_i(ep8_cs_i),
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.ep9_cs_i(ep9_cs_i),
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.ep10_cs_i(ep10_cs_i),
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.ep11_cs_i(ep11_cs_i),
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.ep12_cs_i(ep12_cs_i),
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.cp1_cs_i(cp1_cs_i),
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.cp2_cs_i(cp2_cs_i),
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.cp3_cs_i(cp3_cs_i),
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.cl_cs_i(cl_cs_i),
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.sl_cs_i(sl_cs_i),
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.ioctl_addr(ioctl_addr),
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.ioctl_wr(ioctl_wr),
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.ioctl_data(ioctl_data),
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.main_cpu_rom_addr(main_cpu_rom_addr),
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.main_cpu_rom_do(main_cpu_rom_do),
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.sub_cpu_rom_addr(sub_cpu_rom_addr),
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.sub_cpu_rom_do(sub_cpu_rom_do),
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.char_rom_addr(char_rom_addr),
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.char_rom_do(char_rom_do)
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);
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//Instantiate sound PCB
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TimePilot84_SND sound_pcb
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(
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.reset(reset),
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.clk_49m(clk_49m),
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.clk_14m(clk_14m),
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.sound_on(sound_on),
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.sound_data(sound_data),
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.dip_sw(dip_sw),
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.coin(coin),
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.start_buttons(start_buttons),
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.p1_joystick(p1_joystick),
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.p2_joystick(p2_joystick),
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.p1_buttons(p1_buttons),
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.p2_buttons(p2_buttons),
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.btn_service(btn_service),
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.ioen(ioen),
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.in5(in5),
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.cpubrd_A5(A5),
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.cpubrd_A6(A6),
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.cpubrd_Din(cpubrd_Dout),
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.sndbrd_Dout(sndbrd_Dout),
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.sound(sound),
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.ep6_cs_i(ep6_cs_i),
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.ioctl_addr(ioctl_addr),
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.ioctl_wr(ioctl_wr),
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.ioctl_data(ioctl_data)
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);
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endmodule
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