mirror of
https://github.com/Gehstock/Mist_FPGA.git
synced 2026-04-30 21:58:59 +00:00
4 lines
189 B
Plaintext
4 lines
189 B
Plaintext
set_global_assignment -name IP_TOOL_NAME "ROM: 1-PORT"
|
|
set_global_assignment -name IP_TOOL_VERSION "13.1"
|
|
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "bios.v"]
|