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6 lines
442 B
Plaintext
6 lines
442 B
Plaintext
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) cpu09.vhd ]
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set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) mc6809.v ]
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set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) mc6809i.v ]
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set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) mc6809e.v ]
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set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) mc6809is.v ]
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