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Gehstock.Mist_FPGA/common/CPU/6803/6803.qip
2020-11-22 12:33:58 +01:00

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set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) mc6801_core.sv ]
set_global_assignment -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) MC6803_gen2.sv ]