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296 lines
11 KiB
VHDL
296 lines
11 KiB
VHDL
-------------------------------------------------------------------------------
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--
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-- FPGA Lady Bug
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--
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-- $Id: ladybug_machine.vhd,v 1.23 2006/02/07 00:44:21 arnim Exp $
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--
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-- Toplevel of the Lady Bug machine.
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--
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-------------------------------------------------------------------------------
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--
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-- Copyright (c) 2005, Arnim Laeuger (arnim.laeuger@gmx.net)
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--
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-- All rights reserved
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--
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-- Redistribution and use in source and synthezised forms, with or without
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-- modification, are permitted provided that the following conditions are met:
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--
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-- Redistributions of source code must retain the above copyright notice,
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-- this list of conditions and the following disclaimer.
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--
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-- Redistributions in synthesized form must reproduce the above copyright
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-- notice, this list of conditions and the following disclaimer in the
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-- documentation and/or other materials provided with the distribution.
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--
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-- Neither the name of the author nor the names of other contributors may
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-- be used to endorse or promote products derived from this software without
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-- specific prior written permission.
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--
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-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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-- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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-- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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-- PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
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-- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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-- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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-- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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-- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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-- POSSIBILITY OF SUCH DAMAGE.
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--
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-- Please report bugs to the author, but before you do so, please
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-- make sure that this is not a derivative work and that
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-- you have the latest version of this file.
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--
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-------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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entity ladybug_machine is
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port (
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-- Clock and Reset Interface ----------------------------------------------
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ext_res_n_i : in std_logic;
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clk_20mhz_i : in std_logic;
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clk_en_10mhz_o : out std_logic;
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clk_en_5mhz_o : out std_logic;
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por_n_o : out std_logic;
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-- Control Interface ------------------------------------------------------
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tilt_n_i : in std_logic;
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player_select_n_i : in std_logic_vector( 1 downto 0);
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player_fire_n_i : in std_logic_vector( 1 downto 0);
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player_up_n_i : in std_logic_vector( 1 downto 0);
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player_right_n_i : in std_logic_vector( 1 downto 0);
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player_down_n_i : in std_logic_vector( 1 downto 0);
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player_left_n_i : in std_logic_vector( 1 downto 0);
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player_bomb_n_i : in std_logic_vector( 1 downto 0);
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right_chute_i : in std_logic;
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left_chute_i : in std_logic;
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-- DIP Switch Interface ---------------------------------------------------
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dip_block_1_i : in std_logic_vector( 7 downto 0);
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dip_block_2_i : in std_logic_vector( 7 downto 0);
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-- RGB Video Interface ----------------------------------------------------
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rgb_r_o : out std_logic_vector( 1 downto 0);
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rgb_g_o : out std_logic_vector( 1 downto 0);
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rgb_b_o : out std_logic_vector( 1 downto 0);
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hsync_n_o : out std_logic;
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vsync_n_o : out std_logic;
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comp_sync_n_o : out std_logic;
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vblank_o : out std_logic;
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hblank_o : out std_logic;
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-- Audio Interface --------------------------------------------------------
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audio_o : out signed( 7 downto 0);
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-- CPU ROM Interface ------------------------------------------------------
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rom_cpu_a_o : out std_logic_vector(14 downto 0);
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rom_cpu_d_i : in std_logic_vector( 7 downto 0);
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-- Character ROM Interface ------------------------------------------------
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rom_char_a_o : out std_logic_vector(11 downto 0);
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rom_char_d_i : in std_logic_vector(15 downto 0);
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-- Sprite ROM Interface ---------------------------------------------------
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rom_sprite_a_o : out std_logic_vector(11 downto 0);
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rom_sprite_d_i : in std_logic_vector(15 downto 0)
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);
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end ladybug_machine;
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architecture struct of ladybug_machine is
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-- Clock System -------------------------------------------------------------
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signal clk_en_10mhz_s,
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clk_en_10mhz_n_s : std_logic;
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signal clk_en_5mhz_s,
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clk_en_5mhz_n_s : std_logic;
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signal clk_en_4mhz_s : std_logic;
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-- Reset System -------------------------------------------------------------
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signal por_n_s : std_logic;
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signal res_n_s : std_logic;
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signal sound_wait_n_s : std_logic;
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signal wait_n_s : std_logic;
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signal a_s : std_logic_vector(10 downto 0);
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signal d_to_cpu_s,
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d_from_cpu_s,
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d_from_video_s : std_logic_vector( 7 downto 0);
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signal rd_n_s,
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wr_n_s : std_logic;
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signal cs7_n_s,
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cs10_n_s,
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cs11_n_s,
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cs12_n_s,
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cs13_n_s : std_logic;
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signal vc_s,
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vbl_tick_n_s,
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vbl_buf_s : std_logic;
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signal gpio_in0_s,
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gpio_in1_s,
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gpio_in2_s,
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gpio_in3_s,
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gpio_extra_s : std_logic_vector( 7 downto 0);
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begin
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-----------------------------------------------------------------------------
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-- Clock Generator
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-----------------------------------------------------------------------------
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clk_b : entity work.ladybug_clk
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port map (
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clk_20mhz_i => clk_20mhz_i,
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por_n_i => por_n_s,
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clk_en_10mhz_o => clk_en_10mhz_s,
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clk_en_10mhz_n_o => clk_en_10mhz_n_s,
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clk_en_5mhz_o => clk_en_5mhz_s,
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clk_en_5mhz_n_o => clk_en_5mhz_n_s,
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clk_en_4mhz_o => clk_en_4mhz_s
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);
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--
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clk_en_5mhz_o <= clk_en_5mhz_s;
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clk_en_10mhz_o <= clk_en_10mhz_s;
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--
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-----------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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-- Reset Generator
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-----------------------------------------------------------------------------
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res_b : entity work.ladybug_res
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port map (
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clk_20mhz_i => clk_20mhz_i,
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ext_res_n_i => ext_res_n_i,
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res_n_o => res_n_s,
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por_n_o => por_n_s
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);
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--
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por_n_o <= por_n_s;
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--
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-----------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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-- Joystick and DIP Switch Mapping
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-----------------------------------------------------------------------------
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gpio_in0_s <= tilt_n_i &
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player_select_n_i(1) &
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player_select_n_i(0) &
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player_fire_n_i(0) &
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player_up_n_i(0) &
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player_right_n_i(0) &
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player_down_n_i(0) &
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player_left_n_i(0);
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gpio_in1_s <= vbl_buf_s &
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vbl_tick_n_s &
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vc_s &
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player_fire_n_i(1) &
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player_up_n_i(1) &
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player_right_n_i(1) &
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player_down_n_i(1) &
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player_left_n_i(1);
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gpio_in2_s <= dip_block_1_i;
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gpio_in3_s <= dip_block_2_i;
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gpio_extra_s <= player_bomb_n_i(1) &
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'1' &
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'1' &
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'1' &
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player_bomb_n_i(0) &
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'1' &
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'1' &
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'1';
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-----------------------------------------------------------------------------
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-- CPU Unit
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-----------------------------------------------------------------------------
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cpu_b : entity work.ladybug_cpu_unit
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port map (
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clk_20mhz_i => clk_20mhz_i,
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clk_en_4mhz_i => clk_en_4mhz_s,
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res_n_i => res_n_s,
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rom_cpu_a_o => rom_cpu_a_o,
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rom_cpu_d_i => rom_cpu_d_i,
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sound_wait_n_i => sound_wait_n_s,
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wait_n_i => wait_n_s,
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right_chute_i => right_chute_i,
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left_chute_i => left_chute_i,
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gpio_in0_i => gpio_in0_s,
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gpio_in1_i => gpio_in1_s,
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gpio_in2_i => gpio_in2_s,
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gpio_in3_i => gpio_in3_s,
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gpio_extra_i => gpio_extra_s,
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a_o => a_s,
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d_to_cpu_i => d_to_cpu_s,
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d_from_cpu_o => d_from_cpu_s,
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rd_n_o => rd_n_s,
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wr_n_o => wr_n_s,
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cs7_n_o => cs7_n_s,
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cs10_n_o => cs10_n_s,
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cs11_n_o => cs11_n_s,
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cs12_n_o => cs12_n_s,
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cs13_n_o => cs13_n_s
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);
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-----------------------------------------------------------------------------
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-- Bus Multiplexer
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-----------------------------------------------------------------------------
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d_to_cpu_s <= d_from_video_s when (cs7_n_s and cs13_n_s) = '0' else (others => '1');
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-----------------------------------------------------------------------------
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-- Video Unit
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-----------------------------------------------------------------------------
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video_b : entity work.ladybug_video_unit
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port map (
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clk_20mhz_i => clk_20mhz_i,
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por_n_i => por_n_s,
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res_n_i => res_n_s,
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clk_en_10mhz_i => clk_en_10mhz_s,
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clk_en_10mhz_n_i => clk_en_10mhz_n_s,
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clk_en_5mhz_i => clk_en_5mhz_s,
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clk_en_5mhz_n_i => clk_en_5mhz_n_s,
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clk_en_4mhz_i => clk_en_4mhz_s,
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cs7_n_i => cs7_n_s,
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cs10_n_i => cs10_n_s,
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cs13_n_i => cs13_n_s,
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a_i => a_s,
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rd_n_i => rd_n_s,
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wr_n_i => wr_n_s,
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wait_n_o => wait_n_s,
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d_from_cpu_i => d_from_cpu_s,
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d_from_video_o => d_from_video_s,
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vc_o => vc_s,
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vbl_tick_n_o => vbl_tick_n_s,
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vbl_buf_o => vbl_buf_s,
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rgb_r_o => rgb_r_o,
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rgb_g_o => rgb_g_o,
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rgb_b_o => rgb_b_o,
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hsync_n_o => hsync_n_o,
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vsync_n_o => vsync_n_o,
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comp_sync_n_o => comp_sync_n_o,
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vblank_o => vblank_o,
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hblank_o => hblank_o,
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rom_char_a_o => rom_char_a_o,
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rom_char_d_i => rom_char_d_i,
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rom_sprite_a_o => rom_sprite_a_o,
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rom_sprite_d_i => rom_sprite_d_i
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);
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-----------------------------------------------------------------------------
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-- Sound Unit
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-----------------------------------------------------------------------------
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sound_b : entity work.ladybug_sound_unit
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port map (
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clk_20mhz_i => clk_20mhz_i,
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clk_en_4mhz_i => clk_en_4mhz_s,
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por_n_i => por_n_s,
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cs11_n_i => cs11_n_s,
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cs12_n_i => cs12_n_s,
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wr_n_i => wr_n_s,
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d_from_cpu_i => d_from_cpu_s,
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sound_wait_n_o => sound_wait_n_s,
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audio_o => audio_o
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);
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end struct;
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