mirror of
https://github.com/Gehstock/Mist_FPGA.git
synced 2026-05-04 07:19:03 +00:00
49 lines
1.6 KiB
VHDL
49 lines
1.6 KiB
VHDL
library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_unsigned.all;
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library work;
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use work.pace_pkg.all;
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use work.video_controller_pkg.all;
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package project_pkg is
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--
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-- PACE constants which *MUST* be defined
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--
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constant PACE_HAS_PLL : boolean := true;
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constant PACE_HAS_FLASH : boolean := false;
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constant PACE_HAS_SRAM : boolean := false;
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constant PACE_HAS_SDRAM : boolean := false;
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constant PACE_HAS_SERIAL : boolean := false;
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constant PACE_JAMMA : PACEJamma_t := PACE_JAMMA_NONE;
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constant PACE_VIDEO_H_SIZE : integer := 1024/2;--512
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constant PACE_VIDEO_V_SIZE : integer := 768/2;--384
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constant PACE_VIDEO_CONTROLLER_TYPE : PACEVideoController_t := PACE_VIDEO_VGA_800x600_60Hz;
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constant PACE_CLK0_DIVIDE_BY : natural := 25;
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constant PACE_CLK0_MULTIPLY_BY : natural := 12; -- 50*12/25 = 24MHz
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constant PACE_CLK1_DIVIDE_BY : natural := 5;
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constant PACE_CLK1_MULTIPLY_BY : natural := 4; -- 50*4/5 = 40MHz
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constant PACE_VIDEO_H_SCALE : integer := 1;
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constant PACE_VIDEO_V_SCALE : integer := 1;
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constant PACE_VIDEO_H_SYNC_POLARITY : std_logic := '1';
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constant PACE_VIDEO_V_SYNC_POLARITY : std_logic := '1';
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constant PACE_VIDEO_BORDER_RGB : RGB_t := RGB_BLACK;
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type from_PROJECT_IO_t is record
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not_used : std_logic;
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end record;
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type to_PROJECT_IO_t is record
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not_used : std_logic;
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end record;
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end;
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