mirror of
https://github.com/Gehstock/Mist_FPGA.git
synced 2026-05-01 06:09:05 +00:00
230 lines
6.5 KiB
VHDL
230 lines
6.5 KiB
VHDL
library IEEE;
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use IEEE.std_logic_1164.all;
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--use IEEE.numeric_std.all;
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use ieee.std_logic_arith.all;
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use ieee.std_logic_unsigned.all;
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package video_controller_pkg is
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type PACEVideoController_t is
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(
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PACE_VIDEO_NONE, -- PACE video controller not used
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PACE_VIDEO_VGA_240x320_60Hz, -- P3M video
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PACE_VIDEO_VGA_320x480_60Hz, -- for 320x200 (12.588MHz)
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PACE_VIDEO_VGA_640x480_60Hz, -- generic VGA (25.175MHz)
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PACE_VIDEO_VGA_800x600_60Hz, -- generic VGA (40MHz)
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PACE_VIDEO_VGA_1024x768_60Hz, -- XVGA (65MHz)
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PACE_VIDEO_VGA_1366x768_60Hz, -- (NAVICO ROCKY) (72MHz)
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PACE_VIDEO_VGA_1280x800_60Hz, -- Sentinel Mode 36
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PACE_VIDEO_VGA_1280x1024_60Hz, -- SXGA (108MHz)
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PACE_VIDEO_VGA_1680x1050_60Hz, -- WSXGA+ (147MHz)
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PACE_VIDEO_ARCADE_STD_336x240_60Hz, -- arcade std resolution (7.16MHz)
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PACE_VIDEO_ARCADE_STD_336x240_60Hz_28M64, -- arcade std resolution (28.64MHz)
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PACE_VIDEO_CVBS_720x288p_50Hz, -- generic composite
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PACE_VIDEO_LCM_320x240_60Hz -- DE2 LCD
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);
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type PACEVideoDisplay_t is
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(
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PACE_DISPLAY_NONE,
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PACE_DISPLAY_VGA,
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PACE_DISPLAY_CVBS,
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PACE_DISPLAY_TFT
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);
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type RGB_t is record
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r : std_logic_vector(9 downto 0);
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g : std_logic_vector(9 downto 0);
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b : std_logic_vector(9 downto 0);
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end record;
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type RGB_a is array (natural range <>) of RGB_t;
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function NULL_RGB return RGB_t;
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constant RGB_BLACK : RGB_t := ((others=>'0'),(others=>'0'),(others=>'0'));
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constant RGB_RED : RGB_t := ((others=>'1'),(others=>'0'),(others=>'0'));
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constant RGB_GREEN : RGB_t := ((others=>'0'),(others=>'1'),(others=>'0'));
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constant RGB_YELLOW : RGB_t := ((others=>'1'),(others=>'1'),(others=>'0'));
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constant RGB_BLUE : RGB_t := ((others=>'0'),(others=>'0'),(others=>'1'));
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constant RGB_MAGENTA : RGB_t := ((others=>'1'),(others=>'0'),(others=>'1'));
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constant RGB_CYAN : RGB_t := ((others=>'0'),(others=>'1'),(others=>'1'));
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constant RGB_WHITE : RGB_t := ((others=>'1'),(others=>'1'),(others=>'1'));
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type VIDEO_REG_t is record
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h_scale : std_logic_vector(2 downto 0);
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v_scale : std_logic_vector(2 downto 0);
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end record;
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type from_VIDEO_t is record
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clk : std_logic;
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clk_ena : std_logic;
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reset : std_logic;
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end record;
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type to_VIDEO_t is record
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clk : std_logic;
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rgb : rgb_t;
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hsync : std_logic;
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vsync : std_logic;
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hblank : std_logic;
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vblank : std_logic;
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de : std_logic;
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end record;
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type from_VIDEO_CTL_t is record
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clk : std_logic;
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clk_ena : std_logic;
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stb : std_logic;
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hblank : std_logic;
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vblank : std_logic;
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x : std_logic_vector(10 downto 0);
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y : std_logic_vector(10 downto 0);
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end record;
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subtype BITMAP_D_t is std_logic_vector(23 downto 0);
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subtype BITMAP_A_t is std_logic_vector(15 downto 0);
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type to_BITMAP_CTL_t is record
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d : BITMAP_D_t;
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end record;
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type to_BITMAP_CTL_a is array (natural range <>) of to_BITMAP_CTL_t;
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function NULL_TO_BITMAP_CTL return to_BITMAP_CTL_t;
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type from_BITMAP_CTL_t is record
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a : BITMAP_A_t;
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rgb : RGB_t;
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set : std_logic;
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end record;
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type from_BITMAP_CTL_a is array (natural range <>) of from_BITMAP_CTL_t;
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subtype TILEMAP_D_t is std_logic_vector(15 downto 0);
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subtype TILEMAP_A_t is std_logic_vector(15 downto 0);
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subtype TILE_A_t is std_logic_vector(16 downto 0);
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subtype TILE_D_t is std_logic_vector(23 downto 0);
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subtype ATTR_A_t is std_logic_vector(15 downto 0);
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subtype ATTR_D_t is std_logic_vector(15 downto 0);
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type to_TILEMAP_CTL_t is record
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map_d : TILEMAP_D_t;
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tile_d : TILE_D_t;
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attr_d : ATTR_D_t;
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end record;
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type to_TILEMAP_CTL_a is array (natural range <>) of to_TILEMAP_CTL_t;
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function NULL_TO_TILEMAP_CTL return to_TILEMAP_CTL_t;
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type from_TILEMAP_CTL_t is record
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map_a : TILEMAP_A_t;
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tile_a : TILE_A_t;
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attr_a : ATTR_A_t;
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rgb : RGB_t;
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set : std_logic;
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end record;
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type from_TILEMAP_CTL_a is array (natural range <>) of from_TILEMAP_CTL_t;
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subtype PAL_ENTRY_t is std_logic_vector(15 downto 0);
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type PAL_A_t is array (natural range <>) of PAL_ENTRY_t;
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subtype BYTE_t is std_logic_vector(7 downto 0);
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type BYTE_A_t is array (natural range <>) of BYTE_t;
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subtype WORD_t is std_logic_vector(15 downto 0);
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type WORD_A_t is array (natural range <>) of WORD_t;
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type to_GRAPHICS_t is record
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pal : PAL_A_t(0 to 15);
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-- for various uses
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bit8 : BYTE_A_t(0 to 7);
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bit16 : WORD_A_t(0 to 3);
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-- 'native' graphics stream
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hsync : std_logic;
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vsync : std_logic;
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rgb : RGB_t;
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end record;
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function NULL_TO_GRAPHICS return to_GRAPHICS_t;
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type from_GRAPHICS_t is record
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y : std_logic_vector(10 downto 0);
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hblank : std_logic;
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vblank : std_logic;
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end record;
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component pace_video_controller is
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generic
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(
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CONFIG : PACEVideoController_t := PACE_VIDEO_NONE;
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DELAY : integer := 1;
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H_SIZE : integer;
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V_SIZE : integer;
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--H_SCALE : integer;
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--V_SCALE : integer;
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BORDER_RGB : RGB_t := RGB_BLACK
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);
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port
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(
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-- clocking etc
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video_i : in from_VIDEO_t;
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-- register interface
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reg_i : in VIDEO_REG_t;
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-- video input data
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rgb_i : in RGB_t;
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-- control signals (out)
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video_ctl_o : from_VIDEO_CTL_t;
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-- Outputs to video
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video_o : out to_VIDEO_t
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);
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end component pace_video_controller;
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component tilemapCtl is
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generic
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(
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DELAY : integer
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);
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port
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(
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reset : in std_logic;
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-- video control signals
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video_ctl : in from_VIDEO_CTL_t;
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-- tilemap controller signals
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ctl_i : in to_TILEMAP_CTL_t;
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ctl_o : out from_TILEMAP_CTL_t;
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graphics_i : in to_GRAPHICS_t
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);
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end component tilemapCtl;
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component bitmapCtl is
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generic
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(
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DELAY : integer
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);
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port
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(
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reset : in std_logic;
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-- video control signals
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video_ctl : in from_VIDEO_CTL_t;
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-- bitmap controller signals
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ctl_i : in to_BITMAP_CTL_t;
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ctl_o : out from_BITMAP_CTL_t;
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graphics_i : in to_GRAPHICS_t
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);
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end component bitmapCtl;
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end package video_controller_pkg;
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