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26 lines
1021 B
Systemverilog
26 lines
1021 B
Systemverilog
/* Atari on an FPGA
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Masters of Engineering Project
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Cornell University, 2007
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Daniel Beer
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RIOT.h
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Header file that contains useful definitions for the RIOT module.
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*/
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`define READ_RAM 7'b01xxxxx
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`define WRITE_RAM 7'b00xxxxx
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`define READ_DRA 7'b11xx000
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`define WRITE_DRA 7'b10xx000
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`define READ_DDRA 7'b11xx001
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`define WRITE_DDRA 7'b10xx001
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`define READ_DRB 7'b11xx010
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`define WRITE_DRB 7'b10xx010
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`define READ_DDRB 7'b11xx011
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`define WRITE_DDRB 7'b10xx011
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`define WRITE_TIMER 7'b101x1xx
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`define READ_TIMER 7'b11xx1x0
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`define READ_INT_FLAG 7'b11xx1x1
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`define WRITE_EDGE_DETECT 7'b100x1x0
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`define NOP 7'b0100000
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`define TM_1 2'b00
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`define TM_8 2'b01
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`define TM_64 2'b10
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`define TM_1024 2'b11 |