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40 lines
1.2 KiB
VHDL
40 lines
1.2 KiB
VHDL
-------------------------------------------------------------------------------
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--
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-- $Id: cond_branch_pack-p.vhd,v 1.1 2004/03/23 21:31:52 arniml Exp $
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--
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-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
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--
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-- All rights reserved
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--
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-------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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package cond_branch_pack is
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-----------------------------------------------------------------------------
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-- The branch conditions.
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-----------------------------------------------------------------------------
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type branch_conditions_t is (COND_ON_BIT, COND_Z,
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COND_C,
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COND_F0, COND_F1,
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COND_INT,
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COND_T0, COND_T1,
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COND_TF);
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subtype comp_value_t is std_logic_vector(2 downto 0);
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end cond_branch_pack;
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-------------------------------------------------------------------------------
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-- File History:
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--
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-- $Log: cond_branch_pack-p.vhd,v $
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-- Revision 1.1 2004/03/23 21:31:52 arniml
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-- initial check-in
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--
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--
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-------------------------------------------------------------------------------
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