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https://github.com/Gehstock/Mist_FPGA.git
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93 lines
5.5 KiB
Plaintext
93 lines
5.5 KiB
Plaintext
// Copyright Jamie Iles, 2017
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//
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// This file is part of s80x86.
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//
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// s80x86 is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// s80x86 is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with s80x86. If not, see <http://www.gnu.org/licenses/>.
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#ifndef ARITHMETIC_US
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#define ARITHMETIC_US
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#define ARITH_REGMEM_REG(opcode1, opcode2, alufunc, flags) \
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.at opcode1; \
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mar_write, mar_wr_sel EA, width WAUTO, ra_modrm_rm_reg, \
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jmp_rm_reg_mem alufunc ## opcode1 ##_reg, segment DS; \
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.at opcode2; \
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mar_write, mar_wr_sel EA, width WAUTO, ra_modrm_rm_reg, \
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jmp_rm_reg_mem alufunc ## opcode1 ##_reg, segment DS; \
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.auto_address; \
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alufunc ## opcode1 ## _reg: \
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a_sel RA, b_sel RB, alu_op alufunc, \
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rd_sel_source MODRM_RM_REG, update_flags flags, \
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width WAUTO, next_instruction; \
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alufunc ## opcode1 ## _mem: \
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segment DS, mem_read, width WAUTO; \
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a_sel MDR, b_sel RB, alu_op alufunc, mdr_write, \
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update_flags flags, width WAUTO, segment DS, jmp write_complete;
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#define ARITH_REG_REGMEM(opcode1, opcode2, alufunc, flags) \
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.at opcode1; \
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mar_write, mar_wr_sel EA, width WAUTO, ra_modrm_rm_reg, \
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jmp_rm_reg_mem alufunc ## opcode1 ## _reg, segment DS; \
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.at opcode2; \
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mar_write, mar_wr_sel EA, width WAUTO, ra_modrm_rm_reg, \
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jmp_rm_reg_mem alufunc ## opcode1 ## _reg, segment DS; \
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.auto_address; \
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alufunc ## opcode1 ## _reg: \
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a_sel RA, b_sel RB, alu_op alufunc, rd_sel_source MODRM_REG, \
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update_flags flags, width WAUTO, \
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next_instruction; \
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alufunc ## opcode1 ## _mem: \
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segment DS, mem_read, width WAUTO; \
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a_sel MDR, b_sel RB, alu_op alufunc, rd_sel_source MODRM_REG, \
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update_flags flags, width WAUTO, \
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next_instruction;
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#define ARITH_REGMEM_A(opcode1, opcode2, alufunc, flags) \
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.at opcode1; \
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width WAUTO, ra_sel AL, jmp alufunc ## opcode1; \
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.at opcode2; \
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width WAUTO, ra_sel AL, jmp alufunc ## opcode1; \
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.auto_address; \
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alufunc ## opcode1: \
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a_sel RA, b_sel IMMEDIATE, alu_op alufunc, \
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rd_sel_source MICROCODE_RD_SEL, rd_sel AL, \
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update_flags flags, width WAUTO, \
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next_instruction;
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#define ARITH_80_81(alufunc, flags) \
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alufunc ## 80_81_reg: \
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a_sel RA, b_sel IMMEDIATE, alu_op alufunc, \
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rd_sel_source MODRM_RM_REG, \
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width WAUTO, update_flags flags, next_instruction; \
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alufunc ## 80_81_mem: \
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segment DS, mem_read, width WAUTO; \
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a_sel MDR, b_sel IMMEDIATE, alu_op alufunc, \
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mdr_write, update_flags flags, segment DS, width WAUTO, jmp write_complete;
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#define ARITH_83(alufunc, flags) \
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alufunc ## 83_reg: \
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ra_modrm_rm_reg, jmp alufunc ## 83 ## regwrite; \
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alufunc ## 83_mem: \
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ra_modrm_rm_reg, segment DS, jmp alufunc ## 83 ## memwrite; \
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alufunc ## 83 ## regwrite: \
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a_sel RA, b_sel IMMEDIATE, alu_op alufunc, \
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rd_sel_source MODRM_RM_REG, \
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update_flags flags, next_instruction; \
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alufunc ## 83 ## memwrite: \
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segment DS, mem_read; \
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a_sel MDR, b_sel IMMEDIATE, alu_op alufunc, \
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mdr_write, update_flags flags, segment DS, jmp write_16_complete;
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#endif // ARITHMETIC_US
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