mirror of
https://github.com/Gehstock/Mist_FPGA.git
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85 lines
3.2 KiB
Plaintext
85 lines
3.2 KiB
Plaintext
// Copyright Jamie Iles, 2017
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//
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// This file is part of s80x86.
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//
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// s80x86 is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// s80x86 is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with s80x86. If not, see <http://www.gnu.org/licenses/>.
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// Multiplicand in TEMP, multiplier in MDR
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mulf6_reg:
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width W8, a_sel RA, alu_op SELA, mdr_write, ra_sel AL, jmp do_mul8;
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mulf6_mem:
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width W8, segment DS, mem_read, ra_sel AL, jmp do_mul8;
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do_mul8:
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width W8, a_sel RA, alu_op SELA, tmp_wr_en;
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// 8-bit multiplication yields a 16-bit result so move the result into
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// TEMP to later transfer to AX as a 16-bit operation.
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width W8, a_sel MDR, b_sel TEMP, alu_op MUL, update_flags ZF OF CF,
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tmp_wr_en;
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b_sel TEMP, alu_op SELB, rd_sel_source MICROCODE_RD_SEL, rd_sel AX,
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next_instruction;
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// Multiplicand in TEMP, multiplier in MDR
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mulf7_reg:
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a_sel RA, alu_op SELA, mdr_write, ra_sel AX, jmp do_mul16;
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mulf7_mem:
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segment DS, mem_read, ra_sel AX, jmp do_mul16;
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do_mul16:
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a_sel RA, alu_op SELA, tmp_wr_en;
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a_sel MDR, b_sel TEMP, alu_op MUL, update_flags ZF OF CF,
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tmp_wr_sel Q_HIGH, tmp_wr_en, rd_sel_source MICROCODE_RD_SEL,
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rd_sel AX;
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b_sel TEMP, alu_op SELB, rd_sel_source MICROCODE_RD_SEL, rd_sel DX,
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next_instruction;
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// imultiplicand in TEMP, imultiplier in MDR
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imulf6_reg:
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width W8, a_sel RA, alu_op SELA, mdr_write, ra_sel AL, jmp do_imul8;
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imulf6_mem:
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width W8, segment DS, mem_read, ra_sel AL, jmp do_imul8;
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do_imul8:
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width W8, a_sel RA, alu_op SELA, tmp_wr_en;
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// 8-bit imultiplication yields a 16-bit result so move the result into
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// TEMP to later transfer to AX as a 16-bit operation.
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width W8, a_sel MDR, b_sel TEMP, alu_op IMUL, update_flags ZF OF CF,
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tmp_wr_en;
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b_sel TEMP, alu_op SELB, rd_sel_source MICROCODE_RD_SEL, rd_sel AX,
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next_instruction;
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// imultiplicand in TEMP, imultiplier in MDR
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imulf7_reg:
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a_sel RA, alu_op SELA, mdr_write, ra_sel AX, jmp do_imul16;
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imulf7_mem:
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segment DS, mem_read, ra_sel AX, jmp do_imul16;
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do_imul16:
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a_sel RA, alu_op SELA, tmp_wr_en;
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a_sel MDR, b_sel TEMP, alu_op IMUL, update_flags ZF OF CF,
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tmp_wr_sel Q_HIGH, tmp_wr_en, rd_sel_source MICROCODE_RD_SEL,
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rd_sel AX;
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b_sel TEMP, alu_op SELB, rd_sel_source MICROCODE_RD_SEL, rd_sel DX,
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next_instruction;
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.at 0x6b;
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mar_write, mar_wr_sel EA, ra_modrm_rm_reg, segment DS, jmp_rm_reg_mem imul6b_reg;
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.auto_address;
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imul6b_reg:
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a_sel RA, b_sel IMMEDIATE, alu_op IMUL, update_flags ZF OF CF,
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rd_sel_source MODRM_REG, next_instruction;
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imul6b_mem:
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segment DS, mem_read;
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a_sel MDR, b_sel IMMEDIATE, alu_op IMUL, update_flags ZF OF CF,
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rd_sel_source MODRM_REG, next_instruction;
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.at 0x69;
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mar_write, mar_wr_sel EA, ra_modrm_rm_reg, segment DS, jmp_rm_reg_mem imul6b_reg;
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