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20 lines
260 B
Verilog
20 lines
260 B
Verilog
module CHAR_GEN_ROM
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(
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pixel_clock,
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address,
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data
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);
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input pixel_clock;
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input [11:0] address;
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output wire [7:0] data;
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// Character generator
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char_rom_4k_altera char_rom(
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.address(address),
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.clock(pixel_clock),
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.q(data)
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);
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endmodule //CHAR_GEN_ROM
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