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232 lines
7.3 KiB
VHDL
232 lines
7.3 KiB
VHDL
-------------------------------------------------------------------------------
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--
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-- T8048 Microcontroller System
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--
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-- $Id: t8048.vhd,v 1.11 2006/07/14 01:13:32 arniml Exp $
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-- $Name: $
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--
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-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
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--
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-- All rights reserved
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--
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-- Redistribution and use in source and synthezised forms, with or without
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-- modification, are permitted provided that the following conditions are met:
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--
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-- Redistributions of source code must retain the above copyright notice,
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-- this list of conditions and the following disclaimer.
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--
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-- Redistributions in synthesized form must reproduce the above copyright
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-- notice, this list of conditions and the following disclaimer in the
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-- documentation and/or other materials provided with the distribution.
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--
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-- Neither the name of the author nor the names of other contributors may
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-- be used to endorse or promote products derived from this software without
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-- specific prior written permission.
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--
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-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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-- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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-- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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-- PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
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-- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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-- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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-- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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-- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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-- POSSIBILITY OF SUCH DAMAGE.
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--
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-- Please report bugs to the author, but before you do so, please
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-- make sure that this is not a derivative work and that
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-- you have the latest version of this file.
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--
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-- The latest version of this file can be found at:
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-- http://www.opencores.org/cvsweb.shtml/t48/
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--
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-------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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entity t8048 is
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port (
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xtal_i : in std_logic;
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reset_n_i : in std_logic;
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t0_b : inout std_logic;
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int_n_i : in std_logic;
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ea_i : in std_logic;
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rd_n_o : out std_logic;
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psen_n_o : out std_logic;
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wr_n_o : out std_logic;
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ale_o : out std_logic;
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db_b : inout std_logic_vector( 7 downto 0);
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t1_i : in std_logic;
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p2_b : inout std_logic_vector( 7 downto 0);
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p1_b : inout std_logic_vector( 7 downto 0);
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prog_n_o : out std_logic
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);
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end t8048;
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library ieee;
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use ieee.numeric_std.all;
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use work.t48_system_comp_pack.t8048_notri;
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architecture struct of t8048 is
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signal t0_s : std_logic;
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signal t0_dir_s : std_logic;
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signal db_s : std_logic_vector( 7 downto 0);
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signal db_dir_s : std_logic;
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signal p2_s : std_logic_vector( 7 downto 0);
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signal p2l_low_imp_s : std_logic;
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signal p2h_low_imp_s : std_logic;
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signal p1_s : std_logic_vector( 7 downto 0);
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signal p1_low_imp_s : std_logic;
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signal vdd_s : std_logic;
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begin
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vdd_s <= '1';
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t8048_notri_b : t8048_notri
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generic map (
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-- we don't need explicit gating of input ports
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-- this is done implicitely by the bidirectional pads
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gate_port_input_g => 0
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)
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port map (
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xtal_i => xtal_i,
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xtal_en_i => vdd_s,
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reset_n_i => reset_n_i,
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t0_i => t0_b,
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t0_o => t0_s,
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t0_dir_o => t0_dir_s,
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int_n_i => int_n_i,
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ea_i => ea_i,
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rd_n_o => rd_n_o,
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psen_n_o => psen_n_o,
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wr_n_o => wr_n_o,
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ale_o => ale_o,
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db_i => db_b,
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db_o => db_s,
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db_dir_o => db_dir_s,
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t1_i => t1_i,
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p2_i => p2_b,
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p2_o => p2_s,
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p2l_low_imp_o => p2l_low_imp_s,
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p2h_low_imp_o => p2h_low_imp_s,
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p1_i => p1_b,
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p1_o => p1_s,
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p1_low_imp_o => p1_low_imp_s,
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prog_n_o => prog_n_o
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);
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-----------------------------------------------------------------------------
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-- Process bidirs
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--
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-- Purpose:
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-- Assign bidirectional signals.
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--
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bidirs: process (t0_b, t0_s, t0_dir_s,
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db_b, db_s, db_dir_s,
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p1_b, p1_s, p1_low_imp_s,
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p2_b, p2_s, p2l_low_imp_s, p2h_low_imp_s)
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function port_bidir_f(port_value : in std_logic_vector;
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low_imp : in std_logic) return std_logic_vector is
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variable result_v : std_logic_vector(port_value'range);
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begin
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for idx in port_value'high downto port_value'low loop
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if low_imp = '1' then
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result_v(idx) := port_value(idx);
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elsif port_value(idx) = '0' then
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result_v(idx) := '0';
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else
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result_v(idx) := 'Z';
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end if;
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end loop;
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return result_v;
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end;
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begin
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-- Test 0 -----------------------------------------------------------------
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if t0_dir_s = '1' then
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t0_b <= t0_s;
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else
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t0_b <= 'Z';
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end if;
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-- Data Bus ---------------------------------------------------------------
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if db_dir_s = '1' then
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db_b <= db_s;
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else
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db_b <= (others => 'Z');
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end if;
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-- Port 1 -----------------------------------------------------------------
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p1_b <= port_bidir_f(port_value => p1_s,
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low_imp => p1_low_imp_s);
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-- Port 2 -----------------------------------------------------------------
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p2_b(3 downto 0) <= port_bidir_f(port_value => p2_s(3 downto 0),
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low_imp => p2l_low_imp_s);
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p2_b(7 downto 4) <= port_bidir_f(port_value => p2_s(7 downto 4),
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low_imp => p2h_low_imp_s);
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end process bidirs;
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--
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-----------------------------------------------------------------------------
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end struct;
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-------------------------------------------------------------------------------
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-- File History:
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--
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-- $Log: t8048.vhd,v $
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-- Revision 1.11 2006/07/14 01:13:32 arniml
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-- name keyword added
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--
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-- Revision 1.10 2006/06/20 00:47:08 arniml
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-- new input xtal_en_i
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--
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-- Revision 1.9 2005/11/02 23:41:43 arniml
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-- properly drive P1 and P2 with low impedance markers
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--
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-- Revision 1.8 2005/11/01 21:38:31 arniml
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-- wire signals for P2 low impedance marker issue
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--
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-- Revision 1.7 2004/12/03 19:44:36 arniml
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-- removed obsolete constant
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--
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-- Revision 1.6 2004/12/02 22:08:42 arniml
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-- introduced generic gate_port_input_g
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-- forces masking of P1 and P2 input bus
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--
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-- Revision 1.5 2004/12/01 23:09:47 arniml
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-- intruduced hierarchy t8048_notri where all system functionality
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-- except bidirectional ports is handled
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--
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-- Revision 1.4 2004/10/24 09:10:16 arniml
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-- Fix for:
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-- P1 constantly in push-pull mode in t8048
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--
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-- Revision 1.3 2004/05/20 21:58:26 arniml
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-- Fix for:
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-- External Program Memory ignored when EA = 0
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--
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-- Revision 1.2 2004/03/29 19:40:14 arniml
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-- rename pX_limp to pX_low_imp
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--
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-- Revision 1.1 2004/03/24 21:32:27 arniml
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-- initial check-in
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--
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-------------------------------------------------------------------------------
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