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https://github.com/Gehstock/Mist_FPGA.git
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32 lines
687 B
VHDL
32 lines
687 B
VHDL
library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_unsigned.all;
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library work;
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use work.pace_pkg.all;
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package target_pkg is
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--
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-- PACE constants which *MUST* be defined
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--
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constant PACE_TARGET : PACETargetType := PACE_TARGET_MIST;
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constant PACE_FPGA_VENDOR : PACEFpgaVendor_t := PACE_FPGA_VENDOR_ALTERA;
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constant PACE_FPGA_FAMILY : PACEFpgaFamily_t := PACE_FPGA_FAMILY_CYCLONE3;
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constant PACE_CLKIN0 : natural := 27;
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constant PACE_HAS_SPI : boolean := false;
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--
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-- DE1-specific constants
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--
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type from_TARGET_IO_t is record
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not_used : std_logic;
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end record;
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type to_TARGET_IO_t is record
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not_used : std_logic;
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end record;
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end;
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