mirror of
https://github.com/Interlisp/maiko.git
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Remove assembly fn call optimizations. (#276)
These were for old platforms and not used in recent history. There's no NOASMFNCALL flag as there's no more asm fn call code.
This commit is contained in:
Bruce Mitchener
GitHub
@@ -224,38 +224,3 @@ addbase_err: \
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asm(" movw %ax,%bx"); \
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asm(" rorl $16,%ebx"); \
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nextop1; }
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/***********/
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/* Fast function call */
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#undef FN0
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#define FN0 fast_FN0()
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#undef FN1
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#define FN1 fast_FN1()
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#undef FN2
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#define FN2 fast_FN2()
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#undef FN3
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#define FN3 fast_FN3()
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#undef FN4
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#define FN4 fast_FN4()
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#undef FN5
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#define FN5 fast_FN5()
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#undef FN6
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#define FN6 fast_FN6()
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#undef FN7
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#define FN7 fast_FN7()
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#undef FN8
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#define FN8 fast_FN8()
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#undef FN9
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#define FN9 fast_FN9()
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@@ -40,10 +40,6 @@
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#undef NTYPEX
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#undef TYPEP
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#undef SWAP_WORDS
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/*
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#undef FN3
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#undef RETURN
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*/
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#define SWAP_WORDS(x) swapx(x)
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351
inc/inlnPS2.h
351
inc/inlnPS2.h
@@ -695,354 +695,3 @@ extern inline void fast_op_addbase(LispPTR value)
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asm(" rorl $16,%ebx"); \
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nextop1; }
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/***********/
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/* Fast function call */
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#define asm_label_check_interrupt() asm volatile("check_interrupt:");
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/* * These are the pieces of the function-call code. lbl is the label
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to use to defeat the dead-code eliminator, lpfx is the string to
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be used to disambiguate interior labels in the asm code, and nargs
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is the number of args in this FN call (e.g. FN0 => 0) */
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#define fn_section1(lbl,lpfx,nargs) \
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struct fnhead *LOCFNCELL; \
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int defcell_word; \
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int NEXTBLOCK; \
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int result; \
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int RESTARGS; \
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asm volatile(" \n\
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movl %%esi,%%eax // fn_atom_index = \n\
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xorb $3,%%al // get_AtomNo_PCMAC1 \n\
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movzbl (%%eax),%%edx \n\
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sall $16,%%edx \n\
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leal 1(%%esi),%%eax \n\
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xorb $3,%%al \n\
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movb (%%eax),%%dh \n\
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leal 2(%%esi),%%eax \n\
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xorb $3,%%al \n\
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movb (%%eax),%%dl \n\
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movl %%edx,%0 // fn_atom_index is in edx now. \n\
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" : "=g" (fn_atom_index) : : "ax", "cx", "dx"); \
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#define fnx_section1(lbl,lpfx,nargs) \
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struct fnhead *LOCFNCELL; \
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int defcell_word; \
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int NEXTBLOCK; \
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int result, num_args; \
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int RESTARGS; \
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asm volatile(" \n\
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leal 0(%%esi),%%eax \n\
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xorb $3,%%al \n\
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movzbl (%%eax),%%edx \n\
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movl %%edx,%1 // num_args = Get_Byte_PCMAC1; \n\
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leal 1(%%esi),%%eax // fn_atom_index = \n\
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xorb $3,%%al // get_AtomNo_PCMAC1 \n\
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movzbl (%%eax),%%edx \n\
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sall $16,%%edx \n\
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leal 2(%%esi),%%eax \n\
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xorb $3,%%al \n\
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movb (%%eax),%%dh \n\
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leal 3(%%esi),%%eax \n\
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xorb $3,%%al \n\
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movb (%%eax),%%dl \n\
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movl %%edx,%0 // fn_atom_index is in edx now. \n\
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" : "=g" (fn_atom_index), "=g" (num_args) : : "ax", "cx", "dx"); \
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#define fn_section1a(lbl,lpfx,nargs) \
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asm volatile(" \n\
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testl $16711680,%%edx \n\
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je ." lpfx "118 \n\
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addl %%edx,%%edx // new atom case \n\
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addl Lisp_world,%%edx \n\
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addl $8,%%edx \n\
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jmp ." lpfx "119 \n\
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.align 4 \n\
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." lpfx "118: \n\
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sall $2,%%edx \n\
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addl Defspace,%%edx \n\
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." lpfx "119: \n\
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movl %%edx,%0 // to -92 \n\
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" : "=g" (fn_defcell) : "g" (fn_atom_index) : "ax", "cx", "dx"); \
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\
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asm volatile(" \n\
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movl (%%edx),%%eax \n\
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movl %%eax,%0 // to -32 (must remain, it's used by C below) \n\
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testl %%eax,%%eax // if defcell_word>0 \n\
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jnl ." lpfx "120 \n\
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testl $0x4000000,%%eax / check for needs-byte-swapping \n\
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jnz ." lpfx "swap / if so, go do it out of line. \n\
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" : "=g" (defcell_word) : "g" (fn_defcell) : "ax", "dx"); \
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lbl: \
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asm volatile(" \n\
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/ .align 4 / this isn't usually the target of a branch. \n\
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andl $16777215,%%eax \n\
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movl %%eax,%1 \n\
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addl %%eax,%%eax \n\
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addl Lisp_world,%%eax \n\
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movl %%eax,%0 // to -80 \n\
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" : "=g" (LOCFNCELL), "=g" (defcell_word) : : "cx"); \
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\
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asm volatile(" \n\
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movw MachineState+20,%%dx // currentfx pc = \n\
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incw %%dx \n\
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movl %%esi,%%ecx // PCMAC - \n\
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subw %%dx,%%cx // funcobj \n\
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addw $4,%%cx // + opcode size \n\
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movl MachineState+4,%%edx \n\
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movw %%cx,-12(%%edx) // save in frame \n\
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movzwl 2(%%eax),%%edx \n\
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addl %%edx,%%edx \n\
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movl MachineState+32,%%eax \n\
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subl %%edx,%%eax \n\
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movl %%eax,MachineState+28 // Irq_Stk_Check = \n\
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cmpl %%eax,%%edi \n\
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jg check_interrupt //goto check_interrupt \n\
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" : : "g" (LOCFNCELL) : "ax", "dx", "cx");
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#define fn_section2(lpfx) \
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asm volatile(" \n\
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movl %%ecx,MachineState \n\
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subl Stackspace,%%ecx \n\
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shrl $1,%%ecx // NEXTBLOCK in -88 \n\
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movl %%ecx,%0 \n\
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movl MachineState+4,%%edx \n\
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movw %%cx,-10(%%edx) // currentfx->nextblock = \n\
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movl %%ebx,(%%edi) // HARD_PUSH tos \n\
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addl $4,%%edi \n\
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" : "=g" (NEXTBLOCK) : : "ax", "dx", "cx"); \
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\
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asm volatile(" \n\
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movl %1,%%ecx // if LOCFNCELL->na \n\
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cmpw $0,(%%ecx) // >= 0 \n\
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jl ." lpfx "122 \n\
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// then \n\
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movswl (%%ecx),%%ecx // RESTARGS = #args(0) \n\
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" : "=g" (RESTARGS) : "g" (LOCFNCELL) : "ax", "dx", "cx");
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/* Between these sections comes some code that subtracts */
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/* the true arg count from %ecx. It's safe to use eax if you need it */
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#define fn_section3(lpfx,nargs) \
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asm volatile(" \n\
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jle ." lpfx "124 // if < 0, skip loop. \n\
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.align 4 \n\
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." lpfx "125: // while RESTARGS<0 \n\
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xorl %%eax,%%eax // storing NILs \n\
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cld // so stosl increments edi \n\
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rep // repeat for ecx count \n\
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stosl // store them. \n\
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." lpfx "124: \n\
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sall $2,%%ecx // RESTARGS \n\
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addl %%ecx,%%edi // ecx is <= 0 here.... \n\
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" : "=g" (RESTARGS) : "g" (LOCFNCELL) : "ax", "dx", "cx"); \
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\
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asm volatile(" \n\
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." lpfx "122: // na <0 ?? \n\
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movl %1,%%ecx // HARDPUSH(BFMARK | NEXTBLOCK) \n\
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orl $-2147483648,%%ecx \n\
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movl %%ecx,(%%edi) \n\
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movl MachineState+4,%%edx // * CSTKPTR = \n\
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subl Stackspace,%%edx // FXMARK<<16 | \n\
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shrl $1,%%edx // StkOffsetfrom68k(PVAR). \n\
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orl $-1073741824,%%edx \n\
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movl %%edx,4(%%edi) \n\
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\n\
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movl %3,%%eax // fnheader = \n\
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roll $16,%%eax // swapx(defcell_word) \n\
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movl %%eax,8(%%edi) \n\
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leal 24(%%edi),%%edi // CSTKPTRL = \n\
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movl %%edi,MachineState+4 // PVAR = CSTKPTR \n\
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\n\
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movl %2,%%edx // result = \n\
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movswl 6(%%edx),%%ecx // LOCFNCELL->pv \n\
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incl %%ecx // pv is (# of quadwords)-1, so inc it. \n\
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shll $1,%%ecx // and * 2 to get 32-bit words worth \n\
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cld // so stosl increments edi \n\
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movl $-1,%%eax // The UNBOUND_VALUE to be pushed \n\
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rep \n\
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stosl \n\
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." lpfx "127: \n\
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leal 4(%%edi),%%edi // CSTKPTRL += 1 \n\
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movl %2,%%ecx // PCMACL = LOCFNCELL \n\
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movzwl 4(%%ecx),%%ecx // + LOCFNCELL-> startpc \n\
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movl %2,%%edx \n\
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leal 1(%%ecx,%%edx),%%edx \n\
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movl %%edx,%%esi //replace above 2 inst \n\
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movl %2,%%eax //FuncObj = LOCFNCELL \n\
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movl %%eax,MachineState+20 \n\
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" : "=&g" (result) : "g" (NEXTBLOCK), "g" (LOCFNCELL), \
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"g" (defcell_word) : "ax", "dx", "cx"); \
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\
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fast0_dispatcher(); /* can't be nextop0, or the following */ \
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/* code winds up dead and removed. */ \
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asm volatile(" \n\
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.align 4 \n\
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." lpfx "swap: / Come here if we need to byte-swap the fn \n\
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pushl %%eax \n\
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pushl %%eax \n\
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call byte_swap_code_block / swap it \n\
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popl %%eax \n\
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popl %%eax \n\
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jmp %l0" : : "" (&&lbl)); \
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asm volatile(" \n\
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.align 4 \n\
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." lpfx "swap: / Come here if we need to byte-swap the fn \n\
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call byte_swap_ \n\
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." lpfx "120:");
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#define fn_section4(nargs) \
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{ /* it's not a CCODEP */ \
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fn_num_args = nargs /* argcount*/; \
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fn_opcode_size = FN_OPCODE_SIZE; \
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fn_apply = 0; \
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goto op_fn_common; \
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} \
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#undef FN0
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#define FN0 \
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{ \
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fn_section1(L0120,"0",0); \
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fn_section1a(L0120,"0",0); \
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asm volatile(" \n\
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leal 4(%edi),%ecx // newivar = CSTKPTR-argcount+1"); \
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fn_section2("0"); \
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/* decl %%ecx's would go here, 1 per arg */ \
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fn_section3("0",0); \
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fn_section4(0); \
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}
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#undef FN1
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#define FN1 \
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{ \
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fn_section1(L1120,"1",1); \
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fn_section1a(L1120,"1",1); \
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asm volatile(" \n\
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leal (%edi),%ecx // newivar = CSTKPTR-argcount+1"); \
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fn_section2("1"); \
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asm volatile("decl %ecx"); \
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fn_section3("1",1); \
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fn_section4(1); \
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}
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#undef FN2
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#define FN2 \
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{ \
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fn_section1(L2120,"2",2); \
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fn_section1a(L2120,"2",2); \
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asm volatile(" \n\
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leal -4(%edi),%ecx // newivar = CSTKPTR-argcount+1"); \
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fn_section2("2"); \
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asm volatile("subl $2,%ecx"); \
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fn_section3("2",2); \
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fn_section4(2); \
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}
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#undef FN3
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#define FN3 \
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{ \
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fn_section1(L3120,"3",3); \
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fn_section1a(L3120,"3",3); \
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asm volatile(" \n\
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leal -8(%edi),%ecx // newivar = CSTKPTR-argcount+1"); \
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fn_section2("3"); \
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asm volatile("subl $3,%ecx"); \
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fn_section3("3",3); \
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fn_section4(3); \
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}
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#undef FN4
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#define FN4 \
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{ \
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fn_section1(L4120,"4",4); \
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fn_section1a(L4120,"4",4); \
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asm volatile(" \n\
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leal -12(%edi),%ecx // newivar = CSTKPTR-argcount+1"); \
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fn_section2("4"); \
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asm volatile("subl $4,%ecx"); \
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fn_section3("4",4); \
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fn_section4(4); \
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}
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#undef xFNX
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#define xFNX \
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{ \
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fnx_section1(Lx120,"x",4); \
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fn_section1a(Lx120,"x",4); \
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asm volatile(" \n\
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movl %0,%%eax // get num_args \n\
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leal -4(,%%eax,4),%%eax \n\
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negl %%eax \n\
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leal (%%edi,%%eax),%%ecx // newivar = CSTKPTR-argcount+1" : : "g" (num_args)); \
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fn_section2("x"); \
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asm volatile("subl %0,%%ecx" : : "g" (num_args)); \
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fn_section3("x",4); \
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{ /* it's not a CCODEP */ \
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fn_num_args = num_args; /* argcount*/ \
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fn_opcode_size = FNX_OPCODE_SIZE; \
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fn_apply = 0; \
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goto op_fn_common; \
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} \
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}
|
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|
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|
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/************************************************************************/
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/* */
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/* o p r e t u r n */
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/* */
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/* Inline version of the RETURN opcode. */
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/* */
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/************************************************************************/
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inline const extern void opreturn()
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{
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asm volatile(" \n\
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movl MachineState+4,%%edx \n\
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movzwl -20(%%edx),%%edx \n\
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testb $1,%%dl \n\
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jne opret_fail \n\
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movl MachineState,%%edi \n\
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movl Stackspace,%%ecx \n\
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leal 0(%%ecx,%%edx,2),%%eax \n\
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movl %%eax,MachineState+4 \n\
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leal -22(%%eax),%%edx \n\
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xorb $2,%%dl \n\
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movzwl (%%edx),%%edx \n\
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leal 0(%%ecx,%%edx,2),%%edx \n\
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movl %%edx,MachineState \n\
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movl -16(%%eax),%%ecx \n\
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roll $16,%%ecx \n\
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andl $16777215,%%ecx \n\
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addl %%ecx,%%ecx \n\
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addl Lisp_world,%%ecx \n\
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movl %%ecx,MachineState+20 \n\
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movzwl -12(%%eax),%%eax \n\
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leal 1(%%eax,%%ecx),%%esi \n\
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movzwl 2(%%ecx),%%edx \n\
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addl %%edx,%%edx \n\
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movl MachineState+24,%%eax \n\
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subl %%edx,%%eax \n\
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movl %%eax,MachineState+28 \n\
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cmpl %%eax,%%edi \n\
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jg check_interrupt \n\
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cmpl $0,MachineState+32 \n\
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jle check_interrupt \n\
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movl MachineState+24,%%ecx \n\
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movl %%ecx,MachineState+32 \n\
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\n\
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leal -1(%%esi),%%eax \n\
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xorb $3,%%al \n\
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||||
movzbl (%%eax),%%eax \n\
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jmp *optable(,%%eax,4) \n\
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\n\
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.align 4 \n\
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opret_fail:" : : : "ax", "dx", "cx");
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}
|
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|
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358
inc/inlndos.h
358
inc/inlndos.h
@@ -701,361 +701,3 @@ extern inline void fast_op_addbase(LispPTR value)
|
||||
asm(" ror ebx,16"); \
|
||||
nextop1; }
|
||||
|
||||
|
||||
|
||||
#ifdef NOTYET
|
||||
TO FIX FIXME: Need to fix instruction names, and operand order.
|
||||
TO FIX FIXME: $constant -> constant, (edi) -> [edi],
|
||||
|
||||
/***********/
|
||||
/* Fast function call */
|
||||
#define asm_label_check_interrupt() asm volatile("check_interrupt:");
|
||||
|
||||
/* * These are the pieces of the function-call code. lbl is the label
|
||||
to use to defeat the dead-code eliminator, lpfx is the string to
|
||||
be used to disambiguate interior labels in the asm code, and nargs
|
||||
is the number of args in this FN call (e.g. FN0 => 0) */
|
||||
|
||||
#define fn_section1(lbl,lpfx,nargs) \
|
||||
struct fnhead *LOCFNCELL; \
|
||||
int defcell_word; \
|
||||
int NEXTBLOCK; \
|
||||
int result; \
|
||||
int RESTARGS; \
|
||||
asm volatile(" \n\
|
||||
mov eax,esi // fn_atom_index = \n\
|
||||
xor al,3 // get_AtomNo_PCMAC1 \n\
|
||||
movz edx, byte ptr [eax] \n\
|
||||
sal edx,16 \n\
|
||||
leal eax,1[esi] \n\
|
||||
xorb al,3 \n\
|
||||
movb dh,[eax] \n\
|
||||
leal eax,2[esi] \n\
|
||||
xorb al,3 \n\
|
||||
movb dl,[eax] \n\
|
||||
movl %0,edx // fn_atom_index is in edx now. \n\
|
||||
" : "=g" (fn_atom_index) : : "ax", "cx", "dx"); \
|
||||
|
||||
#define fnx_section1(lbl,lpfx,nargs) \
|
||||
struct fnhead *LOCFNCELL; \
|
||||
int defcell_word; \
|
||||
int NEXTBLOCK; \
|
||||
int result, num_args; \
|
||||
int RESTARGS; \
|
||||
asm volatile(" \n\
|
||||
lea eax,0[esi] \n\
|
||||
xor al,3 \n\
|
||||
movz edx, byte ptr [eax] \n\
|
||||
mov %1,edx // num_args = Get_Byte_PCMAC1; \n\
|
||||
lea eax,1[esi] // fn_atom_index = \n\
|
||||
xor al,$3 // get_AtomNo_PCMAC1 \n\
|
||||
movz edx, byte ptr [eax] \n\
|
||||
sal edx,16 \n\
|
||||
lea eax,2[esi] \n\
|
||||
xor al,3 \n\
|
||||
mov dh, byte ptr [eax] \n\
|
||||
lea eax,3[esi] \n\
|
||||
xor al,3 \n\
|
||||
mov dl, byte ptr [eax] \n\
|
||||
mov %0,edx // fn_atom_index is in edx now. \n\
|
||||
" : "=g" (fn_atom_index), "=g" (num_args) : : "ax", "cx", "dx"); \
|
||||
|
||||
#define fn_section1a(lbl,lpfx,nargs) \
|
||||
asm volatile(" \n\
|
||||
test edx,16711680 \n\
|
||||
je ." lpfx "118 \n\
|
||||
add edx,edx // new atom case \n\
|
||||
add edx, dword ptr Lisp_world \n\
|
||||
add edx,8 \n\
|
||||
jmp ." lpfx "119 \n\
|
||||
.align 4 \n\
|
||||
." lpfx "118: \n\
|
||||
sal edx,2 \n\
|
||||
add edx, dword ptr Defspace \n\
|
||||
." lpfx "119: \n\
|
||||
mov %0,edx // to -92 \n\
|
||||
" : "=g" (fn_defcell) : "g" (fn_atom_index) : "ax", "cx", "dx"); \
|
||||
\
|
||||
asm volatile(" \n\
|
||||
movl eax,(edx) \n\
|
||||
movl %0,eax // to -32 (must remain, it's used by C below) \n\
|
||||
testl eax,eax // if defcell_word>0 \n\
|
||||
jnl ." lpfx "120 \n\
|
||||
testl eax,$0x4000000 / check for needs-byte-swapping \n\
|
||||
jnz ." lpfx "swap / if so, go do it out of line. \n\
|
||||
" : "=g" (defcell_word) : "g" (fn_defcell) : "ax", "dx"); \
|
||||
lbl: \
|
||||
asm volatile(" \n\
|
||||
/ .align 4 / this isn't usually the target of a branch. \n\
|
||||
andl eax,$16777215 \n\
|
||||
movl %1,eax \n\
|
||||
addl eax,eax \n\
|
||||
addl eax,Lisp_world \n\
|
||||
movl %0,eax // to -80 \n\
|
||||
" : "=g" (LOCFNCELL), "=g" (defcell_word) : : "cx"); \
|
||||
\
|
||||
asm volatile(" \n\
|
||||
movw MachineState+20,dx // currentfx pc = \n\
|
||||
incw dx \n\
|
||||
movl esi,ecx // PCMAC - \n\
|
||||
subw dx,cx // funcobj \n\
|
||||
addw $4,cx // + opcode size \n\
|
||||
movl MachineState+4,edx \n\
|
||||
movw cx,-12(edx) // save in frame \n\
|
||||
movzwl 2(eax),edx \n\
|
||||
addl edx,edx \n\
|
||||
movl MachineState+32,eax \n\
|
||||
subl edx,eax \n\
|
||||
movl eax,MachineState+28 // Irq_Stk_Check = \n\
|
||||
cmpl eax,edi \n\
|
||||
jg check_interrupt //goto check_interrupt \n\
|
||||
" : : "g" (LOCFNCELL) : "ax", "dx", "cx");
|
||||
|
||||
#define fn_section2(lpfx) \
|
||||
asm volatile(" \n\
|
||||
movl ecx,MachineState \n\
|
||||
subl Stackspace,ecx \n\
|
||||
shrl $1,ecx // NEXTBLOCK in -88 \n\
|
||||
movl ecx,%0 \n\
|
||||
movl MachineState+4,edx \n\
|
||||
movw cx,-10(edx) // currentfx->nextblock = \n\
|
||||
movl ebx,(edi) // HARD_PUSH tos \n\
|
||||
addl $4,edi \n\
|
||||
" : "=g" (NEXTBLOCK) : : "ax", "dx", "cx"); \
|
||||
\
|
||||
asm volatile(" \n\
|
||||
movl %1,ecx // if LOCFNCELL->na \n\
|
||||
cmpw $0,(ecx) // >= 0 \n\
|
||||
jl ." lpfx "122 \n\
|
||||
// then \n\
|
||||
movswl (ecx),ecx // RESTARGS = #args(0) \n\
|
||||
" : "=g" (RESTARGS) : "g" (LOCFNCELL) : "ax", "dx", "cx");
|
||||
|
||||
/* Between these sections comes some code that subtracts */
|
||||
/* the true arg count from %ecx. It's safe to use eax if you need it */
|
||||
|
||||
#define fn_section3(lpfx,nargs,lbl) \
|
||||
asm volatile(" \n\
|
||||
jle ." lpfx "124 // if < 0, skip loop. \n\
|
||||
.align 4 \n\
|
||||
." lpfx "125: // while RESTARGS<0 \n\
|
||||
xorl eax,eax // storing NILs \n\
|
||||
cld // so stosl increments edi \n\
|
||||
rep // repeat for ecx count \n\
|
||||
stosl // store them. \n\
|
||||
." lpfx "124: \n\
|
||||
sall $2,ecx // RESTARGS \n\
|
||||
addl ecx,edi // ecx is <= 0 here.... \n\
|
||||
" : "=g" (RESTARGS) : "g" (LOCFNCELL) : "ax", "dx", "cx"); \
|
||||
\
|
||||
asm volatile(" \n\
|
||||
." lpfx "122: // na <0 ?? \n\
|
||||
movl %1,ecx // HARDPUSH(BFMARK | NEXTBLOCK) \n\
|
||||
orl $-2147483648,ecx \n\
|
||||
movl ecx,(edi) \n\
|
||||
movl MachineState+4,edx // * CSTKPTR = \n\
|
||||
subl Stackspace,edx // FXMARK<<16 | \n\
|
||||
shrl $1,edx // StkOffsetfrom68k(PVAR). \n\
|
||||
orl $-1073741824,edx \n\
|
||||
movl edx,4(edi) \n\
|
||||
\n\
|
||||
movl %3,eax // fnheader = \n\
|
||||
roll $16,eax // swapx(defcell_word) \n\
|
||||
movl eax,8(edi) \n\
|
||||
leal 24(edi),edi // CSTKPTRL = \n\
|
||||
movl edi,MachineState+4 // PVAR = CSTKPTR \n\
|
||||
\n\
|
||||
movl %2,edx // result = \n\
|
||||
movswl 6(edx),ecx // LOCFNCELL->pv \n\
|
||||
incl ecx // pv is (# of quadwords)-1, so inc it. \n\
|
||||
shll $1,ecx // and * 2 to get 32-bit words worth \n\
|
||||
cld // so stosl increments edi \n\
|
||||
movl $-1,eax // The UNBOUND_VALUE to be pushed \n\
|
||||
rep \n\
|
||||
stosl \n\
|
||||
." lpfx "127: \n\
|
||||
leal 4(edi),edi // CSTKPTRL += 1 \n\
|
||||
movl %2,ecx // PCMACL = LOCFNCELL \n\
|
||||
movzwl 4(ecx),ecx // + LOCFNCELL-> startpc \n\
|
||||
movl %2,edx \n\
|
||||
leal 1(ecx,edx),edx \n\
|
||||
movl edx,esi //replace above 2 inst \n\
|
||||
movl %2,eax //FuncObj = LOCFNCELL \n\
|
||||
movl eax,MachineState+20 \n\
|
||||
" : "=&g" (result) : "g" (NEXTBLOCK), "g" (LOCFNCELL), \
|
||||
"g" (defcell_word) : "ax", "dx", "cx"); \
|
||||
\
|
||||
fast0_dispatcher(); /* can't be nextop0, or the following */ \
|
||||
/* code winds up dead and removed. */ \
|
||||
asm volatile(" \n\
|
||||
.align 4 \n\
|
||||
." lpfx "swap: / Come here if we need to byte-swap the fn \n\
|
||||
pushl eax \n\
|
||||
pushl eax \n\
|
||||
call byte_swap_code_block / swap it \n\
|
||||
popl eax \n\
|
||||
popl eax \n\
|
||||
jmp %l0" : : "" (&&lbl)); \
|
||||
asm volatile(" \n\
|
||||
.align 4 \n\
|
||||
." lpfx "swap: / Come here if we need to byte-swap the fn \n\
|
||||
call byte_swap_
|
||||
." lpfx "120:");
|
||||
|
||||
|
||||
#define fn_section4(nargs) \
|
||||
{ /* it's not a CCODEP */ \
|
||||
fn_num_args = nargs /* argcount*/; \
|
||||
fn_opcode_size = FN_OPCODE_SIZE; \
|
||||
fn_apply = 0; \
|
||||
goto op_fn_common; \
|
||||
} \
|
||||
|
||||
|
||||
|
||||
#undef FN0
|
||||
#define FN0 \
|
||||
{ \
|
||||
fn_section1(L0120,"0",0); \
|
||||
fn_section1a(L0120,"0",0); \
|
||||
asm volatile(" \n\
|
||||
leal 4(%edi),%ecx // newivar = CSTKPTR-argcount+1"); \
|
||||
fn_section2("0"); \
|
||||
/* decl ecx's would go here, 1 per arg */ \
|
||||
fn_section3("0",0,L0120); \
|
||||
fn_section4(0); \
|
||||
}
|
||||
|
||||
|
||||
#undef FN1
|
||||
#define FN1 \
|
||||
{ \
|
||||
fn_section1(L1120,"1",1); \
|
||||
fn_section1a(L1120,"1",1); \
|
||||
asm volatile(" \n\
|
||||
leal (%edi),%ecx // newivar = CSTKPTR-argcount+1"); \
|
||||
fn_section2("1"); \
|
||||
asm volatile("decl %ecx"); \
|
||||
fn_section3("1",1,L1120); \
|
||||
fn_section4(1); \
|
||||
}
|
||||
|
||||
#undef FN2
|
||||
#define FN2 \
|
||||
{ \
|
||||
fn_section1(L2120,"2",2); \
|
||||
fn_section1a(L2120,"2",2); \
|
||||
asm volatile(" \n\
|
||||
leal -4(%edi),%ecx // newivar = CSTKPTR-argcount+1"); \
|
||||
fn_section2("2"); \
|
||||
asm volatile("subl $2,%ecx"); \
|
||||
fn_section3("2",2,L2120); \
|
||||
fn_section4(2); \
|
||||
}
|
||||
|
||||
#undef FN3
|
||||
#define FN3 \
|
||||
{ \
|
||||
fn_section1(L3120,"3",3); \
|
||||
fn_section1a(L3120,"3",3); \
|
||||
asm volatile(" \n\
|
||||
leal -8(%edi),%ecx // newivar = CSTKPTR-argcount+1"); \
|
||||
fn_section2("3"); \
|
||||
asm volatile("subl $3,%ecx"); \
|
||||
fn_section3("3",3,L3120); \
|
||||
fn_section4(3); \
|
||||
}
|
||||
|
||||
|
||||
#undef FN4
|
||||
#define FN4 \
|
||||
{ \
|
||||
fn_section1(L4120,"4",4); \
|
||||
fn_section1a(L4120,"4",4); \
|
||||
asm volatile(" \n\
|
||||
leal -12(%edi),%ecx // newivar = CSTKPTR-argcount+1"); \
|
||||
fn_section2("4"); \
|
||||
asm volatile("subl $4,%ecx"); \
|
||||
fn_section3("4",4,L4120); \
|
||||
fn_section4(4); \
|
||||
}
|
||||
|
||||
#undef xFNX
|
||||
#define xFNX \
|
||||
{ \
|
||||
fnx_section1(Lx120,"x",4); \
|
||||
fn_section1a(Lx120,"x",4); \
|
||||
asm volatile(" \n\
|
||||
movl %0,eax // get num_args \n\
|
||||
leal -4(,eax,4),eax \n\
|
||||
negl eax \n\
|
||||
leal (edi,eax),ecx // newivar = CSTKPTR-argcount+1" : : "g" (num_args)); \
|
||||
fn_section2("x"); \
|
||||
asm volatile("subl %0,ecx" : : "g" (num_args)); \
|
||||
fn_section3("x",4,Lx120); \
|
||||
{ /* it's not a CCODEP */ \
|
||||
fn_num_args = num_args; /* argcount*/ \
|
||||
fn_opcode_size = FNX_OPCODE_SIZE; \
|
||||
fn_apply = 0; \
|
||||
goto op_fn_common; \
|
||||
} \
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/************************************************************************/
|
||||
/* */
|
||||
/* o p r e t u r n */
|
||||
/* */
|
||||
/* Inline version of the RETURN opcode. */
|
||||
/* */
|
||||
/************************************************************************/
|
||||
|
||||
inline extern void opreturn()
|
||||
{
|
||||
asm volatile(" \n\
|
||||
movl MachineState+4,edx \n\
|
||||
movzwl -20(edx),edx \n\
|
||||
testb $1,dl \n\
|
||||
jne opret_fail \n\
|
||||
movl MachineState,edi \n\
|
||||
movl Stackspace,ecx \n\
|
||||
leal 0(ecx,edx,2),eax \n\
|
||||
movl eax,MachineState+4 \n\
|
||||
leal -22(eax),edx \n\
|
||||
xorb $2,dl \n\
|
||||
movzwl (edx),edx \n\
|
||||
leal 0(ecx,edx,2),edx \n\
|
||||
movl edx,MachineState \n\
|
||||
movl -16(eax),ecx \n\
|
||||
roll $16,ecx \n\
|
||||
andl $16777215,ecx \n\
|
||||
addl ecx,ecx \n\
|
||||
addl Lisp_world,ecx \n\
|
||||
movl ecx,MachineState+20 \n\
|
||||
movzwl -12(eax),eax \n\
|
||||
leal 1(eax,ecx),esi \n\
|
||||
movzwl 2(ecx),edx \n\
|
||||
addl edx,edx \n\
|
||||
movl MachineState+24,eax \n\
|
||||
subl edx,eax \n\
|
||||
movl eax,MachineState+28 \n\
|
||||
cmpl eax,edi \n\
|
||||
jg check_interrupt \n\
|
||||
cmpl $0,MachineState+32 \n\
|
||||
jle check_interrupt \n\
|
||||
movl MachineState+24,ecx \n\
|
||||
movl ecx,MachineState+32 \n\
|
||||
\n\
|
||||
leal -1(esi),eax \n\
|
||||
xorb $3,al \n\
|
||||
movzbl (eax),eax \n\
|
||||
jmp *optable(,eax,4) \n\
|
||||
\n\
|
||||
.align 4 \n\
|
||||
opret_fail:" : : : "ax", "dx", "cx");
|
||||
}
|
||||
|
||||
#endif NEVER
|
||||
|
||||
59
inc/tosfns.h
59
inc/tosfns.h
@@ -46,15 +46,6 @@
|
||||
#endif /* BIGVM */
|
||||
|
||||
|
||||
|
||||
#ifdef GCC386
|
||||
#define ASM_LABEL_OF_FN_COMMON asm("fn_common:");
|
||||
#else
|
||||
#define ASM_LABEL_OF_FN_COMMON
|
||||
#endif /* GCC386 */
|
||||
|
||||
|
||||
|
||||
/************************************************************************/
|
||||
/* */
|
||||
/* A P P L Y _ P O P _ P U S H _ T E S T */
|
||||
@@ -196,53 +187,6 @@
|
||||
/****** OPFN(x) ********/
|
||||
/****************************************************************/
|
||||
|
||||
#if (defined(SUN3_OS3_OR_OS4_IL) && !(defined(NOASMFNCALL)) )
|
||||
|
||||
#define OPFN(x, num_args_fn, fn_xna_args, fn_native) \
|
||||
{ /* asm inlines for fn call (much care put into keeping optimizer \
|
||||
from moving things around). */ \
|
||||
fn_section1(); \
|
||||
fn_section2(); \
|
||||
num_args_fn(); \
|
||||
fn_section3(); \
|
||||
fn_xna_args(); \
|
||||
fn_section4(); \
|
||||
fast1_dispatcher(); /* nextop0 don't work here */ \
|
||||
fn_section5(); \
|
||||
/* asm code jumps here when not ccodep */ \
|
||||
{ fn_atom_index = Get_AtomNo_PCMAC1; \
|
||||
fn_defcell = (DefCell *) GetDEFCELL68k(fn_atom_index); \
|
||||
fn_num_args = x; \
|
||||
fn_opcode_size = FN_OPCODE_SIZE; \
|
||||
fn_apply = 0; \
|
||||
goto op_fn_common; \
|
||||
} \
|
||||
}
|
||||
|
||||
#define OPFNX \
|
||||
{ /* asm inlines for fn call (much care put into keeping optimizer \
|
||||
from moving things around. */ \
|
||||
fnx_section1(); \
|
||||
fn_section2(); \
|
||||
fnx_args(); \
|
||||
fn_section3(); \
|
||||
fnx_xna(); \
|
||||
fn_section4(); \
|
||||
fast1_dispatcher(); /* nextop0 don't work here */ \
|
||||
fn_section5(); \
|
||||
fn_atom_index = Get_AtomNo_PCMAC2; \
|
||||
fn_defcell = (DefCell *) GetDEFCELL68k(fn_atom_index); \
|
||||
fn_num_args = Get_BYTE_PCMAC1; \
|
||||
fn_opcode_size = FNX_OPCODE_SIZE; \
|
||||
fn_apply = 0; \
|
||||
goto op_fn_common; \
|
||||
/* *** these carefully arranged to satisfy optimizer */ \
|
||||
label1: fast1_dispatcher(); \
|
||||
\
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
#define OPFN(argcount, num_args_fn, fn_xna_args, fn_native) \
|
||||
{ /* argcount is a number of the arguments on stack */ \
|
||||
register struct fnhead *LOCFNCELL; \
|
||||
@@ -375,8 +319,6 @@ label1: fast1_dispatcher(); \
|
||||
FuncObj = LOCFNCELL; \
|
||||
} /* end OPFN */
|
||||
|
||||
#endif /* NOASMFNCALL */
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -436,7 +378,6 @@ op_ufn: use code in XC.c \
|
||||
#define needpush NEXTBLOCK
|
||||
#define OP_FN_COMMON \
|
||||
op_fn_common: \
|
||||
ASM_LABEL_OF_FN_COMMON; \
|
||||
{ register struct fnhead *LOCFNCELL; \
|
||||
register DefCell *defcell; /* this reg is not allocated */ \
|
||||
CClosure *closure; \
|
||||
|
||||
24
inc/tosret.h
24
inc/tosret.h
@@ -17,31 +17,10 @@
|
||||
/* */
|
||||
/* t o s r e t m a c r o . h */
|
||||
/* */
|
||||
/* Implements RETURN for the inner evaluation loop. There are */
|
||||
/* two versions--one for when hand optimization has been done, */
|
||||
/* and one for the naive case. To use the hand-optimization */
|
||||
/* version, you'll need to define an inline function or macro */
|
||||
/* called opreturn(). It must fall thru if alink is odd, but */
|
||||
/* must handle all other cases. You can rely on check_interrupt */
|
||||
/* being a defined label. */
|
||||
/* Implements RETURN for the inner evaluation loop. */
|
||||
/* */
|
||||
/************************************************************************/
|
||||
|
||||
#if ((defined(ISC) || defined(SUN3_OS3_OR_OS4_IL)) && !(defined(NOASMFNCALL)) )
|
||||
|
||||
/* JDS 22 May 96 CSTKPTR >- Irq... was just >, but got overflows with last
|
||||
frame right against endofstack, causing 0-long free blocks, inf loops... */
|
||||
#define OPRETURN \
|
||||
{ opreturn(); \
|
||||
EXT; if(slowreturn()) goto stackoverflow_help; RET; \
|
||||
Irq_Stk_Check = STK_END_COMPUTE(EndSTKP,FuncObj); \
|
||||
if (((UNSIGNED)(CSTKPTR) >= Irq_Stk_Check) || (Irq_Stk_End <= 0)) \
|
||||
{ goto check_interrupt; } \
|
||||
Irq_Stk_End = (UNSIGNED) EndSTKP; \
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
#define OPRETURN { \
|
||||
register struct frameex2 *returnFX ; \
|
||||
register int alink; \
|
||||
@@ -75,5 +54,4 @@
|
||||
retxit: {} \
|
||||
} /* OPRETURN end */
|
||||
|
||||
#endif
|
||||
#endif /* TOSRET_H */
|
||||
|
||||
@@ -186,7 +186,6 @@ error Must specify RELEASE to build Medley.
|
||||
#undef SUN4_OS4_IL
|
||||
#undef OPDISP
|
||||
#undef PROFILE
|
||||
#define NOASMFNCALL 1
|
||||
#endif
|
||||
|
||||
#ifdef SUN3_OS3_IL
|
||||
|
||||
Reference in New Issue
Block a user