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259 lines
7.1 KiB
C
Executable File
259 lines
7.1 KiB
C
Executable File
/* $Id: fast_dsp.h,v 1.2 1999/01/03 02:05:59 sybalsky Exp $ (C) Copyright Venue, All Rights Reserved */
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/* These are the Macros Used to generate fast dispatch inline code.
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*/
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/************************************************************************/
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/* */
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/* (C) Copyright 1989, 1990, 1991 Venue. All Rights Reserved. */
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/* Manufactured in the United States of America. */
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/* */
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/* The contents of this file are proprietary information */
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/* belonging to Venue, and are provided to you under license. */
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/* They may not be further distributed or disclosed to third */
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/* parties without the specific permission of Venue. */
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/* */
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/************************************************************************/
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/************************************************************************/
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/* */
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/* F A S T O P C O D E D I S P A T C H M A C R O S */
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/* */
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/* These macros generate better opcode-dispatch code than the */
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/* native compiler will. The difference may be only one or */
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/* two instructions, but in the inner loop, that's a LOT. */
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/* */
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/* To add a new architecture, you must define 5 macros: */
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/* */
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/* nextop0 - for single-byte opcodes */
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/* nextop1 - skip a byte and grab an opcode */
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/* nextop2 - skip 2 bytes and grab an opcode */
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/* nextop3 - skip 3 bytes and grab an opcode */
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/* nextop4 - skip 4 bytes and grab an opcode */
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/* */
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/* (These macros are already defined naively, so undef them.) */
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/* */
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/* For existing implementations, these often expand out to */
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/* calls to inline functions. */
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/* */
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/* */
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/* */
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/************************************************************************/
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#ifdef OPDISP /* Only do any of this if OPDISP is set. */
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/* Sun 3 */
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#ifdef mc68020
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#undef nextop0
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#undef nextop1
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#undef nextop2
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#undef nextop3
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#undef nextop4
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/* JRB - fast case is now nextop1 */
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#define nextop0 { fast0_dispatcher(); goto nextopcode; }
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#define nextop1 { fast1_dispatcher(); goto nextopcode; }
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#define nextop2 { fast1_dispatcher2(); }
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#define nextop3 { PCMACL += 2; nextop1; }
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#define nextop4 { PCMACL += 3; nextop1; }
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#endif
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/* Sun 386i */
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#ifdef I386
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#undef nextop0
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#undef nextop1
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#undef nextop2
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#undef nextop3
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#undef nextop4
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/* JRB - fast case is now nextop1 */
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#define nextop0 { fast0_dispatcher(); goto nextopcode; }
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#define nextop1 { fast1_dispatcher(); goto nextopcode; }
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#define nextop2 { fast2_dispatcher(); }
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#define nextop3 { PCMACL += 2; nextop1; }
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#define nextop4 { PCMACL += 3; nextop1; }
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#endif
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/* ISC 386 using gcc */
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#ifdef ISC
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#undef nextop0
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#undef nextop1
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#undef nextop2
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#undef nextop3
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#undef nextop4
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#define nextop0 { fast0_dispatcher(); goto nextopcode; }
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#define nextop1 { fast1_dispatcher(); goto nextopcode; }
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#define nextop2 { fast2_dispatcher(); goto nextopcode;}
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#define nextop3 { fast3_dispatcher(); goto nextopcode;}
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#define nextop4 { fast4_dispatcher(); goto nextopcode;}
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#define fast0_dispatcher() \
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asm volatile(" \n\
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// leal -1(%0),%%eax \n\
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/ xorb $3,%%al \n\
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/ movzbl (%%eax),%%eax \n\
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movzbl -1(%0),%%eax \n\
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jmp *optable(,%%eax,4)" : : "r" (pccache): "ax");
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#define fast1_dispatcher() \
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asm volatile(" \n\
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/ movl %0,%%eax \n\
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/ xorb $3,%%al \n\
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movzbl (%0),%%eax \n\
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incl %0 \n\
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/ movzbl (%%eax),%%eax \n\
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jmp *optable(,%%eax,4)" : "=r" (pccache) : "0" (pccache): "ax");
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#define fast2_dispatcher() \
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asm volatile(" \n\
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/ leal 1(%0),%%eax \n\
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movzbl 1(%0),%%eax \n\
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addl $2,%0 \n\
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/ xorb $3,%%al \n\
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/ movzbl (%%eax),%%eax \n\
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jmp *optable(,%%eax,4)" :"=r" (pccache) : "0" (pccache): "ax");
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#define fast3_dispatcher() \
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asm volatile(" \n\
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/ leal 2(%0),%%eax \n\
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movzbl 2(%0),%%eax \n\
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addl $3,%0 \n\
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/ xorb $3,%%al \n\
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/ movzbl (%%eax),%%eax \n\
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jmp *optable(,%%eax,4)" :"=r" (pccache) : "0" (pccache): "ax");
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#define fast4_dispatcher() \
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asm volatile(" \n\
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/ leal 3(%0),%%eax \n\
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movzbl 3(%0),%%eax \n\
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addl $4,%0 \n\
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/ xorb $3,%%al \n\
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/ movzbl (%%eax),%%eax \n\
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jmp *optable(,%%eax,4)" :"=r" (pccache) : "0" (pccache): "ax");
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#endif
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#endif /* OPDISP */
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/* ISC 386 using gcc with turbo assembler (DOS version) */
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#ifdef DOS
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#undef nextop0
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#undef nextop1
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#undef nextop2
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#undef nextop3
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#undef nextop4
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#define nextop0 { fast0_dispatcher(); goto nextopcode; }
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#define nextop1 { fast1_dispatcher(); goto nextopcode; }
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#define nextop2 { fast2_dispatcher(); goto nextopcode;}
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#define nextop3 { fast3_dispatcher(); goto nextopcode;}
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#define nextop4 { fast4_dispatcher(); goto nextopcode;}
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#define fast0_dispatcher() \
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asm volatile(" \n\
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lea eax,-1[%0] \n\
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xor al,3 \n\
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movzx eax, BYTE PTR [eax] \n\
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; mov dword ptr save_opcode, eax \n\
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; mov dword ptr save_pc, esi \n\
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; mov dword ptr save_tos, ebx \n\
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; mov dword ptr save_tsptr, edi \n\
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; mov dword ptr save_esp, esp \n\
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; mov dword ptr save_ebp, ebp \n\
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jmp OFFSET CODE32:optable[eax*4]" : "=r" (pccache) : "0" (pccache): "ax");
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#define fast1_dispatcher() \
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asm volatile(" \n\
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mov eax,%0 \n\
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xor al,3 \n\
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inc %0 \n\
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movzx eax, BYTE PTR [eax] \n\
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; mov dword ptr save_opcode, eax \n\
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; mov dword ptr save_pc, esi \n\
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; mov dword ptr save_tos, ebx \n\
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; mov dword ptr save_tsptr, edi \n\
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; mov dword ptr save_esp, esp \n\
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; mov dword ptr save_ebp, ebp \n\
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jmp OFFSET CODE32:optable[eax*4]" : "=r" (pccache) : "0" (pccache): "ax");
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#define fast2_dispatcher() \
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asm volatile(" \n\
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lea eax,1[%0] \n\
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add %0,2 \n\
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xor al,3 \n\
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movzx eax, BYTE PTR [eax] \n\
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; mov dword ptr save_opcode, eax \n\
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; mov dword ptr save_pc, esi \n\
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; mov dword ptr save_tos, ebx \n\
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; mov dword ptr save_tsptr, edi \n\
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; mov dword ptr save_esp, esp \n\
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; mov dword ptr save_ebp, ebp \n\
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jmp OFFSET CODE32:optable[eax*4]" : "=r" (pccache) : "0" (pccache): "ax");
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#define fast3_dispatcher() \
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asm volatile(" \n\
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lea eax,2[%0] \n\
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add %0,3 \n\
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xor al,3 \n\
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movzx eax, BYTE PTR [eax] \n\
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; mov dword ptr save_opcode, eax \n\
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; mov dword ptr save_pc, esi \n\
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; mov dword ptr save_tos, ebx \n\
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; mov dword ptr save_tsptr, edi \n\
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; mov dword ptr save_esp, esp \n\
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; mov dword ptr save_ebp, ebp \n\
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jmp OFFSET CODE32:optable[eax*4]" : "=r" (pccache) : "0" (pccache): "ax");
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#define fast4_dispatcher() \
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asm volatile(" \n\
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lea eax,3[%0] \n\
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add %0,4 \n\
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xor al,3 \n\
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movzx eax, BYTE PTR [eax] \n\
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; mov dword ptr save_opcode, eax \n\
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; mov dword ptr save_pc, esi \n\
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; mov dword ptr save_tos, ebx \n\
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; mov dword ptr save_tsptr, edi \n\
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; mov dword ptr save_esp, esp \n\
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; mov dword ptr save_ebp, ebp \n\
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jmp OFFSET CODE32:optable[eax*4]" : "=r" (pccache) : "0" (pccache): "ax");
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#endif /* DOS */
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#ifdef SPARCDISP
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#undef nextop0
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#undef nextop1
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#undef nextop2
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#undef nextop3
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#undef nextop4
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#define nextop0 { fast_dispatcher(table, Get_BYTE(PCMAC)); goto nextopcode; }
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#define nextop_n(n) { \
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PCMACL += n; \
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nextop0; \
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}
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#define nextop1 { nextop_n(1); }
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#define nextop2 { nextop_n(2); }
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#define nextop3 { nextop_n(3); }
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#define nextop4 { nextop_n(4); }
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#endif /* SPARCDISP */
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