Refactor memory management. Allow activation of EMS/UMB on demand.
This commit is contained in:
Matthieu Bucchianeri
parent
e53f6cc764
commit
04d03f4571
@ -49,6 +49,9 @@
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// Revision 10 02/17/2025
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// - Use a lookup table for the memory map
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//
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// Revision 11 03/01/2025
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// - Refactor lookup table and add support for UMBs
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//
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//------------------------------------------------------------------------
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//
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// Copyright (c) 2024 Ted Fried
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@ -170,12 +173,10 @@
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#define PSRAM_RESET_VALUE 0x01400000
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#define PSRAM_CLK_HIGH 0x02000000
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#define EMS_BASE_IO 0x260 // Must be a multiple of 8.
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#define EMS_BASE_MEM 0xD0000
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#define MMAN_BASE 0x260 // Must be a multiple of 16.
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#define EMS_MAX_SIZE (16*1024*1024)
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#define EMS_TOTAL_SIZE (16*1024*1024)
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#define SD_BASE 0x280 // Must be a multiple of 8.
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#define SD_BASE 0x280 // Must be a multiple of 8.
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#define SD_CONFIG_BYTE 0
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@ -196,7 +197,9 @@ uint8_t isa_data_out = 0;
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uint8_t nibble_in =0;
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uint8_t nibble_out =0;
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uint8_t read_byte =0;
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uint16_t ems_frame_pointer[4] = {0, 0, 0, 0};
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uint32_t umb_base_segment =0;
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uint16_t ems_frame_pointer[4] = {0xffff, 0xffff, 0xffff, 0xffff};
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uint32_t ems_base_segment =0;
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uint8_t spi_shift_out =0;
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uint8_t sd_spi_datain =0;
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uint32_t sd_spi_cs_n = 0x0;
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@ -205,10 +208,36 @@ uint8_t sd_scratch_register[6] = {0, 0, 0, 0, 0, 0};
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uint16_t sd_requested_timeout = 0;
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elapsedMillis sd_timeout;
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uint8_t XTMax_MEM_Response_Array[16];
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enum MemResponse {
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AutoDetect,
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DontRespond,
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Respond,
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};
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DMAMEM uint8_t internal_RAM1[0x60000];
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uint8_t internal_RAM2[0x40000];
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MemResponse XTMax_MEM_Response_Array[16] = {
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/* 640KB conventional memory */
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/* 00000 - 0FFFF */ AutoDetect,
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/* 10000 - 1FFFF */ AutoDetect,
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/* 20000 - 2FFFF */ AutoDetect,
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/* 30000 - 3FFFF */ AutoDetect,
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/* 40000 - 4FFFF */ AutoDetect,
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/* 50000 - 5FFFF */ AutoDetect,
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/* 60000 - 6FFFF */ AutoDetect,
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/* 70000 - 7FFFF */ AutoDetect,
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/* 80000 - 8FFFF */ AutoDetect,
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/* 90000 - 9FFFF */ AutoDetect,
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/* TBD - can be used for UMB */
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/* A0000 - AFFFF */ Respond,
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/* B0000 - BFFFF */ Respond,
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/* C0000 - CFFFF */ Respond,
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/* D0000 - DFFFF */ Respond,
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/* E0000 - EFFFF */ Respond,
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/* Reserved (BIOS) */
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/* F0000 - FFFFF */ DontRespond,
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};
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DMAMEM uint8_t internal_RAM1[0x7A000]; /* 0 - 488KB */
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uint8_t internal_RAM2[0x76000]; /* 488 - 640KB + 320KB UMB */
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uint8_t psram_cs =0;
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@ -220,7 +249,38 @@ enum Region {
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SdCard
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};
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Region memmap[512];
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#define RAM_64K \
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Ram, Ram, Ram, Ram, Ram, Ram, Ram, Ram, Ram, Ram, Ram, Ram, Ram, Ram, Ram, Ram, \
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Ram, Ram, Ram, Ram, Ram, Ram, Ram, Ram, Ram, Ram, Ram, Ram, Ram, Ram, Ram, Ram
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#define UNUSED_64K \
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Unused, Unused, Unused, Unused, Unused, Unused, Unused, Unused, Unused, Unused, Unused, Unused, Unused, Unused, Unused, Unused, \
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Unused, Unused, Unused, Unused, Unused, Unused, Unused, Unused, Unused, Unused, Unused, Unused, Unused, Unused, Unused, Unused
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// Uncomment to disable conventional memory
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//#define RAM_64K UNUSED_64K
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Region memmap[512] = {
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/* 640KB conventional memory */
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/* 00000 - 0FFFF */ RAM_64K,
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/* 10000 - 1FFFF */ RAM_64K,
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/* 20000 - 2FFFF */ RAM_64K,
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/* 30000 - 3FFFF */ RAM_64K,
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/* 40000 - 4FFFF */ RAM_64K,
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/* 50000 - 5FFFF */ RAM_64K,
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/* 60000 - 6FFFF */ RAM_64K,
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/* 70000 - 7FFFF */ RAM_64K,
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/* 80000 - 8FFFF */ RAM_64K,
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/* 90000 - 9FFFF */ RAM_64K,
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/* TBD - can be used for EMS or UMB */
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/* A0000 - AFFFF */ UNUSED_64K,
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/* B0000 - BFFFF */ UNUSED_64K,
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/* C0000 - CFFFF */ UNUSED_64K,
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/* D0000 - DFFFF */ UNUSED_64K,
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/* E0000 - EFFFF */ UNUSED_64K,
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/* Reserved (BIOS) */
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/* F0000 - FFFFF */ UNUSED_64K,
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};
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// --------------------------------------------------------------------------------------------------
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// --------------------------------------------------------------------------------------------------
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@ -305,25 +365,8 @@ void setup() {
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//Serial.begin(9600);
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// Populate the memory map.
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// Patch the memory map.
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unsigned int i;
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for (i = 0; i < sizeof(memmap)/sizeof(memmap[0]); i++) {
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memmap[i] = Unused;
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}
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for (i = 0;
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i < (0xA0000 >> 11);
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i++) {
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memmap[i] = Ram;
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}
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static_assert((EMS_BASE_MEM & 0x7FF) == 0);
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for (i = (EMS_BASE_MEM >> 11);
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i < ((EMS_BASE_MEM+0x10000) >> 11);
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i++) {
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memmap[i] = EmsWindow;
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}
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static_assert((BOOTROM_ADDR & 0x7FF) == 0);
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static_assert((sizeof(BOOTROM) % 2048) == 0, "BootROM must be in blocks of 2KB");
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for (i = (BOOTROM_ADDR >> 11);
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@ -331,7 +374,6 @@ void setup() {
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i++) {
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memmap[i] = BootRom;
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}
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memmap[(BOOTROM_ADDR+sizeof(BOOTROM)) >> 11] = SdCard;
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}
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@ -454,7 +496,7 @@ inline void PSRAM_Configure() {
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inline uint8_t PSRAM_Read(uint32_t address_in) {
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if (address_in >= EMS_TOTAL_SIZE) {
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if (address_in >= EMS_MAX_SIZE) {
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return 0xff;
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}
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if (address_in >= 0x7FFFFF) psram_cs=1; else psram_cs=0;
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@ -502,7 +544,7 @@ inline uint8_t PSRAM_Read(uint32_t address_in) {
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// --------------------------------------------------------------------------------------------------
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inline void PSRAM_Write(uint32_t address_in , int8_t local_data) {
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if (address_in >= EMS_TOTAL_SIZE) {
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if (address_in >= EMS_MAX_SIZE) {
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return;
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}
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if (address_in >= 0x7FFFFF) psram_cs=1; else psram_cs=0;
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@ -539,20 +581,13 @@ inline void PSRAM_Write(uint32_t address_in , int8_t local_data) {
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// --------------------------------------------------------------------------------------------------
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inline uint8_t Internal_RAM_Read() {
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uint8_t local_temp;
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if (isa_address<0x60000) local_temp = internal_RAM1[isa_address];
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else local_temp = internal_RAM2[isa_address-0x60000];
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return local_temp;
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if (isa_address<sizeof(internal_RAM1)) return internal_RAM1[isa_address];
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else return internal_RAM2[isa_address-sizeof(internal_RAM1)];
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}
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inline void Internal_RAM_Write() {
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if (isa_address<0x60000) internal_RAM1[isa_address] = 0xFF & ADDRESS_DATA_GPIO6_UNSCRAMBLE;
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else internal_RAM2[isa_address-0x60000] = 0xFF & ADDRESS_DATA_GPIO6_UNSCRAMBLE;
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return;
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if (isa_address<sizeof(internal_RAM1)) internal_RAM1[isa_address] = 0xFF & ADDRESS_DATA_GPIO6_UNSCRAMBLE;
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else internal_RAM2[isa_address-sizeof(internal_RAM1)] = 0xFF & ADDRESS_DATA_GPIO6_UNSCRAMBLE;
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}
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// --------------------------------------------------------------------------------------------------
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@ -567,10 +602,10 @@ inline void Mem_Read_Cycle()
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case EmsWindow:
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page_base_address = (isa_address & 0xFC000);
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if (page_base_address == (EMS_BASE_MEM | 0xC000)) { psram_address = (ems_frame_pointer[3]<<14) | (isa_address & 0x03FFF); }
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else if (page_base_address == (EMS_BASE_MEM | 0x8000)) { psram_address = (ems_frame_pointer[2]<<14) | (isa_address & 0x03FFF); }
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else if (page_base_address == (EMS_BASE_MEM | 0x4000)) { psram_address = (ems_frame_pointer[1]<<14) | (isa_address & 0x03FFF); }
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else if (page_base_address == (EMS_BASE_MEM | 0x0000)) { psram_address = (ems_frame_pointer[0]<<14) | (isa_address & 0x03FFF); }
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if (page_base_address == ((ems_base_segment<<4) | 0xC000)) { psram_address = (ems_frame_pointer[3]<<14) | (isa_address & 0x03FFF); }
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else if (page_base_address == ((ems_base_segment<<4) | 0x8000)) { psram_address = (ems_frame_pointer[2]<<14) | (isa_address & 0x03FFF); }
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else if (page_base_address == ((ems_base_segment<<4) | 0x4000)) { psram_address = (ems_frame_pointer[1]<<14) | (isa_address & 0x03FFF); }
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else if (page_base_address == ((ems_base_segment<<4) | 0x0000)) { psram_address = (ems_frame_pointer[0]<<14) | (isa_address & 0x03FFF); }
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GPIO7_DR = MUX_ADDR_n_LOW + CHRDY_OUT_LOW + trigger_out;
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GPIO8_DR = sd_pin_outputs + MUX_DATA_n_HIGH + CHRDY_OE_n_LOW + DATA_OE_n_LOW ; // Assert CHRDY_n=0 to begin wait states
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@ -588,17 +623,11 @@ inline void Mem_Read_Cycle()
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isa_data_out = Internal_RAM_Read();
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GPIO7_DR = GPIO7_DATA_OUT_UNSCRAMBLE + MUX_ADDR_n_LOW + CHRDY_OUT_LOW + trigger_out;
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// XTMax_MEM_Response_Array
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// - Array holds value 0,1,2
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// 0 = unitiailzed - add wait states and snoop
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// 1 = No wait states and no response
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// 2 = No wait states and yes respond
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//
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// If XTMax has not seen a read access to this 64 KB page yet, add wait states to give physical RAM (if present) a chance to respond
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if (XTMax_MEM_Response_Array[(isa_address>>16)] == 2) {
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if (XTMax_MEM_Response_Array[(isa_address>>16)] == Respond) {
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GPIO8_DR = sd_pin_outputs + MUX_DATA_n_HIGH + CHRDY_OE_n_HIGH + DATA_OE_n_LOW; // Physical RAM is NOT present at this page so XTMax will respond
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}
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else if (XTMax_MEM_Response_Array[(isa_address>>16)] == 0) {
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else if (XTMax_MEM_Response_Array[(isa_address>>16)] == AutoDetect) {
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GPIO8_DR = sd_pin_outputs + MUX_DATA_n_HIGH + CHRDY_OE_n_LOW + DATA_OE_n_HIGH; // Assert CHRDY_n=0 to begin wait states
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delayNanoseconds(800);
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GPIO8_DR = sd_pin_outputs + MUX_DATA_n_HIGH + CHRDY_OE_n_HIGH + DATA_OE_n_HIGH; // De-assert CHRDY
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@ -607,10 +636,10 @@ inline void Mem_Read_Cycle()
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data_in = 0xFF & ADDRESS_DATA_GPIO6_UNSCRAMBLE;
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if (data_in == isa_data_out) {
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XTMax_MEM_Response_Array[(isa_address>>16)] = 1; // Physical RAM is present at this page so XTMax should not respond
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XTMax_MEM_Response_Array[(isa_address>>16)] = DontRespond; // Physical RAM is present at this page so XTMax should not respond
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}
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else {
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XTMax_MEM_Response_Array[(isa_address>>16)] = 2;
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XTMax_MEM_Response_Array[(isa_address>>16)] = Respond;
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GPIO8_DR = sd_pin_outputs + MUX_DATA_n_HIGH + CHRDY_OE_n_HIGH + DATA_OE_n_LOW; // Physical RAM is NOT present at this page so XTMax will respond
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}
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}
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@ -662,10 +691,10 @@ inline void Mem_Write_Cycle()
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case EmsWindow:
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page_base_address = (isa_address & 0xFC000);
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if (page_base_address == (EMS_BASE_MEM | 0xC000)) { psram_address = (ems_frame_pointer[3]<<14) | (isa_address & 0x03FFF); }
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else if (page_base_address == (EMS_BASE_MEM | 0x8000)) { psram_address = (ems_frame_pointer[2]<<14) | (isa_address & 0x03FFF); }
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else if (page_base_address == (EMS_BASE_MEM | 0x4000)) { psram_address = (ems_frame_pointer[1]<<14) | (isa_address & 0x03FFF); }
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else if (page_base_address == (EMS_BASE_MEM | 0x0000)) { psram_address = (ems_frame_pointer[0]<<14) | (isa_address & 0x03FFF); }
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if (page_base_address == ((ems_base_segment<<4) | 0xC000)) { psram_address = (ems_frame_pointer[3]<<14) | (isa_address & 0x03FFF); }
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else if (page_base_address == ((ems_base_segment<<4) | 0x8000)) { psram_address = (ems_frame_pointer[2]<<14) | (isa_address & 0x03FFF); }
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else if (page_base_address == ((ems_base_segment<<4) | 0x4000)) { psram_address = (ems_frame_pointer[1]<<14) | (isa_address & 0x03FFF); }
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else if (page_base_address == ((ems_base_segment<<4) | 0x0000)) { psram_address = (ems_frame_pointer[0]<<14) | (isa_address & 0x03FFF); }
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GPIO7_DR = GPIO7_DATA_OUT_UNSCRAMBLE + MUX_ADDR_n_HIGH + CHRDY_OUT_LOW + trigger_out;
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GPIO8_DR = sd_pin_outputs + MUX_DATA_n_LOW + CHRDY_OE_n_LOW + DATA_OE_n_HIGH; // Steer data mux to Data[7:0] and Assert CHRDY_n=0 to begin wait states
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@ -736,16 +765,18 @@ inline void IO_Read_Cycle()
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{
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isa_address = 0xFFFF & ADDRESS_DATA_GPIO6_UNSCRAMBLE;
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if ((isa_address&0x0FF8)==EMS_BASE_IO) { // Location of 16 KB Expanded Memory page frame pointers
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if ((isa_address&0x0FF0)==MMAN_BASE) { // Location of Memory MANager registers
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switch (isa_address) {
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case EMS_BASE_IO : isa_data_out = ems_frame_pointer[0]; break;
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case EMS_BASE_IO+1: isa_data_out = ems_frame_pointer[0] >> 8; break;
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case EMS_BASE_IO+2: isa_data_out = ems_frame_pointer[1]; break;
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case EMS_BASE_IO+3: isa_data_out = ems_frame_pointer[1] >> 8; break;
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case EMS_BASE_IO+4: isa_data_out = ems_frame_pointer[2]; break;
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case EMS_BASE_IO+5: isa_data_out = ems_frame_pointer[2] >> 8; break;
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case EMS_BASE_IO+6: isa_data_out = ems_frame_pointer[3]; break;
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case EMS_BASE_IO+7: isa_data_out = ems_frame_pointer[3] >> 8; break;
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case MMAN_BASE+0 : isa_data_out = ems_frame_pointer[0]; break;
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case MMAN_BASE+1 : isa_data_out = ems_frame_pointer[0] >> 8; break;
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case MMAN_BASE+2 : isa_data_out = ems_frame_pointer[1]; break;
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case MMAN_BASE+3 : isa_data_out = ems_frame_pointer[1] >> 8; break;
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case MMAN_BASE+4 : isa_data_out = ems_frame_pointer[2]; break;
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case MMAN_BASE+5 : isa_data_out = ems_frame_pointer[2] >> 8; break;
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case MMAN_BASE+6 : isa_data_out = ems_frame_pointer[3]; break;
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case MMAN_BASE+7 : isa_data_out = ems_frame_pointer[3] >> 8; break;
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case MMAN_BASE+15: isa_data_out = memmap[umb_base_segment >> 7]; break; // Useful for debugging
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default: isa_data_out = 0xff; break;
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}
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GPIO7_DR = GPIO7_DATA_OUT_UNSCRAMBLE + MUX_ADDR_n_LOW + CHRDY_OUT_LOW + trigger_out;
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@ -785,28 +816,53 @@ inline void IO_Write_Cycle()
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{
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isa_address = 0xFFFF & ADDRESS_DATA_GPIO6_UNSCRAMBLE;
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if ((isa_address&0x0FF8)==EMS_BASE_IO) { // Location of 16 KB Expanded Memory page frame pointers
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if ((isa_address&0x0FF0)==MMAN_BASE) { // Location of Memory MANager registers
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GPIO7_DR = GPIO7_DATA_OUT_UNSCRAMBLE + MUX_ADDR_n_HIGH + CHRDY_OUT_LOW + trigger_out;
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GPIO8_DR = sd_pin_outputs + MUX_DATA_n_LOW + CHRDY_OE_n_HIGH + DATA_OE_n_HIGH;
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delayNanoseconds(50); // Give some time for write data to be available after IOWR_n goes low
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gpio6_int = GPIO6_DR;
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data_in = 0xFF & ADDRESS_DATA_GPIO6_UNSCRAMBLE;
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switch (isa_address) {
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case MMAN_BASE+0 : ems_frame_pointer[0] = (ems_frame_pointer[0] & 0xFF00) | data_in; break;
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case MMAN_BASE+1 : ems_frame_pointer[0] = (ems_frame_pointer[0] & 0x00FF) | ((uint16_t)data_in << 8); break;
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case MMAN_BASE+2 : ems_frame_pointer[1] = (ems_frame_pointer[1] & 0xFF00) | data_in; break;
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case MMAN_BASE+3 : ems_frame_pointer[1] = (ems_frame_pointer[1] & 0x00FF) | ((uint16_t)data_in << 8); break;
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case MMAN_BASE+4 : ems_frame_pointer[2] = (ems_frame_pointer[2] & 0xFF00) | data_in; break;
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case MMAN_BASE+5 : ems_frame_pointer[2] = (ems_frame_pointer[2] & 0x00FF) | ((uint16_t)data_in << 8); break;
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case MMAN_BASE+6 : ems_frame_pointer[3] = (ems_frame_pointer[3] & 0xFF00) | data_in; break;
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case MMAN_BASE+7 : ems_frame_pointer[3] = (ems_frame_pointer[3] & 0x00FF) | ((uint16_t)data_in << 8); break;
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case MMAN_BASE+10: ems_base_segment = (ems_base_segment & 0xFF00) | data_in; break;
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case MMAN_BASE+11: ems_base_segment = (ems_base_segment & 0x00FF) | ((uint16_t)data_in << 8); break;
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case MMAN_BASE+12: // Num 16K pages + commit operation
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if (ems_base_segment >= 0xA000 && ems_base_segment + (data_in << 10) <= 0xF000) {
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const unsigned int base = ems_base_segment >> 7; // 64K segment to 2KB offset
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const unsigned int count = data_in << 3; // 16KB pages to 2KB pages
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for (unsigned int i = 0; i < count; i++) {
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memmap[base + i] = EmsWindow;
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}
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}
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break;
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case MMAN_BASE+13: umb_base_segment = (umb_base_segment & 0xFF00) | data_in; break;
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case MMAN_BASE+14: umb_base_segment = (umb_base_segment & 0x00FF) | ((uint16_t)data_in << 8); break;
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case MMAN_BASE+15: // Num 2K pages + commit operation
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if (umb_base_segment >= 0xA000 && umb_base_segment + (data_in << 7) <= 0xF000) {
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const unsigned int base = umb_base_segment >> 7; // 64K segment to 2KB offset
|
||||
for (unsigned int i = 0; i < data_in; i++) {
|
||||
memmap[base + i] = Ram;
|
||||
}
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
while ( (gpio9_int&0xF0) != 0xF0 ) { // Wait here until cycle is complete
|
||||
gpio6_int = GPIO6_DR;
|
||||
gpio9_int = GPIO9_DR;
|
||||
}
|
||||
|
||||
data_in = 0xFF & ADDRESS_DATA_GPIO6_UNSCRAMBLE;
|
||||
|
||||
switch (isa_address) {
|
||||
case EMS_BASE_IO : ems_frame_pointer[0] = (ems_frame_pointer[0] & 0xFF00) | data_in; break;
|
||||
case EMS_BASE_IO+1: ems_frame_pointer[0] = (ems_frame_pointer[0] & 0x00FF) | ((uint16_t)data_in << 8); break;
|
||||
case EMS_BASE_IO+2: ems_frame_pointer[1] = (ems_frame_pointer[1] & 0xFF00) | data_in; break;
|
||||
case EMS_BASE_IO+3: ems_frame_pointer[1] = (ems_frame_pointer[1] & 0x00FF) | ((uint16_t)data_in << 8); break;
|
||||
case EMS_BASE_IO+4: ems_frame_pointer[2] = (ems_frame_pointer[2] & 0xFF00) | data_in; break;
|
||||
case EMS_BASE_IO+5: ems_frame_pointer[2] = (ems_frame_pointer[2] & 0x00FF) | ((uint16_t)data_in << 8); break;
|
||||
case EMS_BASE_IO+6: ems_frame_pointer[3] = (ems_frame_pointer[3] & 0xFF00) | data_in; break;
|
||||
case EMS_BASE_IO+7: ems_frame_pointer[3] = (ems_frame_pointer[3] & 0x00FF) | ((uint16_t)data_in << 8); break;
|
||||
}
|
||||
|
||||
GPIO7_DR = GPIO7_DATA_OUT_UNSCRAMBLE + MUX_ADDR_n_LOW + CHRDY_OUT_LOW + trigger_out;
|
||||
GPIO8_DR = sd_pin_outputs + MUX_DATA_n_HIGH + CHRDY_OE_n_HIGH + DATA_OE_n_HIGH;
|
||||
}
|
||||
@ -862,10 +918,9 @@ void loop() {
|
||||
|
||||
gpio6_int = GPIO6_DR;
|
||||
gpio9_int = GPIO9_DR;
|
||||
|
||||
if ((gpio9_int&0x80000010)==0) IO_Read_Cycle(); // Isolate and check AEN and IO Rd/Wr
|
||||
else if ((gpio9_int&0x80000020)==0) IO_Write_Cycle();
|
||||
else if ((gpio9_int&0x00000040)==0) Mem_Read_Cycle();
|
||||
else if ((gpio9_int&0x00000080)==0) Mem_Write_Cycle();
|
||||
else if ((gpio9_int&0x00000080)==0) Mem_Write_Cycle();
|
||||
}
|
||||
}
|
||||
Loading…
x
Reference in New Issue
Block a user