From 19cdf2617d45a3faf25d8099450a4cb69d02bafe Mon Sep 17 00:00:00 2001 From: Ted Fried <54004369+MicroCoreLabs@users.noreply.github.com> Date: Fri, 21 Nov 2025 09:04:10 -0800 Subject: [PATCH] Uploaded_11_21_2025 --- .../MCL86_Plus.ino | 0 MCL86+/Code_Minimum_Mode/MCL86_Plus.ino | 3046 +++++++++++++++++ 2 files changed, 3046 insertions(+) rename MCL86+/{Code => Code_Maximum_Mode}/MCL86_Plus.ino (100%) create mode 100644 MCL86+/Code_Minimum_Mode/MCL86_Plus.ino diff --git a/MCL86+/Code/MCL86_Plus.ino b/MCL86+/Code_Maximum_Mode/MCL86_Plus.ino similarity index 100% rename from MCL86+/Code/MCL86_Plus.ino rename to MCL86+/Code_Maximum_Mode/MCL86_Plus.ino diff --git a/MCL86+/Code_Minimum_Mode/MCL86_Plus.ino b/MCL86+/Code_Minimum_Mode/MCL86_Plus.ino new file mode 100644 index 0000000..193693f --- /dev/null +++ b/MCL86+/Code_Minimum_Mode/MCL86_Plus.ino @@ -0,0 +1,3046 @@ +// +// +// File Name : MCL86_Plus.ino +// Used on : +// Author : Ted Fried, MicroCore Labs +// Creation : 11/21/2025 +// +// Description: +// ============ +// +// Intel 8088 emulator with Minimum-Mode bus interface. +// +//------------------------------------------------------------------------ +// +// Modification History: +// ===================== +// +// Revision 1 1/28/2022 +// Initial revision +// +// Revision 2 12/5/2022 +// Updated MUL and IMUL opcodes +// LAHF Set AH undocumented bits +// +// Revision 3 7/2/2025 +// Fixed a number of bugs found when running core against the MartyPC 8086 test suite. +// +// Revision 4 11/21/2025 +// Added 8088 minimum bus support +// +//------------------------------------------------------------------------ +// +// Copyright (c) 2025 Ted Fried +// +// Permission is hereby granted, free of charge, to any person obtaining a copy +// of this software and associated documentation files (the "Software"), to deal +// in the Software without restriction, including without limitation the rights +// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +// copies of the Software, and to permit persons to whom the Software is +// furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included in all +// copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +// SOFTWARE. +// +//------------------------------------------------------------------------ + + +#include + + +// Teensy 4.1 pin assignments +// +#define PIN_CLK 21 // In-Buffer +#define PIN_INTR 20 // In-Buffer +#define PIN_NMI 19 // In-Buffer +#define PIN_RESET 23 // In-Buffer +#define PIN_READY 22 // In-Buffer +#define PIN_INTA_n 1 // In-Buffer +#define PIN_MAX_n 13 // In-Buffer + +#define PIN_S2 26 // Out-direct +#define PIN_S1 25 // Out-direct +#define PIN_S0 24 // Out-direct +#define PIN_LOCK 27 // Out-direct +#define PIN_ALE 0 // Out +#define PIN_RD_n 38 // Out + +#define PIN_ADDR19 11 // Out-direct +#define PIN_ADDR18 12 // Out-direct +#define PIN_ADDR17 28 // Out-direct +#define PIN_ADDR16 29 // Out-direct +#define PIN_ADDR15 30 // Out-direct +#define PIN_ADDR14 31 // Out-direct +#define PIN_ADDR13 32 // Out-direct +#define PIN_ADDR12 33 // Out-direct +#define PIN_ADDR11 34 // Out-direct +#define PIN_ADDR10 35 // Out-direct +#define PIN_ADDR9 36 // Out-direct +#define PIN_ADDR8 37 // Out-direct + +#define PIN_AD7_OUT 10 // Out-Buffer +#define PIN_AD6_OUT 9 // Out-Buffer +#define PIN_AD5_OUT 8 // Out-Buffer +#define PIN_AD4_OUT 7 // Out-Buffer +#define PIN_AD3_OUT 6 // Out-Buffer +#define PIN_AD2_OUT 5 // Out-Buffer +#define PIN_AD1_OUT 4 // Out-Buffer +#define PIN_AD0_OUT 3 // Out-Buffer +#define PIN_AD_OE_n 2 // Out-Buffer + +#define PIN_AD7_IN 39 // In-Buffer +#define PIN_AD6_IN 40 // In-Buffer +#define PIN_AD5_IN 41 // In-Buffer +#define PIN_AD4_IN 14 // In-Buffer +#define PIN_AD3_IN 15 // In-Buffer +#define PIN_AD2_IN 16 // In-Buffer +#define PIN_AD1_IN 17 // In-Buffer +#define PIN_AD0_IN 18 // In-Buffer + + +// -------------------------------------------------------------------------------------------------- +// -------------------------------------------------------------------------------------------------- + + +#define CODE_READ_BYTE 0x04 // S-Bits +#define MEM_READ_BYTE 0x05 // 000 IACK +#define MEM_READ_WORD 0x15 // 001 Read IO +#define MEM_WRITE_BYTE 0x06 // 010 Write IO +#define MEM_WRITE_WORD 0x16 // 011 HALT +#define IO_READ_BYTE 0x01 // 100 Code Access +#define IO_READ_WORD 0x11 // 101 Read Memory +#define IO_WRITE_BYTE 0x02 // 110 Write Memory +#define IO_WRITE_WORD 0x12 // 111 Passive +#define INTERRUPT_ACK 0x00 +#define SEND_HALT 0x03 + +#define SEGMENT_OVERRIDABLE_TRUE 1 +#define SEGMENT_OVERRIDABLE_FALSE 0 + +#define SEGMENT_00 0x99 +#define SEGMENT_ES 0x10 +#define SEGMENT_CS 0x20 +#define SEGMENT_SS 0x40 +#define SEGMENT_DS 0x80 + +#define REG_AL 0x0 + +#define flag_o ( (register_flags & 0x0800)==0 ? 0 : 1 ) +#define flag_d ( (register_flags & 0x0400)==0 ? 0 : 1 ) +#define flag_i ( (register_flags & 0x0200)==0 ? 0 : 1 ) +#define flag_t ( (register_flags & 0x0100)==0 ? 0 : 1 ) +#define flag_s ( (register_flags & 0x0080)==0 ? 0 : 1 ) +#define flag_z ( (register_flags & 0x0040)==0 ? 0 : 1 ) +#define flag_a ( (register_flags & 0x0010)==0 ? 0 : 1 ) +#define flag_p ( (register_flags & 0x0004)==0 ? 0 : 1 ) +#define flag_c ( (register_flags & 0x0001)==0 ? 0 : 1 ) + +#define prefix_lock ( (prefix_flags & 0x01)==0 ? 0 : 1 ) +#define prefix_repnz ( (prefix_flags & 0x02)==0 ? 0 : 1 ) +#define prefix_repz ( (prefix_flags & 0x04)==0 ? 0 : 1 ) +#define prefix_rep ( (prefix_flags & 0x06)==0 ? 0 : 1 ) +#define prefix_no_interrupt ( (prefix_flags & 0x08)==0 ? 0 : 1 ) +#define prefix_seg_override_es ( (prefix_flags & 0x10)==0 ? 0 : 1 ) +#define prefix_seg_override_cs ( (prefix_flags & 0x20)==0 ? 0 : 1 ) +#define prefix_seg_override_ss ( (prefix_flags & 0x40)==0 ? 0 : 1 ) +#define prefix_seg_override_ds ( (prefix_flags & 0x80)==0 ? 0 : 1 ) + +#define direct_intr_raw (GPIO6_raw_data&0x04000000) +#define direct_reset_raw (GPIO6_raw_data&0x02000000) + + +// -------------------------------------------------------------------------------------------------- +// -------------------------------------------------------------------------------------------------- + +uint8_t clock_counter=0; +uint8_t prefetch_queue_count=0; +uint8_t pfq_byte_A=0; +uint8_t pfq_byte_B=0; +uint8_t pfq_byte_C=0; +uint8_t pfq_byte_D=0; +uint8_t last_instruction_set_a_prefix=0; +uint8_t pause_interrupts=0; +uint8_t inc_dec=0; +uint8_t with_carry=0; +uint8_t temp8=0; +uint8_t prefix_flags=0; +uint8_t ea_is_a_register=0; +uint8_t word_operation=0; +uint8_t opcode_first_byte=0; +uint8_t opcode_second_byte=0; +uint8_t REG_field_table=0; +uint8_t RM_field_table=0; +uint8_t REG_field=0; +uint8_t MOD_field=0; +uint8_t R_M_field=0; +uint8_t ea_segment=0; +uint8_t direct_intr=0; +uint8_t assert_lock=0; +uint8_t acceleration_mode = 0; + + +uint16_t pfq_in_address=0; +uint16_t register_flags=0xF000; +uint16_t register_ip=0; +uint16_t register_ax=0; +uint16_t register_bx=0; +uint16_t register_cx=0; +uint16_t register_dx=0; +uint16_t register_es=0; +uint16_t register_ss=0; +uint16_t register_ds=0; +uint16_t register_cs=0; +uint16_t register_sp=0; +uint16_t register_bp=0; +uint16_t register_si=0; +uint16_t register_di=0; +uint16_t nmi_latched=0; +uint16_t temp16=0; +uint16_t ea_address; + +uint32_t nmi_d=1; +uint32_t direct_nmi=0; +uint32_t GPIO6_raw_data=0; + + +// Pre-calculated 8-bit parity array +// +uint8_t Parity_Array[256] = {4,0,0,4,0,4,4,0,0,4,4,0,4,0,0,4,0,4,4,0,4,0,0,4,4,0,0,4,0,4,4,0,0,4,4,0,4,0,0,4,4,0,0,4,0,4,4,0,4,0,0,4,0,4,4,0,0,4,4,0,4,0,0,4,0,4,4,0,4,0,0,4,4,0,0,4,0,4,4,0,4,0,0,4,0,4,4,0,0,4,4,0,4,0,0,4,4,0,0,4,0,4,4,0,0,4,4,0,4,0,0,4,0,4,4,0,4,0,0,4,4,0,0,4,0,4,4,0,0,4,4,0,4,0,0,4,4,0,0,4,0,4,4,0,4,0,0,4,0,4,4,0,0,4,4,0,4,0,0,4,4,0,0,4,0,4,4,0,0,4,4,0,4,0,0,4,0,4,4,0,4,0,0,4,4,0,0,4,0,4,4,0,4,0,0,4,0,4,4,0,0,4,4,0,4,0,0,4,0,4,4,0,4,0,0,4,4,0,0,4,0,4,4,0,0,4,4,0,4,0,0,4,4,0,0,4,0,4,4,0,4,0,0,4,0,4,4,0,0,4,4,0,4,0,0,4 }; + + +// Arrays that hold the translation between the 8088 Adddress signals and the Teensy 4.1 GPIO mapping +// +uint32_t gpio7_low_array[0x400] = {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x400,0x400,0x400,0x400,0x400,0x400,0x400,0x400,0x20000,0x20000,0x20000,0x20000,0x20000,0x20000,0x20000,0x20000,0x20400,0x20400,0x20400,0x20400,0x20400,0x20400,0x20400,0x20400,0x10000,0x10000,0x10000,0x10000,0x10000,0x10000,0x10000,0x10000,0x10400,0x10400,0x10400,0x10400,0x10400,0x10400,0x10400,0x10400,0x30000,0x30000,0x30000,0x30000,0x30000,0x30000,0x30000,0x30000,0x30400,0x30400,0x30400,0x30400,0x30400,0x30400,0x30400,0x30400,0x800,0x800,0x800,0x800,0x800,0x800,0x800,0x800,0xc00,0xc00,0xc00,0xc00,0xc00,0xc00,0xc00,0xc00,0x20800,0x20800,0x20800,0x20800,0x20800,0x20800,0x20800,0x20800,0x20c00,0x20c00,0x20c00,0x20c00,0x20c00,0x20c00,0x20c00,0x20c00,0x10800,0x10800,0x10800,0x10800,0x10800,0x10800,0x10800,0x10800,0x10c00,0x10c00,0x10c00,0x10c00,0x10c00,0x10c00,0x10c00,0x10c00,0x30800,0x30800,0x30800,0x30800,0x30800,0x30800,0x30800,0x30800,0x30c00,0x30c00,0x30c00,0x30c00,0x30c00,0x30c00,0x30c00,0x30c00,0x1,0x1,0x1,0x1,0x1,0x1,0x1,0x1,0x401,0x401,0x401,0x401,0x401,0x401,0x401,0x401,0x20001,0x20001,0x20001,0x20001,0x20001,0x20001,0x20001,0x20001,0x20401,0x20401,0x20401,0x20401,0x20401,0x20401,0x20401,0x20401,0x10001,0x10001,0x10001,0x10001,0x10001,0x10001,0x10001,0x10001,0x10401,0x10401,0x10401,0x10401,0x10401,0x10401,0x10401,0x10401,0x30001,0x30001,0x30001,0x30001,0x30001,0x30001,0x30001,0x30001,0x30401,0x30401,0x30401,0x30401,0x30401,0x30401,0x30401,0x30401,0x801,0x801,0x801,0x801,0x801,0x801,0x801,0x801,0xc01,0xc01,0xc01,0xc01,0xc01,0xc01,0xc01,0xc01,0x20801,0x20801,0x20801,0x20801,0x20801,0x20801,0x20801,0x20801,0x20c01,0x20c01,0x20c01,0x20c01,0x20c01,0x20c01,0x20c01,0x20c01,0x10801,0x10801,0x10801,0x10801,0x10801,0x10801,0x10801,0x10801,0x10c01,0x10c01,0x10c01,0x10c01,0x10c01,0x10c01,0x10c01,0x10c01,0x30801,0x30801,0x30801,0x30801,0x30801,0x30801,0x30801,0x30801,0x30c01,0x30c01,0x30c01,0x30c01,0x30c01,0x30c01,0x30c01,0x30c01,0x80000,0x80000,0x80000,0x80000,0x80000,0x80000,0x80000,0x80000,0x80400,0x80400,0x80400,0x80400,0x80400,0x80400,0x80400,0x80400,0xa0000,0xa0000,0xa0000,0xa0000,0xa0000,0xa0000,0xa0000,0xa0000,0xa0400,0xa0400,0xa0400,0xa0400,0xa0400,0xa0400,0xa0400,0xa0400,0x90000,0x90000,0x90000,0x90000,0x90000,0x90000,0x90000,0x90000,0x90400,0x90400,0x90400,0x90400,0x90400,0x90400,0x90400,0x90400,0xb0000,0xb0000,0xb0000,0xb0000,0xb0000,0xb0000,0xb0000,0xb0000,0xb0400,0xb0400,0xb0400,0xb0400,0xb0400,0xb0400,0xb0400,0xb0400,0x80800,0x80800,0x80800,0x80800,0x80800,0x80800,0x80800,0x80800,0x80c00,0x80c00,0x80c00,0x80c00,0x80c00,0x80c00,0x80c00,0x80c00,0xa0800,0xa0800,0xa0800,0xa0800,0xa0800,0xa0800,0xa0800,0xa0800,0xa0c00,0xa0c00,0xa0c00,0xa0c00,0xa0c00,0xa0c00,0xa0c00,0xa0c00,0x90800,0x90800,0x90800,0x90800,0x90800,0x90800,0x90800,0x90800,0x90c00,0x90c00,0x90c00,0x90c00,0x90c00,0x90c00,0x90c00,0x90c00,0xb0800,0xb0800,0xb0800,0xb0800,0xb0800,0xb0800,0xb0800,0xb0800,0xb0c00,0xb0c00,0xb0c00,0xb0c00,0xb0c00,0xb0c00,0xb0c00,0xb0c00,0x80001,0x80001,0x80001,0x80001,0x80001,0x80001,0x80001,0x80001,0x80401,0x80401,0x80401,0x80401,0x80401,0x80401,0x80401,0x80401,0xa0001,0xa0001,0xa0001,0xa0001,0xa0001,0xa0001,0xa0001,0xa0001,0xa0401,0xa0401,0xa0401,0xa0401,0xa0401,0xa0401,0xa0401,0xa0401,0x90001,0x90001,0x90001,0x90001,0x90001,0x90001,0x90001,0x90001,0x90401,0x90401,0x90401,0x90401,0x90401,0x90401,0x90401,0x90401,0xb0001,0xb0001,0xb0001,0xb0001,0xb0001,0xb0001,0xb0001,0xb0001,0xb0401,0xb0401,0xb0401,0xb0401,0xb0401,0xb0401,0xb0401,0xb0401,0x80801,0x80801,0x80801,0x80801,0x80801,0x80801,0x80801,0x80801,0x80c01,0x80c01,0x80c01,0x80c01,0x80c01,0x80c01,0x80c01,0x80c01,0xa0801,0xa0801,0xa0801,0xa0801,0xa0801,0xa0801,0xa0801,0xa0801,0xa0c01,0xa0c01,0xa0c01,0xa0c01,0xa0c01,0xa0c01,0xa0c01,0xa0c01,0x90801,0x90801,0x90801,0x90801,0x90801,0x90801,0x90801,0x90801,0x90c01,0x90c01,0x90c01,0x90c01,0x90c01,0x90c01,0x90c01,0x90c01,0xb0801,0xb0801,0xb0801,0xb0801,0xb0801,0xb0801,0xb0801,0xb0801,0xb0c01,0xb0c01,0xb0c01,0xb0c01,0xb0c01,0xb0c01,0xb0c01,0xb0c01,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40400,0x40400,0x40400,0x40400,0x40400,0x40400,0x40400,0x40400,0x60000,0x60000,0x60000,0x60000,0x60000,0x60000,0x60000,0x60000,0x60400,0x60400,0x60400,0x60400,0x60400,0x60400,0x60400,0x60400,0x50000,0x50000,0x50000,0x50000,0x50000,0x50000,0x50000,0x50000,0x50400,0x50400,0x50400,0x50400,0x50400,0x50400,0x50400,0x50400,0x70000,0x70000,0x70000,0x70000,0x70000,0x70000,0x70000,0x70000,0x70400,0x70400,0x70400,0x70400,0x70400,0x70400,0x70400,0x70400,0x40800,0x40800,0x40800,0x40800,0x40800,0x40800,0x40800,0x40800,0x40c00,0x40c00,0x40c00,0x40c00,0x40c00,0x40c00,0x40c00,0x40c00,0x60800,0x60800,0x60800,0x60800,0x60800,0x60800,0x60800,0x60800,0x60c00,0x60c00,0x60c00,0x60c00,0x60c00,0x60c00,0x60c00,0x60c00,0x50800,0x50800,0x50800,0x50800,0x50800,0x50800,0x50800,0x50800,0x50c00,0x50c00,0x50c00,0x50c00,0x50c00,0x50c00,0x50c00,0x50c00,0x70800,0x70800,0x70800,0x70800,0x70800,0x70800,0x70800,0x70800,0x70c00,0x70c00,0x70c00,0x70c00,0x70c00,0x70c00,0x70c00,0x70c00,0x40001,0x40001,0x40001,0x40001,0x40001,0x40001,0x40001,0x40001,0x40401,0x40401,0x40401,0x40401,0x40401,0x40401,0x40401,0x40401,0x60001,0x60001,0x60001,0x60001,0x60001,0x60001,0x60001,0x60001,0x60401,0x60401,0x60401,0x60401,0x60401,0x60401,0x60401,0x60401,0x50001,0x50001,0x50001,0x50001,0x50001,0x50001,0x50001,0x50001,0x50401,0x50401,0x50401,0x50401,0x50401,0x50401,0x50401,0x50401,0x70001,0x70001,0x70001,0x70001,0x70001,0x70001,0x70001,0x70001,0x70401,0x70401,0x70401,0x70401,0x70401,0x70401,0x70401,0x70401,0x40801,0x40801,0x40801,0x40801,0x40801,0x40801,0x40801,0x40801,0x40c01,0x40c01,0x40c01,0x40c01,0x40c01,0x40c01,0x40c01,0x40c01,0x60801,0x60801,0x60801,0x60801,0x60801,0x60801,0x60801,0x60801,0x60c01,0x60c01,0x60c01,0x60c01,0x60c01,0x60c01,0x60c01,0x60c01,0x50801,0x50801,0x50801,0x50801,0x50801,0x50801,0x50801,0x50801,0x50c01,0x50c01,0x50c01,0x50c01,0x50c01,0x50c01,0x50c01,0x50c01,0x70801,0x70801,0x70801,0x70801,0x70801,0x70801,0x70801,0x70801,0x70c01,0x70c01,0x70c01,0x70c01,0x70c01,0x70c01,0x70c01,0x70c01,0xc0000,0xc0000,0xc0000,0xc0000,0xc0000,0xc0000,0xc0000,0xc0000,0xc0400,0xc0400,0xc0400,0xc0400,0xc0400,0xc0400,0xc0400,0xc0400,0xe0000,0xe0000,0xe0000,0xe0000,0xe0000,0xe0000,0xe0000,0xe0000,0xe0400,0xe0400,0xe0400,0xe0400,0xe0400,0xe0400,0xe0400,0xe0400,0xd0000,0xd0000,0xd0000,0xd0000,0xd0000,0xd0000,0xd0000,0xd0000,0xd0400,0xd0400,0xd0400,0xd0400,0xd0400,0xd0400,0xd0400,0xd0400,0xf0000,0xf0000,0xf0000,0xf0000,0xf0000,0xf0000,0xf0000,0xf0000,0xf0400,0xf0400,0xf0400,0xf0400,0xf0400,0xf0400,0xf0400,0xf0400,0xc0800,0xc0800,0xc0800,0xc0800,0xc0800,0xc0800,0xc0800,0xc0800,0xc0c00,0xc0c00,0xc0c00,0xc0c00,0xc0c00,0xc0c00,0xc0c00,0xc0c00,0xe0800,0xe0800,0xe0800,0xe0800,0xe0800,0xe0800,0xe0800,0xe0800,0xe0c00,0xe0c00,0xe0c00,0xe0c00,0xe0c00,0xe0c00,0xe0c00,0xe0c00,0xd0800,0xd0800,0xd0800,0xd0800,0xd0800,0xd0800,0xd0800,0xd0800,0xd0c00,0xd0c00,0xd0c00,0xd0c00,0xd0c00,0xd0c00,0xd0c00,0xd0c00,0xf0800,0xf0800,0xf0800,0xf0800,0xf0800,0xf0800,0xf0800,0xf0800,0xf0c00,0xf0c00,0xf0c00,0xf0c00,0xf0c00,0xf0c00,0xf0c00,0xf0c00,0xc0001,0xc0001,0xc0001,0xc0001,0xc0001,0xc0001,0xc0001,0xc0001,0xc0401,0xc0401,0xc0401,0xc0401,0xc0401,0xc0401,0xc0401,0xc0401,0xe0001,0xe0001,0xe0001,0xe0001,0xe0001,0xe0001,0xe0001,0xe0001,0xe0401,0xe0401,0xe0401,0xe0401,0xe0401,0xe0401,0xe0401,0xe0401,0xd0001,0xd0001,0xd0001,0xd0001,0xd0001,0xd0001,0xd0001,0xd0001,0xd0401,0xd0401,0xd0401,0xd0401,0xd0401,0xd0401,0xd0401,0xd0401,0xf0001,0xf0001,0xf0001,0xf0001,0xf0001,0xf0001,0xf0001,0xf0001,0xf0401,0xf0401,0xf0401,0xf0401,0xf0401,0xf0401,0xf0401,0xf0401,0xc0801,0xc0801,0xc0801,0xc0801,0xc0801,0xc0801,0xc0801,0xc0801,0xc0c01,0xc0c01,0xc0c01,0xc0c01,0xc0c01,0xc0c01,0xc0c01,0xc0c01,0xe0801,0xe0801,0xe0801,0xe0801,0xe0801,0xe0801,0xe0801,0xe0801,0xe0c01,0xe0c01,0xe0c01,0xe0c01,0xe0c01,0xe0c01,0xe0c01,0xe0c01,0xd0801,0xd0801,0xd0801,0xd0801,0xd0801,0xd0801,0xd0801,0xd0801,0xd0c01,0xd0c01,0xd0c01,0xd0c01,0xd0c01,0xd0c01,0xd0c01,0xd0c01,0xf0801,0xf0801,0xf0801,0xf0801,0xf0801,0xf0801,0xf0801,0xf0801,0xf0c01,0xf0c01,0xf0c01,0xf0c01,0xf0c01,0xf0c01,0xf0c01,0xf0c01 }; +uint32_t gpio9_low_array[0x400] = {0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160,0x0,0x20,0x40,0x60,0x100,0x120,0x140,0x160 }; +uint32_t gpio7_high_array[0x400] = {0x0,0x10000000,0x20000000,0x30000000,0x0,0x10000000,0x20000000,0x30000000,0x1000,0x10001000,0x20001000,0x30001000,0x1000,0x10001000,0x20001000,0x30001000,0x0,0x10000000,0x20000000,0x30000000,0x0,0x10000000,0x20000000,0x30000000,0x1000,0x10001000,0x20001000,0x30001000,0x1000,0x10001000,0x20001000,0x30001000,0x0,0x10000000,0x20000000,0x30000000,0x0,0x10000000,0x20000000,0x30000000,0x1000,0x10001000,0x20001000,0x30001000,0x1000,0x10001000,0x20001000,0x30001000,0x0,0x10000000,0x20000000,0x30000000,0x0,0x10000000,0x20000000,0x30000000,0x1000,0x10001000,0x20001000,0x30001000,0x1000,0x10001000,0x20001000,0x30001000,0x0,0x10000000,0x20000000,0x30000000,0x0,0x10000000,0x20000000,0x30000000,0x1000,0x10001000,0x20001000,0x30001000,0x1000,0x10001000,0x20001000,0x30001000,0x0,0x10000000,0x20000000,0x30000000,0x0,0x10000000,0x20000000,0x30000000,0x1000,0x10001000,0x20001000,0x30001000,0x1000,0x10001000,0x20001000,0x30001000,0x0,0x10000000,0x20000000,0x30000000,0x0,0x10000000,0x20000000,0x30000000,0x1000,0x10001000,0x20001000,0x30001000,0x1000,0x10001000,0x20001000,0x30001000,0x0,0x10000000,0x20000000,0x30000000,0x0,0x10000000,0x20000000,0x30000000,0x1000,0x10001000,0x20001000,0x30001000,0x1000,0x10001000,0x20001000,0x30001000,0x0,0x10000000,0x20000000,0x30000000,0x0,0x10000000,0x20000000,0x30000000,0x1000,0x10001000,0x20001000,0x30001000,0x1000,0x10001000,0x20001000,0x30001000,0x0,0x10000000,0x20000000,0x30000000,0x0,0x10000000,0x20000000,0x30000000,0x1000,0x10001000,0x20001000,0x30001000,0x1000,0x10001000,0x20001000,0x30001000,0x0,0x10000000,0x20000000,0x30000000,0x0,0x10000000,0x20000000,0x30000000,0x1000,0x10001000,0x20001000,0x30001000,0x1000,0x10001000,0x20001000,0x30001000,0x0,0x10000000,0x20000000,0x30000000,0x0,0x10000000,0x20000000,0x30000000,0x1000,0x10001000,0x20001000,0x30001000,0x1000,0x10001000,0x20001000,0x30001000,0x0,0x10000000,0x20000000,0x30000000,0x0,0x10000000,0x20000000,0x30000000,0x1000,0x10001000,0x20001000,0x30001000,0x1000,0x10001000,0x20001000,0x30001000,0x0,0x10000000,0x20000000,0x30000000,0x0,0x10000000,0x20000000,0x30000000,0x1000,0x10001000,0x20001000,0x30001000,0x1000,0x10001000,0x20001000,0x30001000,0x0,0x10000000,0x20000000,0x30000000,0x0,0x10000000,0x20000000,0x30000000,0x1000,0x10001000,0x20001000,0x30001000,0x1000,0x10001000,0x20001000,0x30001000,0x0,0x10000000,0x20000000,0x30000000,0x0,0x10000000,0x20000000,0x30000000,0x1000,0x10001000,0x20001000,0x30001000,0x1000,0x10001000,0x20001000,0x30001000,0x2,0x10000002,0x20000002,0x30000002,0x2,0x10000002,0x20000002,0x30000002,0x1002,0x10001002,0x20001002,0x30001002,0x1002,0x10001002,0x20001002,0x30001002,0x2,0x10000002,0x20000002,0x30000002,0x2,0x10000002,0x20000002,0x30000002,0x1002,0x10001002,0x20001002,0x30001002,0x1002,0x10001002,0x20001002,0x30001002,0x2,0x10000002,0x20000002,0x30000002,0x2,0x10000002,0x20000002,0x30000002,0x1002,0x10001002,0x20001002,0x30001002,0x1002,0x10001002,0x20001002,0x30001002,0x2,0x10000002,0x20000002,0x30000002,0x2,0x10000002,0x20000002,0x30000002,0x1002,0x10001002,0x20001002,0x30001002,0x1002,0x10001002,0x20001002,0x30001002,0x2,0x10000002,0x20000002,0x30000002,0x2,0x10000002,0x20000002,0x30000002,0x1002,0x10001002,0x20001002,0x30001002,0x1002,0x10001002,0x20001002,0x30001002,0x2,0x10000002,0x20000002,0x30000002,0x2,0x10000002,0x20000002,0x30000002,0x1002,0x10001002,0x20001002,0x30001002,0x1002,0x10001002,0x20001002,0x30001002,0x2,0x10000002,0x20000002,0x30000002,0x2,0x10000002,0x20000002,0x30000002,0x1002,0x10001002,0x20001002,0x30001002,0x1002,0x10001002,0x20001002,0x30001002,0x2,0x10000002,0x20000002,0x30000002,0x2,0x10000002,0x20000002,0x30000002,0x1002,0x10001002,0x20001002,0x30001002,0x1002,0x10001002,0x20001002,0x30001002,0x2,0x10000002,0x20000002,0x30000002,0x2,0x10000002,0x20000002,0x30000002,0x1002,0x10001002,0x20001002,0x30001002,0x1002,0x10001002,0x20001002,0x30001002,0x2,0x10000002,0x20000002,0x30000002,0x2,0x10000002,0x20000002,0x30000002,0x1002,0x10001002,0x20001002,0x30001002,0x1002,0x10001002,0x20001002,0x30001002,0x2,0x10000002,0x20000002,0x30000002,0x2,0x10000002,0x20000002,0x30000002,0x1002,0x10001002,0x20001002,0x30001002,0x1002,0x10001002,0x20001002,0x30001002,0x2,0x10000002,0x20000002,0x30000002,0x2,0x10000002,0x20000002,0x30000002,0x1002,0x10001002,0x20001002,0x30001002,0x1002,0x10001002,0x20001002,0x30001002,0x2,0x10000002,0x20000002,0x30000002,0x2,0x10000002,0x20000002,0x30000002,0x1002,0x10001002,0x20001002,0x30001002,0x1002,0x10001002,0x20001002,0x30001002,0x2,0x10000002,0x20000002,0x30000002,0x2,0x10000002,0x20000002,0x30000002,0x1002,0x10001002,0x20001002,0x30001002,0x1002,0x10001002,0x20001002,0x30001002,0x2,0x10000002,0x20000002,0x30000002,0x2,0x10000002,0x20000002,0x30000002,0x1002,0x10001002,0x20001002,0x30001002,0x1002,0x10001002,0x20001002,0x30001002,0x2,0x10000002,0x20000002,0x30000002,0x2,0x10000002,0x20000002,0x30000002,0x1002,0x10001002,0x20001002,0x30001002,0x1002,0x10001002,0x20001002,0x30001002,0x4,0x10000004,0x20000004,0x30000004,0x4,0x10000004,0x20000004,0x30000004,0x1004,0x10001004,0x20001004,0x30001004,0x1004,0x10001004,0x20001004,0x30001004,0x4,0x10000004,0x20000004,0x30000004,0x4,0x10000004,0x20000004,0x30000004,0x1004,0x10001004,0x20001004,0x30001004,0x1004,0x10001004,0x20001004,0x30001004,0x4,0x10000004,0x20000004,0x30000004,0x4,0x10000004,0x20000004,0x30000004,0x1004,0x10001004,0x20001004,0x30001004,0x1004,0x10001004,0x20001004,0x30001004,0x4,0x10000004,0x20000004,0x30000004,0x4,0x10000004,0x20000004,0x30000004,0x1004,0x10001004,0x20001004,0x30001004,0x1004,0x10001004,0x20001004,0x30001004,0x4,0x10000004,0x20000004,0x30000004,0x4,0x10000004,0x20000004,0x30000004,0x1004,0x10001004,0x20001004,0x30001004,0x1004,0x10001004,0x20001004,0x30001004,0x4,0x10000004,0x20000004,0x30000004,0x4,0x10000004,0x20000004,0x30000004,0x1004,0x10001004,0x20001004,0x30001004,0x1004,0x10001004,0x20001004,0x30001004,0x4,0x10000004,0x20000004,0x30000004,0x4,0x10000004,0x20000004,0x30000004,0x1004,0x10001004,0x20001004,0x30001004,0x1004,0x10001004,0x20001004,0x30001004,0x4,0x10000004,0x20000004,0x30000004,0x4,0x10000004,0x20000004,0x30000004,0x1004,0x10001004,0x20001004,0x30001004,0x1004,0x10001004,0x20001004,0x30001004,0x4,0x10000004,0x20000004,0x30000004,0x4,0x10000004,0x20000004,0x30000004,0x1004,0x10001004,0x20001004,0x30001004,0x1004,0x10001004,0x20001004,0x30001004,0x4,0x10000004,0x20000004,0x30000004,0x4,0x10000004,0x20000004,0x30000004,0x1004,0x10001004,0x20001004,0x30001004,0x1004,0x10001004,0x20001004,0x30001004,0x4,0x10000004,0x20000004,0x30000004,0x4,0x10000004,0x20000004,0x30000004,0x1004,0x10001004,0x20001004,0x30001004,0x1004,0x10001004,0x20001004,0x30001004,0x4,0x10000004,0x20000004,0x30000004,0x4,0x10000004,0x20000004,0x30000004,0x1004,0x10001004,0x20001004,0x30001004,0x1004,0x10001004,0x20001004,0x30001004,0x4,0x10000004,0x20000004,0x30000004,0x4,0x10000004,0x20000004,0x30000004,0x1004,0x10001004,0x20001004,0x30001004,0x1004,0x10001004,0x20001004,0x30001004,0x4,0x10000004,0x20000004,0x30000004,0x4,0x10000004,0x20000004,0x30000004,0x1004,0x10001004,0x20001004,0x30001004,0x1004,0x10001004,0x20001004,0x30001004,0x4,0x10000004,0x20000004,0x30000004,0x4,0x10000004,0x20000004,0x30000004,0x1004,0x10001004,0x20001004,0x30001004,0x1004,0x10001004,0x20001004,0x30001004,0x4,0x10000004,0x20000004,0x30000004,0x4,0x10000004,0x20000004,0x30000004,0x1004,0x10001004,0x20001004,0x30001004,0x1004,0x10001004,0x20001004,0x30001004,0x6,0x10000006,0x20000006,0x30000006,0x6,0x10000006,0x20000006,0x30000006,0x1006,0x10001006,0x20001006,0x30001006,0x1006,0x10001006,0x20001006,0x30001006,0x6,0x10000006,0x20000006,0x30000006,0x6,0x10000006,0x20000006,0x30000006,0x1006,0x10001006,0x20001006,0x30001006,0x1006,0x10001006,0x20001006,0x30001006,0x6,0x10000006,0x20000006,0x30000006,0x6,0x10000006,0x20000006,0x30000006,0x1006,0x10001006,0x20001006,0x30001006,0x1006,0x10001006,0x20001006,0x30001006,0x6,0x10000006,0x20000006,0x30000006,0x6,0x10000006,0x20000006,0x30000006,0x1006,0x10001006,0x20001006,0x30001006,0x1006,0x10001006,0x20001006,0x30001006,0x6,0x10000006,0x20000006,0x30000006,0x6,0x10000006,0x20000006,0x30000006,0x1006,0x10001006,0x20001006,0x30001006,0x1006,0x10001006,0x20001006,0x30001006,0x6,0x10000006,0x20000006,0x30000006,0x6,0x10000006,0x20000006,0x30000006,0x1006,0x10001006,0x20001006,0x30001006,0x1006,0x10001006,0x20001006,0x30001006,0x6,0x10000006,0x20000006,0x30000006,0x6,0x10000006,0x20000006,0x30000006,0x1006,0x10001006,0x20001006,0x30001006,0x1006,0x10001006,0x20001006,0x30001006,0x6,0x10000006,0x20000006,0x30000006,0x6,0x10000006,0x20000006,0x30000006,0x1006,0x10001006,0x20001006,0x30001006,0x1006,0x10001006,0x20001006,0x30001006,0x6,0x10000006,0x20000006,0x30000006,0x6,0x10000006,0x20000006,0x30000006,0x1006,0x10001006,0x20001006,0x30001006,0x1006,0x10001006,0x20001006,0x30001006,0x6,0x10000006,0x20000006,0x30000006,0x6,0x10000006,0x20000006,0x30000006,0x1006,0x10001006,0x20001006,0x30001006,0x1006,0x10001006,0x20001006,0x30001006,0x6,0x10000006,0x20000006,0x30000006,0x6,0x10000006,0x20000006,0x30000006,0x1006,0x10001006,0x20001006,0x30001006,0x1006,0x10001006,0x20001006,0x30001006,0x6,0x10000006,0x20000006,0x30000006,0x6,0x10000006,0x20000006,0x30000006,0x1006,0x10001006,0x20001006,0x30001006,0x1006,0x10001006,0x20001006,0x30001006,0x6,0x10000006,0x20000006,0x30000006,0x6,0x10000006,0x20000006,0x30000006,0x1006,0x10001006,0x20001006,0x30001006,0x1006,0x10001006,0x20001006,0x30001006,0x6,0x10000006,0x20000006,0x30000006,0x6,0x10000006,0x20000006,0x30000006,0x1006,0x10001006,0x20001006,0x30001006,0x1006,0x10001006,0x20001006,0x30001006,0x6,0x10000006,0x20000006,0x30000006,0x6,0x10000006,0x20000006,0x30000006,0x1006,0x10001006,0x20001006,0x30001006,0x1006,0x10001006,0x20001006,0x30001006,0x6,0x10000006,0x20000006,0x30000006,0x6,0x10000006,0x20000006,0x30000006,0x1006,0x10001006,0x20001006,0x30001006,0x1006,0x10001006,0x20001006,0x30001006 }; +uint32_t gpio8_high_array[0x400] = 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,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x400000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0x800000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0xc00000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x40000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x440000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0x840000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000,0xc40000 }; +uint32_t gpio9_high_array[0x400] = {0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x0,0x0,0x0,0x0,0x80,0x80,0x80,0x80,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080,0x80000000,0x80000000,0x80000000,0x80000000,0x80000080,0x80000080,0x80000080,0x80000080 }; + +// Array that holds the translation between the 8088 data bus inputs and the Teensy 4.1 GPIO6 mapping +// +uint8_t read_data_array[0x10000] = { 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}; + + +// BIOS ROMS +// ---------- +// Uncomment the one you wish to use, then uncomment the appropriately sized +// Internal BIOS ROM Selector at the end of the BIU_Bus_Cycle code. +// ---------- + +// SuperSoft Diagnostic ROM +//uint8_t Test_Image[8192] = { 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}; + + +DMAMEM uint8_t internal_RAM1[0x60000]; + uint8_t internal_RAM2[0x40000]; + +// ------------------------------------------------------------------------------ +// ------------------------------------------------------------------------------ + +// Setup Teensy 4.1 IO's +// +void setup() { + + pinMode(PIN_CLK, INPUT); + pinMode(PIN_INTR, INPUT); + pinMode(PIN_NMI, INPUT); + pinMode(PIN_RESET, INPUT); + pinMode(PIN_READY, INPUT); + + pinMode(PIN_S2, OUTPUT); + pinMode(PIN_S1, OUTPUT); + pinMode(PIN_S0, OUTPUT); + pinMode(PIN_LOCK, OUTPUT); + + pinMode(PIN_ADDR19, OUTPUT); + pinMode(PIN_ADDR18, OUTPUT); + pinMode(PIN_ADDR17, OUTPUT); + pinMode(PIN_ADDR16, OUTPUT); + pinMode(PIN_ADDR15, OUTPUT); + pinMode(PIN_ADDR14, OUTPUT); + pinMode(PIN_ADDR13, OUTPUT); + pinMode(PIN_ADDR12, OUTPUT); + pinMode(PIN_ADDR11, OUTPUT); + pinMode(PIN_ADDR10, OUTPUT); + pinMode(PIN_ADDR9, OUTPUT); + pinMode(PIN_ADDR8, OUTPUT); + + pinMode(PIN_AD7_OUT, OUTPUT); + pinMode(PIN_AD6_OUT, OUTPUT); + pinMode(PIN_AD5_OUT, OUTPUT); + pinMode(PIN_AD4_OUT, OUTPUT); + pinMode(PIN_AD3_OUT, OUTPUT); + pinMode(PIN_AD2_OUT, OUTPUT); + pinMode(PIN_AD1_OUT, OUTPUT); + pinMode(PIN_AD0_OUT, OUTPUT); + pinMode(PIN_AD_OE_n, OUTPUT); + + pinMode(PIN_AD7_IN, INPUT); + pinMode(PIN_AD6_IN, INPUT); + pinMode(PIN_AD5_IN, INPUT); + pinMode(PIN_AD4_IN, INPUT); + pinMode(PIN_AD3_IN, INPUT); + pinMode(PIN_AD2_IN, INPUT); + pinMode(PIN_AD1_IN, INPUT); + pinMode(PIN_AD0_IN, INPUT); + + digitalWriteFast(PIN_LOCK,1); + digitalWriteFast(PIN_S2,1); + digitalWriteFast(PIN_S1,1); + digitalWriteFast(PIN_S0,1); + + pinMode(PIN_MAX_n, INPUT); + pinMode(PIN_ALE, OUTPUT); + pinMode(PIN_RD_n, OUTPUT); + pinMode(PIN_INTA_n, OUTPUT); + + digitalWriteFast(PIN_ALE,0); + digitalWriteFast(PIN_RD_n,1); + digitalWriteFast(PIN_INTA_n,1); + + +} + +// -------------------------------------------------------------------------------------------------- +// -------------------------------------------------------------------------------------------------- + +inline uint8_t Internal_RAM_Read(uint32_t local_address) { + uint8_t local_temp; + + if (local_address<0x60000) local_temp = internal_RAM1[local_address]; + else local_temp = internal_RAM2[local_address-0x60000]; + + return local_temp; +} + +inline void Internal_RAM_Write(uint32_t local_address, uint8_t local_data) { + + if (local_address<0x60000) internal_RAM1[local_address] = (local_data&0xFF); + else internal_RAM2[local_address-0x60000] = (local_data&0xFF); + + return; +} + + +// -------------------------------------------------------------------------------------------------- +// -------------------------------------------------------------------------------------------------- +// +// Begin 8088 Bus Interface Unit +// +// -------------------------------------------------------------------------------------------------- +// -------------------------------------------------------------------------------------------------- + + + +// ------------------------------------------------- +// Wait for the CLK rising edge +// ------------------------------------------------- +inline void wait_for_CLK_rising_edge() { + + while ( (GPIO6_DR&0x08000000) != 0) {} // First ensure clock is at a low level + do { GPIO6_raw_data = GPIO6_DR; } while ( (GPIO6_raw_data&0x08000000) == 0); // Then poll for the first instance where clock is not low + return; +} + + +// ------------------------------------------------- +// Wait for the CLK falling edge and sample signals +// ------------------------------------------------- +inline void wait_for_CLK_falling_edge() { + + if (clock_counter>0) clock_counter--; // Count down clock_counter here to keep new opcodes from beginning yet allowing prefetch queue to fill + + if (nmi_d==0 && direct_nmi!=0) nmi_latched=1; // Latch rising edge of NMI + nmi_d = direct_nmi; + + while ( (GPIO6_DR&0x08000000) == 0) {} // First ensure clock is at a high level + do { } while ( (GPIO6_DR&0x08000000) != 0); // Then poll for the first instance where clock is not high + + GPIO6_raw_data = GPIO6_DR; // Store slightly-delayed version of GPIO6 in a global register + direct_nmi = (GPIO6_raw_data&0x00010000); + return; +} + + +// ------------------------------------------------- +// Initiate a 8088 Bus Cycle +// ------------------------------------------------- +inline uint8_t BIU_Bus_Cycle(uint8_t biu_operation, uint32_t local_address , uint8_t local_data) { + uint8_t read_cycle=0; + uint32_t gpio7_out=0; + uint32_t gpio8_out=0; + uint32_t gpio9_out=0; + uint32_t local_address_high=0; + uint32_t local_address_low=0; + uint8_t joe; + uint8_t biu_operation_type; + uint32_t local_address16; + + + biu_operation_type = biu_operation&0xF; // Strips off byte/word nibble + local_address16 = local_address&0xFFFF; + + // Patch for PCjr interrupt timing issue in the BIOS around the video testing + // + if ( (biu_operation_type==0x4) && (local_address == 0xF044C) ) register_flags=(register_flags & 0xFDFF); // Clear Interrupt Flag + + + // Always mirror writes to the internl 640 KB of RAM + // + if ( (biu_operation_type==0x6) && (local_address<0xA0000) ) { + Internal_RAM_Write(local_address,local_data); // Internal RAM Writes + //if ( (acceleration_mode>0)&& (local_address<0x20000) ) {wait_for_CLK_falling_edge(); return 0xEE; } // If accelerated and above 128K then dont perform bus cycle + if ( (acceleration_mode>0) ) {wait_for_CLK_falling_edge(); return 0xEE; } // If accelerated and above 128K then dont perform bus cycle + } + + + if (acceleration_mode>0) { + if ( (biu_operation_type==0x4) && (local_address<0xA0000) ) { return (Internal_RAM_Read(local_address)); } // Internal Code RAM Reads + else if ( (biu_operation_type==0x5) && (local_address<0xA0000) ) { return (Internal_RAM_Read(local_address)); } // Internal Memory RAM Reads + } + + + // Set the acceleration mode + if ( (biu_operation_type==0x2) && (local_address16==0x267) && ( (local_data&0xF0)==0x90) ) { acceleration_mode = (0x0F&local_data); return 0xEE; } + + + + if ( (biu_operation & 0x2)==0x0 ) read_cycle=1; else read_cycle=0; + + + // For HALT, just wait for next rising edge of CLK, then exit + // + if (biu_operation==SEND_HALT ) { + wait_for_CLK_rising_edge(); + return 0xEE; + } + + + // Execute the 8088 Minimum Mode Bus Cycle + // + else { + noInterrupts(); // Disable Teensy interupts so the 8088 bus cycle can complete without interruption + + GPIO6_raw_data = GPIO6_DR | 0x90001004; // S0, RD_n, LOCK, INTA_n = 1 + GPIO6_DR = GPIO6_raw_data; + + + + // Pre-calculate before the clock edge to gain speed + // + local_address_high = (0xFFC00&local_address)>>10; + local_address_low = (0x003FF&local_address); + gpio7_out = gpio7_high_array[local_address_high] | gpio7_low_array[local_address_low]; + gpio8_out = gpio8_high_array[local_address_high] ; + gpio9_out = gpio9_high_array[local_address_high] | gpio9_low_array[local_address_low]; + + + // T0.5 Drive DT_R to begin the cycle on the rising edge of CLK + // ----------------------------------------------------------------------------- + wait_for_CLK_rising_edge(); + GPIO6_raw_data = GPIO6_DR; + if (read_cycle==1) { + GPIO6_DR = GPIO6_raw_data & 0xFFFFDFFF; // Set S[1] to "0" // S1 shared with DT_R + } + else { + GPIO6_DR = GPIO6_raw_data | 0x00002000; // Set S[1] to "1" // S1 shared with DT_R + } + + + // T1 + // ----------------------------------------------------------------------------- + wait_for_CLK_falling_edge(); + + GPIO7_DR = gpio7_out; // Drive the Address output pins - also the PIN_AD_OE_n set to 0 + GPIO8_DR = gpio8_out; + GPIO9_DR = gpio9_out; + + local_address_low = (0x300&local_address_low) | (0x000FF&local_data); // Pre-calculate the data output signals + gpio7_out = gpio7_high_array[local_address_high] | gpio7_low_array[local_address_low]; + gpio9_out = gpio9_high_array[local_address_high] | gpio9_low_array[local_address_low]; + + + GPIO6_raw_data = GPIO6_DR | 0x00000008; //digitalWriteFast(PIN_ALE,1); + if ( (biu_operation & 0xF)==0x1 ) GPIO6_DR = GPIO6_raw_data | 0x40000000; // Set S[2] to "1" // S2 shared with IO_M + else if ( (biu_operation & 0xF)==0x2 ) GPIO6_DR = GPIO6_raw_data | 0x40000000; // Set S[2] to "1" // S2 shared with IO_M + else GPIO6_DR = GPIO6_raw_data & 0xBFFFFFFF; // Set S[2] to "0" // S2 shared with IO_M + + + // T1.5 Drive ALE low + // ----------------------------------------------------------------------------- + wait_for_CLK_rising_edge(); + + GPIO6_raw_data = GPIO6_DR & 0xFFFFFFF7; //digitalWriteFast(PIN_ALE,0); + if (read_cycle==0) GPIO6_raw_data = GPIO6_raw_data & 0xFFFFEFFF; //digitalWriteFast(PIN_S0,0); // S0 shared with DEN_n + GPIO6_DR = GPIO6_raw_data; + + + // T2 - If a read cycle, disable the AD[7:0] buffer + // If a write cycle, drive data onto the AD[7:0] pins + // ----------------------------------------------------------------------------- + wait_for_CLK_falling_edge(); + if (biu_operation==INTERRUPT_ACK) { digitalWriteFast(PIN_INTA_n,0); + GPIO9_DR = gpio9_out | 0x00000010; } // GIPO9-04 = PIN_AD0_OE_n - Disable the data bus driver + + else if (read_cycle==1) { digitalWriteFast(PIN_RD_n,0); + GPIO9_DR = gpio9_out | 0x00000010; } // GIPO9-04 = PIN_AD0_OE_n - Disable the data bus driver + + else { digitalWriteFast(PIN_LOCK,0); // LOCK shared with WR_n + GPIO7_DR = gpio7_out; + GPIO9_DR = gpio9_out; + } + + + // T2.5 Drive DEN_n + // ----------------------------------------------------------------------------- + wait_for_CLK_rising_edge(); + GPIO6_raw_data = GPIO6_DR & 0xFFFFEFFF; //digitalWriteFast(PIN_S0,0); // S0 shared with DEN_n + GPIO6_DR = GPIO6_raw_data; + + + // T3 - Sample the READY signal on the falling edge of CLK until it goes high + // Then disable the S bits to 111 + // ----------------------------------------------------------------------------- + do { wait_for_CLK_falling_edge(); + + } while ( ((GPIO6_raw_data&0x01000000) == 0)); // Poll the slightly delayed sample of READY signal directly from the GPIO + + + // T4 - Sample read data on the next falling edge of CLK + // ----------------------------------------------------------------------------- + //wait_for_CLK_falling_edge(); + wait_for_CLK_rising_edge(); + + //GPIO6_raw_data = GPIO6_DR | 0x90003004; // S1, S0, RD_n, LOCK, INTA_n = 1 + //GPIO6_raw_data = GPIO6_DR | 0x90001004; // S0, RD_n, LOCK, INTA_n = 1 + GPIO6_raw_data = GPIO6_DR | 0x90000004; // RD_n, LOCK, INTA_n = 1 + GPIO6_DR = GPIO6_raw_data; + + interrupts(); // Re-enable Teensy's interrupts so the UART and downloading works + + if (read_cycle==0) { + return 0xEE; + } + else + { + + joe = read_data_array[ (GPIO6_raw_data>>16) ]; // Read the 8088 bus data, re-arranging bits through read_data_array + + + + // Internal BIOS ROM Selector + // ---------------------------- + // + //if ( ((biu_operation&0xF)>=0x4) && (local_address >= 0xF0000) ) return (Test_Image[local_address-0xF0000]); else return joe; // 64KB ROMs + //if ( ((biu_operation&0xF)>=0x4) && (local_address >= 0xF8000) ) return (Test_Image[local_address-0xF8000]); else return joe; // 32KB ROMs + //if ( ((biu_operation&0xF)>=0x4) && (local_address >= 0xFC000) ) return (Test_Image[local_address-0xFC000]); else return joe; // 16KB ROMs + //if ( ((biu_operation&0xF)>=0x4) && (local_address >= 0xFE000) ) return (Test_Image[local_address-0xFE000]); else return joe; // 8K ROMs + + // Reads always use mirrored 640 KB of internal RAM + // + if (( (biu_operation&0xF)>=0x4) && (local_address<0xA0000) ) { return (Internal_RAM_Read(local_address)); } + + + return joe; + + } + +} +} + +// -------------------------------------------------------------------------------------------------- +// -------------------------------------------------------------------------------------------------- +// +// End 8088 Bus Interface Unit +// +// -------------------------------------------------------------------------------------------------- +// -------------------------------------------------------------------------------------------------- + + +// ------------------------------------------------------ +// Calculate full address allowing for segment override +// ------------------------------------------------------ + uint32_t Calculate_Full_Address(uint8_t segment_overridable , uint8_t local_segment , uint16_t local_address) { + uint32_t biu_full_address=0; + uint8_t local_segment_override; + + local_segment_override = prefix_flags&0xF0; + + if (segment_overridable==1 && local_segment_override!=0) { + clock_counter=clock_counter+2; // Add two additional clocks for segment override + switch (local_segment_override) { + case SEGMENT_ES: biu_full_address = ( (register_es<<4) + local_address ); break; + case SEGMENT_SS: biu_full_address = ( (register_ss<<4) + local_address ); break; + case SEGMENT_DS: biu_full_address = ( (register_ds<<4) + local_address ); break; + case SEGMENT_CS: biu_full_address = ( (register_cs<<4) + local_address ); break; + } + } + else { + switch (local_segment) { + case SEGMENT_00: biu_full_address = ( local_address ); break; + case SEGMENT_ES: biu_full_address = ( (register_es<<4) + local_address ); break; + case SEGMENT_SS: biu_full_address = ( (register_ss<<4) + local_address ); break; + case SEGMENT_DS: biu_full_address = ( (register_ds<<4) + local_address ); break; + case SEGMENT_CS: biu_full_address = ( (register_cs<<4) + local_address ); break; + } + } + biu_full_address = biu_full_address & 0xFFFFF; // R3 + return biu_full_address; +} + + +// ------------------------------------------------------ +// Initiate Bus Interface cycles +// ------------------------------------------------------ +uint16_t Biu_Operation(uint8_t biu_operation , uint8_t segment_overridable ,uint16_t local_segment , uint16_t local_address, uint16_t local_write_data ) { + uint8_t read_data_lower; + uint8_t read_data_upper=0; + uint16_t read_data; + uint32_t local_biu_full_address=0; + + + if (biu_operation==INTERRUPT_ACK) { + assert_lock=1; + read_data = BIU_Bus_Cycle(biu_operation, 0x00000 , 0x00 ); + wait_for_CLK_falling_edge(); + wait_for_CLK_falling_edge(); + read_data = BIU_Bus_Cycle(biu_operation, 0x00000 , 0x00 ); + } + + else if (biu_operation > 0x0F) { // Word cycle + local_biu_full_address = Calculate_Full_Address(segment_overridable , local_segment , local_address); + read_data_lower = BIU_Bus_Cycle(biu_operation, local_biu_full_address , (0x00ff&local_write_data) ); + local_address ++; // 16-bit value allows for wrapping within a segment + local_biu_full_address = Calculate_Full_Address(segment_overridable , local_segment , local_address); + read_data_upper = BIU_Bus_Cycle(biu_operation, local_biu_full_address , (local_write_data>>8) ); + read_data = (read_data_upper<<8) | read_data_lower; + } + + else { + local_biu_full_address = Calculate_Full_Address(segment_overridable , local_segment , local_address); + read_data = BIU_Bus_Cycle(biu_operation, local_biu_full_address , (0x00ff&local_write_data) ); + + } + return read_data; +} + + + +// ------------------------------------------------------ +// Add a byte to the prefetch queue +// ------------------------------------------------------ +void pfq_add_byte() { + uint8_t local_byte; + + if (prefetch_queue_count>3) return; // Prefetch queue limited to four bytes + + local_byte = Biu_Operation(CODE_READ_BYTE , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_CS , pfq_in_address, 0x00 ); + + pfq_in_address++; + + switch(prefetch_queue_count) { + case 0: pfq_byte_A = local_byte; break; + case 1: pfq_byte_B = local_byte; break; + case 2: pfq_byte_C = local_byte; break; + case 3: pfq_byte_D = local_byte; break; + } + prefetch_queue_count++; + return; +} + + +// ------------------------------------------------------ +// Fetch a byte from the prefetch queue +// ------------------------------------------------------ +uint8_t pfq_fetch_byte() { + uint8_t pfq_top_byte; + + if (prefetch_queue_count==0) pfq_add_byte(); // Prefetch queue empty, so must fill at least one byte in the queue + + pfq_top_byte = pfq_byte_A; + pfq_byte_A = pfq_byte_B; + pfq_byte_B = pfq_byte_C; + pfq_byte_C = pfq_byte_D; + pfq_byte_D = 0x00; + prefetch_queue_count--; + + register_ip++; + return pfq_top_byte; +} + + +// ------------------------------------------------------ +// Fetch a word from the prefetch queue +// ------------------------------------------------------ +uint16_t pfq_fetch_word() { + uint16_t local_temp; + local_temp = pfq_fetch_byte(); + local_temp = ( pfq_fetch_byte()<<8) | local_temp; + return local_temp; +} + +// -------------------------------------------------------------------------------------------------- +// -------------------------------------------------------------------------------------------------- +// +// Begin 8086 Execution Unit +// +// -------------------------------------------------------------------------------------------------- +// -------------------------------------------------------------------------------------------------- + + +// ------------------------------------------------------ +// 8086 Reset routine +// ------------------------------------------------------ +// +void reset_sequence() { + uint32_t writeback_data7=0; + + + while (direct_reset_raw!=0) {} // Stay here until RESET is de-aserted + + wait_for_CLK_falling_edge(); // Wait 7 clocks total before beginning to fetch instructions + wait_for_CLK_falling_edge(); + wait_for_CLK_falling_edge(); + + writeback_data7 = (0xBFFFCFFF & GPIO6_DR); // Read in current GPIOx register value and clear the bits we intend to update + GPIO6_DR = writeback_data7 | 0x40003000; // Set S[2:0] to "111" + + + wait_for_CLK_falling_edge(); + wait_for_CLK_falling_edge(); + wait_for_CLK_falling_edge(); + wait_for_CLK_falling_edge(); + wait_for_CLK_falling_edge(); + wait_for_CLK_falling_edge(); + wait_for_CLK_falling_edge(); + + nmi_latched=0; // Debounce NMI + + + clock_counter=10; // Debounce prefixes and cycle counter + last_instruction_set_a_prefix=0; + pause_interrupts=0; + + register_flags = 0x0000; // Reset registers + register_es = 0; + register_ss = 0; + register_ds = 0; + register_cs = 0xFFFF; + register_ip = 0; + pfq_in_address = 0; + prefetch_queue_count = 0; + + wait_for_CLK_falling_edge(); + return; +} + + +// ------------------------------------------------------ +// Displacement and sign helpers +// ------------------------------------------------------ +uint16_t Sign_Extended_Byte(uint16_t local_data) { if ((0x0080&local_data)!=0) return (0xFF00|local_data); else return (0x00FF&local_data); } + + +void opcode_0x90() { clock_counter = 3; return; } // 0x90 - NOP + + +// ------------------------------------------------------ +// Set Flags +// ------------------------------------------------------ +void opcode_0xF8() { clock_counter=2; register_flags=(register_flags & 0xFFFE); return; } // 0xF8 - CLC - Clear Carry Flag +void opcode_0xF5() { clock_counter=2; register_flags=(register_flags ^ 0x0001); return; } // 0xF5 - CMC - Complement Carry Flag +void opcode_0xF9() { clock_counter=2; register_flags=(register_flags | 0x0001); return; } // 0xF9 - STC - Set Carry Flag +void opcode_0xFC() { clock_counter=2; register_flags=(register_flags & 0xFBFF); return; } // 0xFC - CLD - Clear Direction Flag +void opcode_0xFD() { clock_counter=2; register_flags=(register_flags | 0x0400); return; } // 0xFD - STD - Set Direction Flag +void opcode_0xFA() { clock_counter=2; register_flags=(register_flags & 0xFDFF); return; } // 0xFA - CLI - Clear Interrupt Flag +void opcode_0xFB() { clock_counter=2; register_flags=(register_flags | 0x0200); last_instruction_set_a_prefix=1; pause_interrupts=1; return; } // 0xFB - STI - Set Interrupt Flag + +void opcode_0x9F() { clock_counter=4; register_ax=((register_flags<<8)|(register_ax&0x00FF)); register_ax=register_ax|0x0200; return; } // 0x9F - LAHF - Load 8080 Flags into AH Register +void opcode_0x9E() { clock_counter=4; register_flags=0x02| ((register_flags&0xFF00)|((register_ax&0xD500)>>8)); return; } // 0x9E - SAHF - 0 R3 + + + + +// ------------------------------------------------------ +// Set Prefixes +// ------------------------------------------------------ +void opcode_0xF0() { clock_counter=2; prefix_flags=(prefix_flags|0x01); last_instruction_set_a_prefix=1; pause_interrupts=1; return; } // 0xF0 - LOCK Prefix +void opcode_0xF2() { clock_counter=2; prefix_flags=(prefix_flags|0x02); last_instruction_set_a_prefix=1; pause_interrupts=1; return; } // 0xF2 - REPNZ Prefix +void opcode_0xF3() { clock_counter=2; prefix_flags=(prefix_flags|0x04); last_instruction_set_a_prefix=1; pause_interrupts=1; return; } // 0xF3 - REPZ Prefix +void opcode_0x26() { clock_counter=2; prefix_flags=(prefix_flags|0x10); last_instruction_set_a_prefix=1; pause_interrupts=1; return; } // 0x26 - Segment Override Prefix - ES +void opcode_0x2E() { clock_counter=2; prefix_flags=(prefix_flags|0x20); last_instruction_set_a_prefix=1; pause_interrupts=1; return; } // 0x2E - Segment Override Prefix - CS +void opcode_0x36() { clock_counter=2; prefix_flags=(prefix_flags|0x40); last_instruction_set_a_prefix=1; pause_interrupts=1; return; } // 0x36 - Segment Override Prefix - SS +void opcode_0x3E() { clock_counter=2; prefix_flags=(prefix_flags|0x80); last_instruction_set_a_prefix=1; pause_interrupts=1; return; } // 0x3E - Segment Override Prefix - DS + + +void opcode_0x98() { clock_counter=2; register_ax = Sign_Extended_Byte(register_ax); return; } // 0x98 - CBW - Sign extend AL Register into AH Register +void opcode_0x99() { clock_counter=5; if(0x8000®ister_ax) register_dx=0xFFFF; else register_dx=0x0000; return; } // 0x99 - CWD - Sign extend AX Register into DX Register + + + + +// ------------------------------------------------------ +// Stack - PUSH +// ------------------------------------------------------ +void Push(uint16_t local_data) { + register_sp = register_sp - 2; + Biu_Operation(MEM_WRITE_WORD , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_SS , register_sp , local_data ); + return; +} + +void opcode_0x06() { clock_counter=clock_counter+14; Push(register_es); return; } // 0x06 - PUSH ES +void opcode_0x0E() { clock_counter=clock_counter+14; Push(register_cs); return; } // 0x0E - PUSH CS +void opcode_0x16() { clock_counter=clock_counter+14; Push(register_ss); return; } // 0x16 - PUSH SS +void opcode_0x1E() { clock_counter=clock_counter+14; Push(register_ds); return; } // 0x1E - PUSH DS +void opcode_0x9C() { clock_counter=clock_counter+14; Push((0xF000|register_flags)); return; } // 0x9C - PUSHF - Push Flags + +void opcode_0x50() { clock_counter=clock_counter+15; Push(register_ax); return; } // 0x50 - PUSH AX +void opcode_0x51() { clock_counter=clock_counter+15; Push(register_cx); return; } // 0x51 - PUSH CX +void opcode_0x52() { clock_counter=clock_counter+15; Push(register_dx); return; } // 0x52 - PUSH DX +void opcode_0x53() { clock_counter=clock_counter+15; Push(register_bx); return; } // 0x53 - PUSH BX +void opcode_0x54() { clock_counter=clock_counter+15; Push(register_sp-2); return; } // 0x54 - PUSH the new SP +void opcode_0x55() { clock_counter=clock_counter+15; Push(register_bp); return; } // 0x55 - PUSH BP +void opcode_0x56() { clock_counter=clock_counter+15; Push(register_si); return; } // 0x56 - PUSH SI +void opcode_0x57() { clock_counter=clock_counter+15; Push(register_di); return; } // 0x57 - PUSH DI + + + +// ------------------------------------------------------ +// Jumps +// ------------------------------------------------------ +void Jump_Not_Taken8() { + clock_counter = clock_counter + 3; + pfq_fetch_byte(); + return; +} + +void Jump_Taken8() { + uint16_t local_displacement; + + clock_counter = clock_counter + 9; + local_displacement = pfq_fetch_byte(); + local_displacement = Sign_Extended_Byte(local_displacement); + register_ip = register_ip + local_displacement; + pfq_in_address = register_ip; + prefetch_queue_count=0; + return; +} + +void Jump_Taken16() { + uint16_t local_displacement; + + clock_counter = clock_counter + 7; + local_displacement = pfq_fetch_word(); + register_ip = register_ip + local_displacement; + pfq_in_address = register_ip; + prefetch_queue_count=0; + return; +} + +void Jump_Taken32() { + uint16_t local_new_ip; + uint16_t local_new_cs; + + clock_counter = clock_counter + 7; + local_new_ip = pfq_fetch_word(); + local_new_cs = pfq_fetch_word(); + + register_cs = local_new_cs; + register_ip = local_new_ip; + + pfq_in_address = register_ip; + prefetch_queue_count=0; + return; +} + +void opcode_0x70() { if (flag_o==1) Jump_Taken8(); else Jump_Not_Taken8(); return; } // [0x70 0xdd] - JO - Jump on Overflow +void opcode_0x71() { if (flag_o==0) Jump_Taken8(); else Jump_Not_Taken8(); return; } // [0x71 0xdd] - JNO - Jump on Not Overflow +void opcode_0x72() { if (flag_c==1) Jump_Taken8(); else Jump_Not_Taken8(); return; } // [0x72 0xdd] - JB - Jump on Below +void opcode_0x73() { if (flag_c==0) Jump_Taken8(); else Jump_Not_Taken8(); return; } // [0x73 0xdd] - JNB - Jump on Not Below +void opcode_0x74() { if (flag_z==1) Jump_Taken8(); else Jump_Not_Taken8(); return; } // [0x74 0xdd] - JZ - Jump on Zero +void opcode_0x75() { if (flag_z==0) Jump_Taken8(); else Jump_Not_Taken8(); return; } // [0x75 0xdd] - JNZ - Jump on Not Zero +void opcode_0x76() { if ((flag_z==1)||(flag_c==1)) Jump_Taken8(); else Jump_Not_Taken8(); return; } // [0x76 0xdd] - JNA - Jump on Not Above +void opcode_0x77() { if ((flag_z==0)&&(flag_c==0)) Jump_Taken8(); else Jump_Not_Taken8(); return; } // [0x77 0xdd] - JA - Jump on Above +void opcode_0x78() { if (flag_s==1) Jump_Taken8(); else Jump_Not_Taken8(); return; } // [0x78 0xdd] - JS - Jump on Sign +void opcode_0x79() { if (flag_s==0) Jump_Taken8(); else Jump_Not_Taken8(); return; } // [0x79 0xdd] - JNS - Jump on Not Sign +void opcode_0x7A() { if (flag_p==1) Jump_Taken8(); else Jump_Not_Taken8(); return; } // [0x7A 0xdd] - JP - Jump on Parity +void opcode_0x7B() { if (flag_p==0) Jump_Taken8(); else Jump_Not_Taken8(); return; } // [0x7B 0xdd] - JNP - Jump on Not Parity +void opcode_0x7C() { if (flag_s!=flag_o) Jump_Taken8(); else Jump_Not_Taken8(); return; } // [0x7C 0xdd] - JL - Jump on Less +void opcode_0x7D() { if (flag_s==flag_o) Jump_Taken8(); else Jump_Not_Taken8(); return; } // [0x7D 0xdd] - JNL - Jump on Not Less +void opcode_0x7E() { if ((flag_s!=flag_o)||(flag_z==1)) Jump_Taken8(); else Jump_Not_Taken8(); return; } // [0x7E 0xdd] - JLE - Jump on Less or Equal +void opcode_0x7F() { if ((flag_s==flag_o)&&(flag_z==0)) Jump_Taken8(); else Jump_Not_Taken8(); return; } // [0x7F 0xdd] - JNLE - Jump on Not Less or Equal + +void opcode_0xE3() { clock_counter=clock_counter+0; if (register_cx==0) Jump_Taken8(); else Jump_Not_Taken8(); return; } // [0xE3 0xdd] - JCXZ - Jump if CX Register Zero + +void opcode_0xEB() { Jump_Taken8(); return; } // [0xEB 0xdd] - JMP - Disp8 +void opcode_0xE9() { Jump_Taken16(); return; } // [0xE9 0xLO 0xHI] - JMP - Disp16 +void opcode_0xEA() { Jump_Taken32(); return; } // [0xEA 0xLO 0xHI 0xCSLO 0xCSHI] - JMP - Intersegment + + + + + + +// ------------------------------------------------------ +// Read from CPU registers +// ------------------------------------------------------ +uint16_t Fetch_Register(uint16_t local_regsel) { + switch (local_regsel) { + case 0x00: return (0x00FF®ister_ax); break; // AL + case 0x01: return (0x00FF®ister_cx); break; // CL + case 0x02: return (0x00FF®ister_dx); break; // DL + case 0x03: return (0x00FF®ister_bx); break; // BL + case 0x04: return (register_ax>>8); break; // AH + case 0x05: return (register_cx>>8); break; // CH + case 0x06: return (register_dx>>8); break; // DH + case 0x07: return (register_bx>>8); break; // BH + case 0x08: return register_ax; break; // AX + case 0x09: return register_cx; break; // CX + case 0x0A: return register_dx; break; // DX + case 0x0B: return register_bx; break; // BX + case 0x0C: return register_sp; break; // SP + case 0x0D: return register_bp; break; // BP + case 0x0E: return register_si; break; // SI + case 0x0F: return register_di; break; // DI + } + return 0xDEAD; +} + + +// ------------------------------------------------------ +// Read from CPU segment registers +// ------------------------------------------------------ +uint16_t Fetch_SEG_Reg( uint8_t local_regsel ) { + local_regsel = local_regsel & 0x3; + switch (local_regsel) { + case 0x00: return register_es; break; // ES + case 0x01: return register_cs; break; // CS + case 0x02: return register_ss; break; // SS + case 0x03: return register_ds; break; // DS + } + return 0xDEAD; +} + +// ------------------------------------------------------ +// Write to CPU segment registers +// ------------------------------------------------------ +void Write_SEG_Reg( uint8_t local_regsel , uint16_t local_data ) { + local_regsel = local_regsel & 0x3; + switch (local_regsel) { + case 0x00: register_es = local_data; break; // ES + case 0x01: register_cs = local_data; break; // CS + case 0x02: register_ss = local_data; break; // SS + case 0x03: register_ds = local_data; break; // DS + } + pause_interrupts=1; // Dont allow interupt until after next instruction + return; +} + +// ------------------------------------------------------ +// Write to CPU registers +// ------------------------------------------------------ +void Write_Register(uint16_t local_regsel , uint16_t local_data ) { + switch (local_regsel) { + case 0x00: register_ax = (0xFF00®ister_ax) | (local_data&0xFF); break; // AL + case 0x01: register_cx = (0xFF00®ister_cx) | (local_data&0xFF); break; // CL + case 0x02: register_dx = (0xFF00®ister_dx) | (local_data&0xFF); break; // DL + case 0x03: register_bx = (0xFF00®ister_bx) | (local_data&0xFF); break; // BL + case 0x04: register_ax = (0x00FF®ister_ax) | local_data<<8; break; // AH + case 0x05: register_cx = (0x00FF®ister_cx) | local_data<<8; break; // CH + case 0x06: register_dx = (0x00FF®ister_dx) | local_data<<8; break; // DH + case 0x07: register_bx = (0x00FF®ister_bx) | local_data<<8; break; // BH + case 0x08: register_ax = local_data; break; // AX + case 0x09: register_cx = local_data; break; // CX + case 0x0A: register_dx = local_data; break; // DX + case 0x0B: register_bx = local_data; break; // BX + case 0x0C: register_sp = local_data; break; // SP + case 0x0D: register_bp = local_data; break; // BP + case 0x0E: register_si = local_data; break; // SI + case 0x0F: register_di = local_data; break; // DI + } + return; +} + +// ------------------------------------------------------ +// Calculate the Effective Address +// ------------------------------------------------------ +void Calculate_EA() { + + word_operation = (0x01&opcode_first_byte); // Isolate the R/W bit from the opcode + opcode_second_byte = pfq_fetch_byte(); // Fetch the MOD/REG/RM byte from the prefetch queue + + + REG_field = (0x38&opcode_second_byte) >> 3; // Opcode REG field + MOD_field = opcode_second_byte >> 6; // Opcode MOD field + R_M_field = 0x07 & opcode_second_byte; // Opcode R/M field + + REG_field_table = word_operation<<3 | REG_field; // Concatinate W and MOD=11 register field bits + RM_field_table = word_operation<<3 | R_M_field; // Concatinate W and R/M register field bits + + ea_is_a_register=0; // Default + + + if (MOD_field==3) ea_is_a_register=1; + + else if (MOD_field==0) { + switch (R_M_field) { + case 0x00: ea_segment=SEGMENT_DS; ea_address = register_bx + register_si; clock_counter=clock_counter+7; break; + case 0x01: ea_segment=SEGMENT_DS; ea_address = register_bx + register_di; clock_counter=clock_counter+8; break; + case 0x02: ea_segment=SEGMENT_SS; ea_address = register_bp + register_si; clock_counter=clock_counter+8; break; + case 0x03: ea_segment=SEGMENT_SS; ea_address = register_bp + register_di; clock_counter=clock_counter+7; break; + case 0x04: ea_segment=SEGMENT_DS; ea_address = register_si; clock_counter=clock_counter+5; break; + case 0x05: ea_segment=SEGMENT_DS; ea_address = register_di; clock_counter=clock_counter+5; break; + case 0x06: ea_segment=SEGMENT_DS; ea_address = pfq_fetch_word(); clock_counter=clock_counter+6; break; + case 0x07: ea_segment=SEGMENT_DS; ea_address = register_bx; clock_counter=clock_counter+5; break; + } + } + else if (MOD_field==1) { + switch (R_M_field) { + case 0x00: ea_segment=SEGMENT_DS; ea_address = register_bx + register_si + Sign_Extended_Byte(pfq_fetch_byte()); clock_counter=clock_counter+11; break; + case 0x01: ea_segment=SEGMENT_DS; ea_address = register_bx + register_di + Sign_Extended_Byte(pfq_fetch_byte()); clock_counter=clock_counter+12; break; + case 0x02: ea_segment=SEGMENT_SS; ea_address = register_bp + register_si + Sign_Extended_Byte(pfq_fetch_byte()); clock_counter=clock_counter+12; break; + case 0x03: ea_segment=SEGMENT_SS; ea_address = register_bp + register_di + Sign_Extended_Byte(pfq_fetch_byte()); clock_counter=clock_counter+11; break; + case 0x04: ea_segment=SEGMENT_DS; ea_address = register_si + Sign_Extended_Byte(pfq_fetch_byte()); clock_counter=clock_counter+9; break; + case 0x05: ea_segment=SEGMENT_DS; ea_address = register_di + Sign_Extended_Byte(pfq_fetch_byte()); clock_counter=clock_counter+9; break; + case 0x06: ea_segment=SEGMENT_SS; ea_address = register_bp + Sign_Extended_Byte(pfq_fetch_byte()); clock_counter=clock_counter+9; break; + case 0x07: ea_segment=SEGMENT_DS; ea_address = register_bx + Sign_Extended_Byte(pfq_fetch_byte()); clock_counter=clock_counter+9; break; + } + } + else if (MOD_field==2) { + switch (R_M_field) { + case 0x00: ea_segment=SEGMENT_DS; ea_address = register_bx + register_si + pfq_fetch_word(); clock_counter=clock_counter+11; break; + case 0x01: ea_segment=SEGMENT_DS; ea_address = register_bx + register_di + pfq_fetch_word(); clock_counter=clock_counter+12; break; + case 0x02: ea_segment=SEGMENT_SS; ea_address = register_bp + register_si + pfq_fetch_word(); clock_counter=clock_counter+12; break; + case 0x03: ea_segment=SEGMENT_SS; ea_address = register_bp + register_di + pfq_fetch_word(); clock_counter=clock_counter+11; break; + case 0x04: ea_segment=SEGMENT_DS; ea_address = register_si + pfq_fetch_word(); clock_counter=clock_counter+9; break; + case 0x05: ea_segment=SEGMENT_DS; ea_address = register_di + pfq_fetch_word(); clock_counter=clock_counter+9; break; + case 0x06: ea_segment=SEGMENT_SS; ea_address = register_bp + pfq_fetch_word(); clock_counter=clock_counter+9; break; + case 0x07: ea_segment=SEGMENT_DS; ea_address = register_bx + pfq_fetch_word(); clock_counter=clock_counter+9; break; + } + } + return ; +} + +// ------------------------------------------------------ +// Fetch the data from the Effective Address +// ------------------------------------------------------ +uint16_t Fetch_EA() { + uint16_t local_data=0; + if (ea_is_a_register==1) { local_data = Fetch_Register(RM_field_table); } + else if (word_operation==0) { local_data = Biu_Operation(MEM_READ_BYTE , SEGMENT_OVERRIDABLE_TRUE , ea_segment , ea_address , 0x00 ); } + else if (word_operation==1) { local_data = Biu_Operation(MEM_READ_WORD , SEGMENT_OVERRIDABLE_TRUE , ea_segment , ea_address , 0x00 ); } + return local_data; +} + +// ------------------------------------------------------ +// Write data back to the Effective Address +// ------------------------------------------------------ +void Writeback_EA(uint16_t local_data) { + if (ea_is_a_register==1) { Write_Register(RM_field_table, local_data); } + else if (word_operation==0) { Biu_Operation(MEM_WRITE_BYTE , SEGMENT_OVERRIDABLE_TRUE , ea_segment , ea_address , local_data ); } + else if (word_operation==1) { Biu_Operation(MEM_WRITE_WORD , SEGMENT_OVERRIDABLE_TRUE , ea_segment , ea_address , local_data ); } + + return; +} + + + +// ------------------------------------------------------ +// Stack - POP +// ------------------------------------------------------ +uint16_t Pop() { + uint16_t local_data; + local_data = Biu_Operation(MEM_READ_WORD , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_SS , register_sp, 0x00 ); + register_sp = register_sp + 2; + return local_data; +} + +void opcode_0x07() { clock_counter=clock_counter+8; register_es=Pop(); pause_interrupts=1; return; } // 0x07 - POP ES - Set prefix so no interrupt on next instruction +void opcode_0x0F() { clock_counter=clock_counter+8; register_cs=Pop(); pause_interrupts=1; return; } // 0x0F - POP CS - Set prefix so no interrupt on next instruction +void opcode_0x17() { clock_counter=clock_counter+8; register_ss=Pop(); pause_interrupts=1; return; } // 0x17 - POP SS - Set prefix so no interrupt on next instruction +void opcode_0x1F() { clock_counter=clock_counter+8; register_ds=Pop(); pause_interrupts=1; return; } // 0x1F - POP DS - Set prefix so no interrupt on next instruction +void opcode_0x9D() { clock_counter=clock_counter+8; register_flags=0xF000|(0x0FD5&Pop()); pause_interrupts=1; return; } // 0x9D - POPF - POP Flags + +void opcode_0x58() { clock_counter=clock_counter+8; register_ax=Pop(); return; } // 0x58 - POP AX +void opcode_0x59() { clock_counter=clock_counter+8; register_cx=Pop(); return; } // 0x59 - POP CX +void opcode_0x5A() { clock_counter=clock_counter+8; register_dx=Pop(); return; } // 0x5A - POP DX +void opcode_0x5B() { clock_counter=clock_counter+8; register_bx=Pop(); return; } // 0x5B - POP BX +void opcode_0x5C() { clock_counter=clock_counter+8; register_sp=Pop(); return; } // 0x5C - POP SP +void opcode_0x5D() { clock_counter=clock_counter+8; register_bp=Pop(); return; } // 0x5D - POP BP +void opcode_0x5E() { clock_counter=clock_counter+8; register_si=Pop(); return; } // 0x5E - POP SI +void opcode_0x5F() { clock_counter=clock_counter+8; register_di=Pop(); return; } // 0x5F - POP DI + +void opcode_0x8F() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+8; else clock_counter=clock_counter+17; Writeback_EA( Pop()); return; } // 0x8F - POP REG16/MEM16 + + +// ------------------------------------------------------ +// [0xE8 0xLO 0xHI] - CALL Intra-segment +// ------------------------------------------------------ +void opcode_0xE8() { + clock_counter = clock_counter + 8; + Push(register_ip+2); + Jump_Taken16(); + return; +} + +// ------------------------------------------------------ +// 0x9A 0xLO 0xHI 0xCSLO 0xCSHI] - CALL Inter-segment +// ------------------------------------------------------ +void opcode_0x9A() { + clock_counter = clock_counter + 21; + Push(register_cs); + Push(register_ip+4); + Jump_Taken32(); + return; +} + +// ------------------------------------------------------ +// 0xC3 - Return - Intra-Segment +// ------------------------------------------------------ +void opcode_0xC3() { + clock_counter = clock_counter + 20; + register_ip = Pop(); + pfq_in_address = register_ip; + prefetch_queue_count=0; + return; +} + +// ------------------------------------------------------ +// 0xCB - Return - Inter-Segment +// ------------------------------------------------------ +void opcode_0xCB() { + clock_counter = clock_counter + 34; + register_ip = Pop(); + register_cs = Pop(); + pfq_in_address = register_ip; + prefetch_queue_count=0; + return; +} + +// ------------------------------------------------------ +// [0xC2 0xLO 0xHI] - Return - Intra-Segment and Add Immediate to Stack Pointer +// ------------------------------------------------------ +void opcode_0xC2() { + uint16_t temp_ip; + + clock_counter = clock_counter + 24; + temp_ip = Pop(); + register_sp = register_sp + pfq_fetch_word(); + register_ip = temp_ip; + pfq_in_address = register_ip; + prefetch_queue_count=0; + return; +} + +// ------------------------------------------------------ +// [0xCA 0xLO 0xHI]- Return - Inter-Segment and Add Immediate to Stack Pointer +// ------------------------------------------------------ +void opcode_0xCA() { + uint16_t new_ip; + uint16_t new_cs; + + clock_counter = clock_counter + 33; + new_ip = Pop(); + new_cs = Pop(); + register_sp = register_sp + pfq_fetch_word(); + register_ip = new_ip; + register_cs = new_cs; + pfq_in_address = register_ip; + prefetch_queue_count=0; + return; +} + +// ------------------------------------------------------ +// Interrupt Processing +// ------------------------------------------------------ +void Interrupt_Handler(uint8_t local_intr_type) { + uint16_t local_address; + uint16_t new_cs; + + clock_counter = clock_counter + 71; + Push(register_flags|0xF000); // Push the Flags and set bits [15:12] to F like 8088 does. + register_flags = register_flags & 0xFCFF; // Clear the IF and TF Flags + Push(register_cs); // Push the Code Segment + + local_address = (local_intr_type << 2); // Shift Interrupt type left 2 bits (*4) then + + new_cs = Biu_Operation(MEM_READ_WORD , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_00 , (local_address+2) , 0x00 ); // Fetch the CS (offset +2 from Interrupt vector base) + Push(register_ip); // Push the IP + + register_ip = Biu_Operation(MEM_READ_WORD , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_00 , local_address , 0x00 ); // Fetch the IP at the Interrupt vector base + register_cs = new_cs; + pfq_in_address = register_ip; + prefetch_queue_count=0; + + prefix_flags = 0; + return; +} + +// ------------------------------------------------------ +// 0xCF - IRET - Return from Interrupt +// ------------------------------------------------------ +void opcode_0xCF() { + clock_counter = clock_counter + 44; + register_ip = Pop(); + register_cs = Pop(); + register_flags = (0x0FD5 & Pop()); + prefix_flags = 0; + pfq_in_address = register_ip; + prefetch_queue_count=0; + pause_interrupts=1; + return; +} + + +// ------------------------------------------------------ +// Interrupt sources +// ------------------------------------------------------ +void DIV0_Handler() { clock_counter = clock_counter + 1; Interrupt_Handler(0x0); return; } // DIV0 Handler - Interrupt Type 0 - Division by Zero +void TRAP_Handler() { clock_counter = clock_counter + 1; Interrupt_Handler(0x1); return; } // TRAP Handler - Interrupt Type 1 - TRAP (Single Step) +void NMI_Handler() { clock_counter = clock_counter + 1; nmi_latched=0; Interrupt_Handler(0x2); return; } // NMI Handler - Interrupt Type 2 +void opcode_0xCC() { clock_counter = clock_counter + 1; Interrupt_Handler(0x3); return; } // 0xCC - INT - Interrupt Type 3 - Breakpoint +void opcode_0xCE() { if (flag_o==0) { clock_counter = clock_counter + 4; } else // 0xCE - INTO - Interrupt Type 4 - (Interrupt on Overflow) + { clock_counter = clock_counter + 2; Interrupt_Handler(0x4); } return; } +void opcode_0xCD() { Interrupt_Handler(pfq_fetch_byte()); return; } // [0xCD 0xnn] - Interrupt Type specified in second byte + + +void INTR_Handler() { + uint8_t local_intr_type; + local_intr_type = Biu_Operation(INTERRUPT_ACK , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_00 , 0x00000 , 0x00 ); // External Interrupt Processing - INTR type fetched from i8259 + Interrupt_Handler(local_intr_type); + return; +} + + + +// ------------------------------------------------------ +// 0xEC - IN - ac,DX - Variable Port - Byte +// ------------------------------------------------------ +void opcode_0xEC() { + uint8_t local_data; + clock_counter = clock_counter + 8; + local_data = Biu_Operation(IO_READ_BYTE , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_00 , register_dx , 0x00 ); // Fetch the IO byte data at address DX + register_ax = (register_ax&0xFF00) | local_data; + return; +} + +// ------------------------------------------------------ +// [ 0xE4 0xpp ] - IN - ac,Opcode Port - Byte +// ------------------------------------------------------ +void opcode_0xE4() { + uint8_t local_data; + clock_counter = clock_counter + 10; + local_data = Biu_Operation(IO_READ_BYTE , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_00 , (0xFF&pfq_fetch_byte()) , 0x00 ); // Fetch the IO byte data at address described in next opcode + register_ax = (register_ax&0xFF00) | local_data; + return; +} + +void opcode_0xED() { clock_counter = clock_counter + 12; register_ax = Biu_Operation(IO_READ_WORD , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_00 , register_dx , 0x00 ); return; } // 0xED - IN - ac,DX - Variable Port - Word +void opcode_0xE5() { clock_counter = clock_counter + 14; register_ax = Biu_Operation(IO_READ_WORD , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_00 , (0xFF&pfq_fetch_byte()) , 0x00 ); return; } // [ 0xE5 0xpp ] - IN - ac,Opcode Port - Word +void opcode_0xEE() { clock_counter = clock_counter + 8; Biu_Operation(IO_WRITE_BYTE , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_00 , register_dx , register_ax ); return; } // 0xEE - OUT - DX - Variable Port - Byte +void opcode_0xEF() { clock_counter = clock_counter + 12; Biu_Operation(IO_WRITE_WORD , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_00 , register_dx , register_ax ); return; } // 0xEF - OUT - DX - Variable Port - Word +void opcode_0xE6() { clock_counter = clock_counter + 10; Biu_Operation(IO_WRITE_BYTE , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_00 , (0xFF&pfq_fetch_byte()) , register_ax ); return; } // [ 0xE6 0xpp ] - OUT - Opcode Port - Byte +void opcode_0xE7() { clock_counter = clock_counter + 14; Biu_Operation(IO_WRITE_WORD , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_00 , (0xFF&pfq_fetch_byte()) , register_ax ); return; } // [ 0xE7 0xpp ] - OUT - Opcode Port - Word + + + +// ------------------------------------------------------ +// Set Flags S, Z, P for byte data: +// ------------------------------------------------------ +void Set_Flags_Byte_SZP(uint8_t local_data) { + register_flags = (register_flags & 0xFF3B); // Zero out Flags: S, Z, P + if (local_data&0x80) register_flags = (register_flags | 0x0080); // Set S Flag + if (local_data == 0x00) register_flags = (register_flags | 0x0040); // Set Z Flag + register_flags = (register_flags | Parity_Array[local_data]); // Set P Flag using array table lookup + return; +} + +// ------------------------------------------------------ +// Set Flags S, Z, P for word data: +// ------------------------------------------------------ +void Set_Flags_Word_SZP(uint16_t local_data) { + register_flags = (register_flags & 0xFF3B); // Zero out Flags: S, Z, P + if (local_data&0x8000) register_flags = (register_flags | 0x0080); // Set S Flag + if (local_data == 0x0000) register_flags = (register_flags | 0x0040); // Set Z Flag + register_flags = (register_flags | Parity_Array[(0xFF&local_data)]); // Set P Flag using array table lookup + return; +} + + +// ------------------------------------------------------ +// Addition for bytes +// ------------------------------------------------------ +uint8_t ADD_Bytes(uint8_t local_data1 , uint8_t local_data2) { + uint8_t local_nibble_results; + uint16_t local_byte_results; + uint16_t operand0=0; + uint16_t operand1=0; + uint16_t result=0; + + uint8_t local_cf=0; + local_cf=(flag_c); + + if ( inc_dec==1 ) register_flags = (register_flags & 0xF7EF); // Zero out Flags: O, A + else register_flags = (register_flags & 0xF7EE); // Zero out Flags: O, A ,C + + if (with_carry==1) { local_nibble_results = (0x0F&local_data1) + (0x0F&local_data2) + local_cf; // Perform the nibble math + local_byte_results = local_data1 + local_data2 + local_cf; // Perform the byte math + } + else { local_nibble_results = (0x0F&local_data1) + (0x0F&local_data2); // Perform the nibble math + local_byte_results = local_data1 + local_data2; // Perform the byte math + } + + if (local_nibble_results > 0x0F) register_flags = (register_flags | 0x0010); // Set A Flag + if ( inc_dec==0 && (local_byte_results > 0xFF)) register_flags = (register_flags | 0x0001); // Set C Flag if not INC or DEC opcodes + inc_dec = 0; // Debounce inc_dec + + operand0 = (local_data1 & 0x0080); + operand1 = (local_data2 & 0x0080); + result = (local_byte_results & 0x0080); + if (operand0==0 && operand1==0 && result!=0) register_flags = (register_flags | 0x0800); // Set O Flag + else if (operand0!=0 && operand1!=0 && result==0) register_flags = (register_flags | 0x0800); + + Set_Flags_Byte_SZP(local_byte_results); // Set S,Z,P Flags + with_carry=0; + + return local_byte_results; +} + +// ------------------------------------------------------ +// Addition for words +// ------------------------------------------------------ +uint16_t ADD_Words(uint16_t local_data1 , uint16_t local_data2) { + uint8_t local_nibble_results; + uint32_t local_word_results; + uint16_t operand0=0; + uint16_t operand1=0; + uint16_t result=0; + uint8_t local_cf=0; + local_cf=(flag_c); + + if ( inc_dec==1 ) register_flags = (register_flags & 0xF7EF); // Zero out Flags: O, A + else register_flags = (register_flags & 0xF7EE); // Zero out Flags: O, A ,C + + if (with_carry==1) { local_nibble_results = (0x0F&local_data1) + (0x0F&local_data2) + local_cf; // Perform the nibble math + local_word_results = local_data1 + local_data2 + local_cf; // Perform the word math + } + else { local_nibble_results = (0x0F&local_data1) + (0x0F&local_data2); // Perform the nibble math + local_word_results = local_data1 + local_data2; // Perform the word math + } + + + if (local_nibble_results > 0x0F) register_flags = (register_flags | 0x0010); // Set A Flag + if ( inc_dec==0 && (local_word_results > 0xFFFF)) register_flags = (register_flags | 0x0001); // Set C Flag if not INC or DEC opcodes + inc_dec = 0; // Debounce inc_dec + + + operand0 = (local_data1 & 0x8000); + operand1 = (local_data2 & 0x8000); + result = (local_word_results & 0x8000); + if (operand0==0 && operand1==0 && result!=0) register_flags = (register_flags | 0x0800); // Set O Flag + else if (operand0!=0 && operand1!=0 && result==0) register_flags = (register_flags | 0x0800); + + Set_Flags_Word_SZP(local_word_results); // Set S,Z,P Flags + with_carry=0; + + return local_word_results; +} + +// ------------------------------------------------------ +// Subtraction for bytes +// ------------------------------------------------------ +uint8_t SUB_Bytes(uint8_t local_data1 , uint8_t local_data2) { + uint8_t local_nibble_results; + uint16_t local_byte_results; + uint16_t operand0=0; + uint16_t operand1=0; + uint16_t result=0; + uint8_t local_cf=0; + local_cf=(flag_c); + + if ( inc_dec==1 ) register_flags = (register_flags & 0xF7EF); // Zero out Flags: O, A + else register_flags = (register_flags & 0xF7EE); // Zero out Flags: O, A ,C + + if (with_carry==1) { local_nibble_results = (0x0F&local_data1) - (0x0F&local_data2) - local_cf; // Perform the nibble math + local_byte_results = local_data1 - local_data2 - local_cf; // Perform the byte math + } + else { local_nibble_results = (0x0F&local_data1) - (0x0F&local_data2); // Perform the nibble math + local_byte_results = local_data1 - local_data2; // Perform the byte math + } + + if (local_nibble_results > 0x0F) register_flags = (register_flags | 0x0010); // Set A Flag + if ( inc_dec==0 && (local_byte_results > 0xFF)) register_flags = (register_flags | 0x0001); // Set C Flag if not INC or DEC opcodes + inc_dec = 0; // Debounce inc_dec + + + operand0 = (local_data1 & 0x0080); + operand1 = (local_data2 & 0x0080); + result = (local_byte_results & 0x0080); + if (operand0==0 && operand1!=0 && result!=0) register_flags = (register_flags | 0x0800); // Set O Flag + else if (operand0!=0 && operand1==0 && result==0) register_flags = (register_flags | 0x0800); + + Set_Flags_Byte_SZP(local_byte_results); // Set S,Z,P Flags + with_carry=0; + + return local_byte_results; +} + +// ------------------------------------------------------ +// Subtraction for words +// ------------------------------------------------------ +uint16_t SUB_Words(uint16_t local_data1 , uint16_t local_data2) { + uint8_t local_nibble_results; + uint32_t local_word_results; + uint16_t operand0=0; + uint16_t operand1=0; + uint16_t result=0; + uint8_t local_cf=0; + local_cf=(flag_c); + + if ( inc_dec==1 ) register_flags = (register_flags & 0xF7EF); // Zero out Flags: O, A + else register_flags = (register_flags & 0xF7EE); // Zero out Flags: O, A ,C + + if (with_carry==1) { local_nibble_results = (0x0F&local_data1) - (0x0F&local_data2) - local_cf; // Perform the nibble math + local_word_results = local_data1 - local_data2 - local_cf; // Perform the word math + } + else { local_nibble_results = (0x0F&local_data1) - (0x0F&local_data2); // Perform the nibble math + local_word_results = local_data1 - local_data2; // Perform the word math + } + + if (local_nibble_results > 0x0F) register_flags = (register_flags | 0x0010); // Set A Flag + if ( inc_dec==0 && (local_word_results > 0xFFFF)) register_flags = (register_flags | 0x0001); // Set C Flag if not INC or DEC opcodes + inc_dec = 0; // Debounce inc_dec + + + operand0 = (local_data1 & 0x8000); + operand1 = (local_data2 & 0x8000); + result = (local_word_results & 0x8000); + if (operand0==0 && operand1!=0 && result!=0) register_flags = (register_flags | 0x0800); // Set O Flag + else if (operand0!=0 && operand1==0 && result==0) register_flags = (register_flags | 0x0800); + + Set_Flags_Word_SZP(local_word_results); // Set S,Z,P Flags + with_carry=0; + + return local_word_results; +} + + +// ------------------------------------------------------ +// INC Registers +// ------------------------------------------------------ +void opcode_0x40() { clock_counter=clock_counter+2; inc_dec=1; register_ax = ADD_Words(register_ax,0x1); return; } // # 0x40 - INC AX +void opcode_0x41() { clock_counter=clock_counter+2; inc_dec=1; register_cx = ADD_Words(register_cx,0x1); return; } // # 0x41 - INC CX +void opcode_0x42() { clock_counter=clock_counter+2; inc_dec=1; register_dx = ADD_Words(register_dx,0x1); return; } // # 0x42 - INC DX +void opcode_0x43() { clock_counter=clock_counter+2; inc_dec=1; register_bx = ADD_Words(register_bx,0x1); return; } // # 0x43 - INC BX +void opcode_0x44() { clock_counter=clock_counter+2; inc_dec=1; register_sp = ADD_Words(register_sp,0x1); return; } // # 0x44 - INC SP +void opcode_0x45() { clock_counter=clock_counter+2; inc_dec=1; register_bp = ADD_Words(register_bp,0x1); return; } // # 0x45 - INC BP +void opcode_0x46() { clock_counter=clock_counter+2; inc_dec=1; register_si = ADD_Words(register_si,0x1); return; } // # 0x46 - INC SI +void opcode_0x47() { clock_counter=clock_counter+2; inc_dec=1; register_di = ADD_Words(register_di,0x1); return; } // # 0x47 - INC DI + +// ------------------------------------------------------ +// DEC Registers +// ------------------------------------------------------ +void opcode_0x48() { clock_counter=clock_counter+2; inc_dec=1; register_ax = SUB_Words(register_ax,0x1); return; } // # 0x48 - DEC AX +void opcode_0x49() { clock_counter=clock_counter+2; inc_dec=1; register_cx = SUB_Words(register_cx,0x1); return; } // # 0x49 - DEC CX +void opcode_0x4A() { clock_counter=clock_counter+2; inc_dec=1; register_dx = SUB_Words(register_dx,0x1); return; } // # 0x4A - DEC DX +void opcode_0x4B() { clock_counter=clock_counter+2; inc_dec=1; register_bx = SUB_Words(register_bx,0x1); return; } // # 0x4B - DEC BX +void opcode_0x4C() { clock_counter=clock_counter+2; inc_dec=1; register_sp = SUB_Words(register_sp,0x1); return; } // # 0x4C - DEC SP +void opcode_0x4D() { clock_counter=clock_counter+2; inc_dec=1; register_bp = SUB_Words(register_bp,0x1); return; } // # 0x4D - DEC BP +void opcode_0x4E() { clock_counter=clock_counter+2; inc_dec=1; register_si = SUB_Words(register_si,0x1); return; } // # 0x4E - DEC SI +void opcode_0x4F() { clock_counter=clock_counter+2; inc_dec=1; register_di = SUB_Words(register_di,0x1); return; } // # 0x4F - DEC DI + + +// ------------------------------------------------------ +// 0xFE Opcodes +// ------------------------------------------------------ +void opcode_0xFE() { + Calculate_EA(); + switch (REG_field) { + case 0x0: word_operation=0; inc_dec=1; if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+15; Writeback_EA(ADD_Bytes(Fetch_EA(),0x1)); break; // # 0xFE REG[0] - INC REG8/MEM8 + case 0x1: word_operation=0; inc_dec=1; if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+15; Writeback_EA(SUB_Bytes(Fetch_EA(),0x1)); break; // # 0xFE REG[1] - DEC REG8/MEM8 + case 0x2: clock_counter=clock_counter+21; word_operation=1; Push(register_ip); register_ip = Fetch_EA(); pfq_in_address = register_ip;prefetch_queue_count = 0; break; // # 0xFF REG[2] - CALL REG16/MEM16 Intra-segment ** Repeated ** + case 0x3: clock_counter=clock_counter+37; word_operation=1; Push(register_cs);Push(register_ip); register_ip=Fetch_EA(); prefetch_queue_count=0; ea_address=ea_address+2; register_cs=Fetch_EA(); break; // # 0xFF REG[3] - CALL MEM16 Inter-segment ** Repeated ** + case 0x4: clock_counter=clock_counter+18; word_operation=1; register_ip = Fetch_EA(); pfq_in_address = register_ip;prefetch_queue_count = 0; break; // # 0xFF REG[4] - JMP REG16/MEM16 Intra-segment ** Repeated ** + case 0x5: clock_counter=clock_counter+24; word_operation=1; register_ip=Fetch_EA(); prefetch_queue_count=0; ea_address=ea_address+2; register_cs=Fetch_EA(); break; // # 0xFF REG[5] - JMP MEM16 Inter-segment ** Repeated ** + case 0x6: clock_counter=clock_counter+16; word_operation=1; Push(Fetch_EA()); break; // # 0xFF REG[6] - PUSH MEM16 ** Repeated ** + case 0x7: clock_counter=clock_counter+16; word_operation=1; Push(Fetch_EA()); break; // # 0xFF REG[7] - PUSH MEM16 ** Repeated ** + } + return; +} + +// ------------------------------------------------------ +// 0xFF Opcodes +// ------------------------------------------------------ +void opcode_0xFF() { + Calculate_EA(); + switch (REG_field) { + case 0x0: if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+23; inc_dec=1; Writeback_EA(ADD_Words(Fetch_EA(),0x1)); break; // # 0xFF REG[0] - INC MEM16 + case 0x1: if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+23; inc_dec=1; Writeback_EA(SUB_Words(Fetch_EA(),0x1)); break; // # 0xFF REG[1] - DEC MEM16 + case 0x2: clock_counter=clock_counter+29; Push(register_ip); register_ip = Fetch_EA(); pfq_in_address = register_ip; prefetch_queue_count = 0; break; // # 0xFF REG[2] - CALL REG16/MEM16 Intra-segment + case 0x3: clock_counter=clock_counter+53; Push(register_cs);Push(register_ip); register_ip=Fetch_EA(); ea_address=ea_address+2; register_cs=Fetch_EA(); pfq_in_address = register_ip;prefetch_queue_count=0; break; // # 0xFF REG[3] - CALL MEM16 Inter-segment + case 0x4: if (ea_is_a_register==1) clock_counter=clock_counter+11; else clock_counter=clock_counter+22; register_ip=Fetch_EA(); pfq_in_address=register_ip;prefetch_queue_count=0; break; // # 0xFF REG[4] - JMP REG16/MEM16 Intra-segment + case 0x5: if (ea_is_a_register==1) clock_counter=clock_counter+11; else clock_counter=clock_counter+24; register_ip=Fetch_EA(); ea_address=ea_address+2; register_cs=Fetch_EA(); pfq_in_address=register_ip;prefetch_queue_count=0; break; // # 0xFF REG[5] - JMP MEM16 Inter-segment + case 0x6: clock_counter=clock_counter+24; Push(Fetch_EA()); break; // # 0xFF REG[6] - PUSH MEM16 + case 0x7: clock_counter=clock_counter+24; Push(Fetch_EA()); break; // # 0xFF REG[7] - PUSH MEM16 ** Repeated ** + } + return; +} + + +// ------------------------------------------------------ +// Moves from Immediate to Register +// ------------------------------------------------------ +void opcode_0xB0() { clock_counter=clock_counter+4; register_ax=(0xFF00®ister_ax) | pfq_fetch_byte(); return; } // [0xB0 0xdd] - MOV AL,IMM8 +void opcode_0xB1() { clock_counter=clock_counter+4; register_cx=(0xFF00®ister_cx) | pfq_fetch_byte(); return; } // [0xB1 0xdd] - MOV CL,IMM8 +void opcode_0xB2() { clock_counter=clock_counter+4; register_dx=(0xFF00®ister_dx) | pfq_fetch_byte(); return; } // [0xB2 0xdd] - MOV DL,IMM8 +void opcode_0xB3() { clock_counter=clock_counter+4; register_bx=(0xFF00®ister_bx) | pfq_fetch_byte(); return; } // [0xB3 0xdd] - MOV BL,IMM8 +void opcode_0xB4() { clock_counter=clock_counter+4; register_ax=(pfq_fetch_byte()<<8) | (0x00FF®ister_ax); return; } // [0xB4 0xdd] - MOV AH,IMM8 +void opcode_0xB5() { clock_counter=clock_counter+4; register_cx=(pfq_fetch_byte()<<8) | (0x00FF®ister_cx); return; } // [0xB5 0xdd] - MOV CH,IMM8 +void opcode_0xB6() { clock_counter=clock_counter+4; register_dx=(pfq_fetch_byte()<<8) | (0x00FF®ister_dx); return; } // [0xB6 0xdd] - MOV DH,IMM8 +void opcode_0xB7() { clock_counter=clock_counter+4; register_bx=(pfq_fetch_byte()<<8) | (0x00FF®ister_bx); return; } // [0xB7 0xdd] - MOV BH,IMM8 +void opcode_0xB8() { clock_counter=clock_counter+4; register_ax=pfq_fetch_word(); return; } // [0xB8 0xLO xHI] - MOV AX,IMM16 +void opcode_0xB9() { clock_counter=clock_counter+4; register_cx=pfq_fetch_word(); return; } // [0xB9 0xLO xHI] - MOV CX,IMM16 +void opcode_0xBA() { clock_counter=clock_counter+4; register_dx=pfq_fetch_word(); return; } // [0xBA 0xLO xHI] - MOV DX,IMM16 +void opcode_0xBB() { clock_counter=clock_counter+4; register_bx=pfq_fetch_word(); return; } // [0xBB 0xLO xHI] - MOV BX,IMM16 +void opcode_0xBC() { clock_counter=clock_counter+4; register_sp=pfq_fetch_word(); return; } // [0xBC 0xLO xHI] - MOV SP,IMM16 +void opcode_0xBD() { clock_counter=clock_counter+4; register_bp=pfq_fetch_word(); return; } // [0xBD 0xLO xHI] - MOV BP,IMM16 +void opcode_0xBE() { clock_counter=clock_counter+4; register_si=pfq_fetch_word(); return; } // [0xBE 0xLO xHI] - MOV SI,IMM16 +void opcode_0xBF() { clock_counter=clock_counter+4; register_di=pfq_fetch_word(); return; } // [0xBF 0xLO xHI] - MOV DI,IMM16 + + +// ------------------------------------------------------ +// Boolean - OR +// ------------------------------------------------------ +uint16_t Boolean_OR(uint16_t local_data_A , uint16_t local_data_B ) { + uint16_t local_results; + local_results = local_data_A | local_data_B; + if (word_operation==1) Set_Flags_Word_SZP(local_results); else Set_Flags_Byte_SZP(local_results); + register_flags = (register_flags & 0xF7EE); // Zero out Flags: C, O, A R3 + return local_results; +} +void opcode_0x08() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+16; Writeback_EA(Boolean_OR(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // 0x08 OR - REG8/MEM8,REG8 +void opcode_0x09() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+24; Writeback_EA(Boolean_OR(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // 0x09 OR - REG16/MEM16,REG16 +void opcode_0x0A() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+9; Write_Register(REG_field_table , Boolean_OR(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // 0x0A OR - REG8,REG8/MEM8 +void opcode_0x0B() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+13; Write_Register(REG_field_table , Boolean_OR(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // 0x0B OR - REG16,REG16/MEM16 +void opcode_0x0C() { clock_counter=clock_counter+4; word_operation=0; Write_Register(REG_AL , Boolean_OR(register_ax,pfq_fetch_byte() )); return; } // 0x0C OR - AL,IMM8 +void opcode_0x0D() { clock_counter=clock_counter+4; word_operation=1; register_ax = Boolean_OR(register_ax,pfq_fetch_word() ); return; } // 0x0D OR - AX,IMM16 + + +// ------------------------------------------------------ +// Boolean - AND +// ------------------------------------------------------ +uint16_t Boolean_AND(uint16_t local_data_A , uint16_t local_data_B ) { + uint16_t local_results; + local_results = local_data_A & local_data_B; + + if (word_operation==1) Set_Flags_Word_SZP(local_results); else Set_Flags_Byte_SZP(local_results); + register_flags = (register_flags & 0xF7EE); // Zero out Flags: C, O, A R3 + return local_results; +} +void opcode_0x20() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+16; Writeback_EA(Boolean_AND(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // 0x20 AND - REG8/MEM8,REG8 +void opcode_0x21() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+24; Writeback_EA(Boolean_AND(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // 0x21 AND - REG16/MEM16,REG16 +void opcode_0x22() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+9; Write_Register(REG_field_table , Boolean_AND(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // 0x22 AND - REG8,REG8/MEM8 +void opcode_0x23() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+13; Write_Register(REG_field_table , Boolean_AND(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // 0x23 AND - REG16,REG16/MEM16 +void opcode_0x24() { clock_counter=clock_counter+4; word_operation=0; Write_Register(REG_AL , Boolean_AND(register_ax,pfq_fetch_byte() )); return; } // 0x24 AND - AL,IMM8 +void opcode_0x25() { clock_counter=clock_counter+4; word_operation=1; register_ax = Boolean_AND(register_ax,pfq_fetch_word() ); return; } // 0x25 AND - AX,IMM16 + + +// ------------------------------------------------------ +// Boolean - XOR +// ------------------------------------------------------ +uint16_t Boolean_XOR(uint16_t local_data_A , uint16_t local_data_B ) { + uint16_t local_results; + local_results = local_data_A ^ local_data_B; + if (word_operation==1) Set_Flags_Word_SZP(local_results); else Set_Flags_Byte_SZP(local_results); + register_flags = (register_flags & 0xF7EE); // Zero out Flags: C, O, A R3 + return local_results; +} +void opcode_0x30() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+16; Writeback_EA(Boolean_XOR(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // 0x30 XOR - REG8/MEM8,REG8 +void opcode_0x31() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+24; Writeback_EA(Boolean_XOR(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // 0x31 XOR - REG16/MEM16,REG16 +void opcode_0x32() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+9; Write_Register(REG_field_table , Boolean_XOR(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // 0x32 XOR - REG8,REG8/MEM8 +void opcode_0x33() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+13; Write_Register(REG_field_table , Boolean_XOR(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // 0x33 XOR - REG16,REG16/MEM16 +void opcode_0x34() { clock_counter=clock_counter+4; word_operation=0; Write_Register(REG_AL , Boolean_XOR(register_ax,pfq_fetch_byte() )); return; } // 0x34 XOR - AL,IMM8 +void opcode_0x35() { clock_counter=clock_counter+4; word_operation=1; register_ax = Boolean_XOR(register_ax,pfq_fetch_word() ); return; } // 0x35 XOR - AX,IMM16 + + +// ------------------------------------------------------ +// 0x80 Opcodes ** Duplicated on 0x82 ** +// ------------------------------------------------------ +void opcode_0x80() { + Calculate_EA(); + switch (REG_field) { + case 0x0: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+17; Writeback_EA( ADD_Bytes(Fetch_EA(),pfq_fetch_byte() )); break; // # 0x80 REG[0] - ADD REG8/MEM8 , IMMED8 + case 0x1: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+17; Writeback_EA( Boolean_OR(Fetch_EA(),pfq_fetch_byte() )); break; // # 0x80 REG[1] - OR REG8/MEM8 , IMMED8 + case 0x2: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+17; with_carry=1; Writeback_EA( ADD_Bytes(Fetch_EA(),pfq_fetch_byte() )); break; // # 0x80 REG[2] - ADC REG8/MEM8 , IMMED8 + case 0x3: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+17; with_carry=1; Writeback_EA( SUB_Bytes(Fetch_EA(),pfq_fetch_byte() )); break; // # 0x80 REG[3] - SBB REG8/MEM8 , IMMED8 + case 0x4: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+17; Writeback_EA( Boolean_AND(Fetch_EA(),pfq_fetch_byte() )); break; // # 0x80 REG[4] - AND REG8/MEM8 , IMMED8 + case 0x5: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+17; Writeback_EA( SUB_Bytes(Fetch_EA(),pfq_fetch_byte() )); break; // # 0x80 REG[5] - SUB REG8/MEM8 , IMMED8 + case 0x6: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+17; Writeback_EA( Boolean_XOR(Fetch_EA(),pfq_fetch_byte() )); break; // # 0x80 REG[6] - XOR REG8/MEM8 , IMMED8 + case 0x7: if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+10; SUB_Bytes(Fetch_EA(),pfq_fetch_byte() ); break; // # 0x80 REG[7] - CMP REG8/MEM8 , IMMED8 + } + return; +} + +// ------------------------------------------------------ +// 0x81 Opcodes +// ------------------------------------------------------ +void opcode_0x81() { + Calculate_EA(); + switch (REG_field) { + case 0x0: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+23; Writeback_EA( ADD_Words(Fetch_EA(),pfq_fetch_word() )); break; // # 0x81 REG[0] - ADD REG16/MEM16 , IMMED16 + case 0x1: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+23; Writeback_EA( Boolean_OR(Fetch_EA(),pfq_fetch_word() )); break; // # 0x81 REG[1] - OR REG16/MEM16 , IMMED16 + case 0x2: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+23; with_carry=1; Writeback_EA( ADD_Words(Fetch_EA(),pfq_fetch_word() )); break; // # 0x81 REG[2] - ADC REG16/MEM16 , IMMED16 + case 0x3: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+23; with_carry=1; Writeback_EA( SUB_Words(Fetch_EA(),pfq_fetch_word() )); break; // # 0x81 REG[3] - SBB REG16/MEM16 , IMMED16 + case 0x4: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+23; Writeback_EA( Boolean_AND(Fetch_EA(),pfq_fetch_word() )); break; // # 0x81 REG[4] - AND REG16/MEM16 , IMMED16 + case 0x5: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+23; Writeback_EA( SUB_Words(Fetch_EA(),pfq_fetch_word() )); break; // # 0x81 REG[5] - SUB REG16/MEM16 , IMMED16 + case 0x6: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+23; Writeback_EA( Boolean_XOR(Fetch_EA(),pfq_fetch_word() )); break; // # 0x81 REG[6] - XOR REG16/MEM16 , IMMED16 + case 0x7: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+14; SUB_Words(Fetch_EA(),pfq_fetch_word() ); break; // # 0x81 REG[7] - CMP REG16/MEM16 , IMMED16 + } + return; +} + +// ------------------------------------------------------ +// 0x83 Opcodes +// ------------------------------------------------------ +void opcode_0x83() { + Calculate_EA(); + switch (REG_field) { + case 0x0: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+23; Writeback_EA( ADD_Words(Fetch_EA(),Sign_Extended_Byte(pfq_fetch_byte()) )); break; // # 0x83 REG[0] - ADD REG16/MEM16 , IMMED8-Sign_Extended + case 0x1: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+23; Writeback_EA( Boolean_OR(Fetch_EA(),Sign_Extended_Byte(pfq_fetch_byte()) )); break; // # 0x83 REG[1] - OR REG16/MEM16 , IMMED8-Sign_Extended + case 0x2: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+23; with_carry=1; Writeback_EA( ADD_Words(Fetch_EA(),Sign_Extended_Byte(pfq_fetch_byte()) )); break; // # 0x83 REG[2] - ADC REG16/MEM16 , IMMED8-Sign_Extended + case 0x3: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+23; with_carry=1; Writeback_EA( SUB_Words(Fetch_EA(),Sign_Extended_Byte(pfq_fetch_byte()) )); break; // # 0x83 REG[3] - SBB REG16/MEM16 , IMMED8-Sign_Extended + case 0x4: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+23; Writeback_EA( Boolean_AND(Fetch_EA(),Sign_Extended_Byte(pfq_fetch_byte()) )); break; // # 0x83 REG[4] - AND REG16/MEM16 , IMMED8-Sign_Extended + case 0x5: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+23; Writeback_EA( SUB_Words(Fetch_EA(),Sign_Extended_Byte(pfq_fetch_byte()) )); break; // # 0x83 REG[5] - SUB REG16/MEM16 , IMMED8-Sign_Extended + case 0x6: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+23; Writeback_EA( Boolean_XOR(Fetch_EA(),Sign_Extended_Byte(pfq_fetch_byte()) )); break; // # 0x83 REG[6] - XOR REG16/MEM16 , IMMED8-Sign_Extended + case 0x7: if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+14; SUB_Words(Fetch_EA(),Sign_Extended_Byte(pfq_fetch_byte()) ); break; // # 0x83 REG[7] - CMP REG16/MEM16 , IMMED8-Sign_Extended + } + return; +} + + +// ------------------------------------------------------ +// Math Opcodes +// ------------------------------------------------------ +void opcode_0x00() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+16; Writeback_EA(ADD_Bytes(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // # 0x00 - ADD REG8/MEM8,REG8 +void opcode_0x01() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+24; Writeback_EA(ADD_Words(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // # 0x01 - ADD REG16/MEM16,REG16 +void opcode_0x02() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+9; Write_Register(REG_field_table , ADD_Bytes(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // # 0x02 - ADD REG8,REG8/MEM8 +void opcode_0x03() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+13; Write_Register(REG_field_table , ADD_Words(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // # 0x03 - ADD REG16,REG16/MEM16 +void opcode_0x04() {clock_counter=clock_counter+4; Write_Register(REG_AL , ADD_Bytes(register_ax,pfq_fetch_byte())); return; } // # 0x04 - ADD AL , IMMED8 +void opcode_0x05() {clock_counter=clock_counter+4; register_ax = ADD_Words(register_ax,pfq_fetch_word()); return; } // # 0x05 - ADD AX , IMMED16 + + +void opcode_0x10() {Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+16; with_carry=1; Writeback_EA(ADD_Bytes(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // # 0x10 - ADC REG8/MEM8,REG8 +void opcode_0x11() {Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+24; with_carry=1; Writeback_EA(ADD_Words(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // # 0x11 - ADC REG16/MEM16,REG16 +void opcode_0x12() {Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+9; with_carry=1; Write_Register(REG_field_table , ADD_Bytes(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // # 0x12 - ADC REG8,REG8/MEM8 +void opcode_0x13() {Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+13; with_carry=1; Write_Register(REG_field_table , ADD_Words(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // # 0x13 - ADC REG16,REG16/MEM16 +void opcode_0x14() {clock_counter=clock_counter+4; with_carry=1; Write_Register(REG_AL , ADD_Bytes(register_ax,pfq_fetch_byte())); return; } // # 0x14 - ADC AL , IMMED8 +void opcode_0x15() {clock_counter=clock_counter+4; with_carry=1; register_ax = ADD_Words(register_ax,pfq_fetch_word()); return; } // # 0x15 - ADC AX , IMMED16 + + +void opcode_0x18() {Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+16; with_carry=1; Writeback_EA(SUB_Bytes(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // # 0x18 - SBB REG8/MEM8,REG8 +void opcode_0x19() {Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+24; with_carry=1; Writeback_EA(SUB_Words(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // # 0x19 - SBB REG16/MEM16,REG16 +void opcode_0x1A() {Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+9; with_carry=1; Write_Register(REG_field_table , SUB_Bytes(Fetch_Register(REG_field_table),Fetch_EA())); return; } // # 0x1A - SBB REG8,REG8/MEM8 +void opcode_0x1B() {Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+13; with_carry=1; Write_Register(REG_field_table , SUB_Words(Fetch_Register(REG_field_table),Fetch_EA())); return; } // # 0x1B - SBB REG16,REG16/MEM16 +void opcode_0x1C() {clock_counter=clock_counter+4; with_carry=1; Write_Register(REG_AL , SUB_Bytes(register_ax,pfq_fetch_byte())); return; } // # 0x1C - SBB AL , IMMED8 +void opcode_0x1D() {clock_counter=clock_counter+4; with_carry=1; register_ax = SUB_Words(register_ax,pfq_fetch_word()); return; } // # 0x1D - SBB AX , IMMED16 + +void opcode_0x28() {Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+16; Writeback_EA(SUB_Bytes(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // # 0x28 - SUB REG8/MEM8,REG8 +void opcode_0x29() {Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+24; Writeback_EA(SUB_Words(Fetch_EA(),Fetch_Register(REG_field_table))); return; } // # 0x29 - SUB REG16/MEM16,REG16 +void opcode_0x2A() {Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+9; Write_Register(REG_field_table , SUB_Bytes(Fetch_Register(REG_field_table),Fetch_EA())); return; } // # 0x2A - SUB REG8,REG8/MEM8 +void opcode_0x2B() {Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+13; Write_Register(REG_field_table , SUB_Words(Fetch_Register(REG_field_table),Fetch_EA())); return; } // # 0x2B - SUB REG16,REG16/MEM16 +void opcode_0x2C() {clock_counter=clock_counter+4; Write_Register(REG_AL , SUB_Bytes(register_ax,pfq_fetch_byte())); return; } // # 0x2C - SUB AL , IMMED8 +void opcode_0x2D() {clock_counter=clock_counter+4; register_ax = SUB_Words(register_ax,pfq_fetch_word()); return; } // # 0x2D - SUB AX , IMMED16 + + +void opcode_0x38() {Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+9; SUB_Bytes(Fetch_EA(),Fetch_Register(REG_field_table)); return; } // # 0x38 - CMP REG8/MEM8,REG8 +void opcode_0x39() {Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+13; SUB_Words(Fetch_EA(),Fetch_Register(REG_field_table)); return; } // # 0x39 - CMP REG16/MEM16,REG16 +void opcode_0x3A() {Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+9; SUB_Bytes(Fetch_Register(REG_field_table) , Fetch_EA()); return; } // # 0x3A - CMP REG8,REG8/MEM8 +void opcode_0x3B() {Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+13; SUB_Words(Fetch_Register(REG_field_table) , Fetch_EA()); return; } // # 0x3B - CMP REG16,REG16/MEM16 +void opcode_0x3C() {clock_counter=clock_counter+4; SUB_Bytes(register_ax,pfq_fetch_byte()); return; } // # 0x3C - CMP AL , IMMED8 +void opcode_0x3D() {clock_counter=clock_counter+4; SUB_Words(register_ax,pfq_fetch_word()); return; } // # 0x3D - CMP AX , IMMED16 + + + +// ------------------------------------------------------ +// Shifts +// ------------------------------------------------------ +uint8_t ROL8(uint8_t local_data , uint8_t local_count) { + uint8_t old_msb=0; + uint8_t new_msb=0; + + while (local_count != 0) { + register_flags=(register_flags&0xF7FE); // Zero C ,O Flags + old_msb = (local_data&0x80) >> 7; + local_data = (local_data << 1) | old_msb; + local_count--; + clock_counter=clock_counter+4; // Add four clocks per bit + } + new_msb = (local_data&0x80) >> 7; + register_flags=(register_flags | old_msb); // Set C flag + if (new_msb != flag_c) register_flags=(register_flags|0x0800); // Set O flag + return local_data; +} + +// ------------------------------------------------------ + +uint16_t ROL16(uint16_t local_data , uint8_t local_count) { + uint8_t old_msb=0; + uint8_t new_msb=0; + + while (local_count != 0) { + register_flags=(register_flags&0xF7FE); // Zero C ,O Flags + old_msb = (local_data&0x8000) >> 15; + local_data = (local_data << 1) | old_msb; + local_count--; + clock_counter=clock_counter+4; // Add four clocks per bit + } + new_msb = (local_data&0x8000) >> 15; + register_flags=(register_flags | old_msb); // Set C flag + if (new_msb != flag_c) register_flags=(register_flags|0x0800); // Set O flag + return local_data; +} + +// ------------------------------------------------------ +uint8_t ROR8(uint8_t local_data , uint8_t local_count) { + uint8_t old_lsb, new_msb; + + while (local_count != 0) { + register_flags=(register_flags&0xF7FE); // Zero C ,O Flags + old_lsb = local_data << 7; + local_data = old_lsb | (local_data >> 1); + local_count--; + clock_counter=clock_counter+4; // Add four clocks per bit + } + new_msb = (local_data&0x80) >> 7; + register_flags=(register_flags | new_msb); // Set C flag + if ( (local_data&0x80) != ((local_data&0x40)<<1)) register_flags=(register_flags|0x0800); // Set O flag + return local_data; +} + +// ------------------------------------------------------ +uint16_t ROR16(uint16_t local_data , uint8_t local_count) { + uint16_t old_lsb, new_msb; + + while (local_count != 0) { + register_flags=(register_flags&0xF7FE); // Zero C ,O Flags + old_lsb = local_data << 15; + local_data = old_lsb | (local_data >> 1); + local_count--; + clock_counter=clock_counter+4; // Add four clocks per bit + } + new_msb = (local_data&0x8000) >> 15; + register_flags=(register_flags | new_msb); // Set C flag + if ( (local_data&0x8000) != ((local_data&0x4000)<<1)) register_flags=(register_flags|0x0800); // Set O flag + return local_data; +} + +// ------------------------------------------------------ +uint8_t RCL8(uint8_t local_data , uint8_t local_count) { + uint8_t tempcf, old_msb, new_msb; + + while (local_count != 0) { + tempcf = flag_c; + register_flags=(register_flags&0xF7FE); // Zero C ,O Flags + old_msb = (local_data&0x80) >> 7; + register_flags=(register_flags | old_msb); // Set C flag + local_data = (local_data << 1) | tempcf; + local_count--; + clock_counter=clock_counter+4; // Add four clocks per bit + } + new_msb = (local_data&0x80) >> 7; + if (new_msb != flag_c) register_flags=(register_flags|0x0800); // Set O flag + return local_data; +} + +// ------------------------------------------------------ +uint16_t RCL16(uint16_t local_data , uint8_t local_count) { + uint16_t tempcf, old_msb, new_msb; + + while (local_count != 0) { + tempcf = flag_c; + register_flags=(register_flags&0xF7FE); // Zero C ,O Flags + old_msb = (local_data&0x8000) >> 15; + register_flags=(register_flags | old_msb); // Set C flag + local_data = (local_data << 1) | tempcf; + local_count--; + clock_counter=clock_counter+4; // Add four clocks per bit + } + new_msb = (local_data&0x8000) >> 15; + if (new_msb != flag_c) register_flags=(register_flags|0x0800); // Set O flag + return local_data; +} + +// ------------------------------------------------------ +uint8_t RCR8(uint8_t local_data , uint8_t local_count) { + uint8_t tempcf, old_lsb; + + while (local_count != 0) { + tempcf = flag_c << 7; + register_flags=(register_flags&0xF7FE); // Zero C ,O Flags + old_lsb = local_data&0x1; + register_flags=(register_flags | old_lsb); // Set C flag + local_data = tempcf | (local_data >> 1); + local_count--; + clock_counter=clock_counter+4; // Add four clocks per bit + } + if ( (local_data&0x80) != ((local_data&0x40)<<1)) register_flags=(register_flags|0x0800); // Set O flag + return local_data; +} + +// ------------------------------------------------------ +uint16_t RCR16(uint16_t local_data , uint8_t local_count) { + uint16_t tempcf, old_lsb; + + while (local_count != 0) { + tempcf = flag_c << 15; + register_flags=(register_flags&0xF7FE); // Zero C ,O Flags + old_lsb = local_data&0x1; + register_flags=(register_flags | old_lsb); // Set C flag + local_data = tempcf | (local_data >> 1); + local_count--; + clock_counter=clock_counter+4; // Add four clocks per bit + } + if ( (local_data&0x8000) != ((local_data&0x4000)<<1)) register_flags=(register_flags|0x0800); // Set O flag + return local_data; +} + +// ------------------------------------------------------ +uint8_t SAL8(uint8_t local_data , uint8_t local_count) { + uint8_t old_msb, new_msb; + + while (local_count != 0) { + register_flags=(register_flags&0xF7FE); // Zero C ,O Flags + old_msb = (local_data&0x80) >> 7; + register_flags=(register_flags | old_msb); // Set C flag + local_data = (local_data << 1); // Perform the shift + local_count--; + clock_counter=clock_counter+4; // Add four clocks per bit + } + new_msb = (local_data&0x80) >> 7; + if (new_msb != flag_c) register_flags=(register_flags|0x0800); // Set O flag + Set_Flags_Byte_SZP(local_data); + return local_data; +} + +// ------------------------------------------------------ +uint16_t SAL16(uint16_t local_data , uint8_t local_count) { + uint16_t old_msb, new_msb; + + while (local_count != 0) { + register_flags=(register_flags&0xF7FE); // Zero C ,O Flags + old_msb = (local_data&0x8000) >> 15; + register_flags=(register_flags | old_msb); // Set C flag + local_data = (local_data << 1); // Perform the shift + local_count--; + clock_counter=clock_counter+4; // Add four clocks per bit + } + new_msb = (local_data&0x8000) >> 15; + if (new_msb != flag_c) register_flags=(register_flags|0x0800); // Set O flag + Set_Flags_Word_SZP(local_data); + return local_data; +} + +// ------------------------------------------------------ +uint8_t SHR8(uint8_t local_data , uint8_t local_count) { + uint8_t old_lsb; + + while (local_count != 0) { + register_flags=(register_flags&0xF7FE); // Zero C ,O Flags + old_lsb = local_data&0x1; + register_flags=(register_flags | old_lsb); // Set C flag + local_data = (local_data >> 1); + local_count--; + clock_counter=clock_counter+4; // Add four clocks per bit + } + if ( (local_data&0x80) != ((local_data&0x40)<<1)) register_flags=(register_flags|0x0800); // Set O flag + Set_Flags_Byte_SZP(local_data); + return local_data; +} + + +// ------------------------------------------------------ +uint16_t SHR16(uint16_t local_data , uint8_t local_count) { + uint16_t old_lsb; + + while (local_count != 0) { + register_flags=(register_flags&0xF7FE); // Zero C ,O Flags + old_lsb = local_data&0x1; + register_flags=(register_flags | old_lsb); // Set C flag + local_data = (local_data >> 1); + local_count--; + clock_counter=clock_counter+4; // Add four clocks per bit + } + if ( (local_data&0x8000) != ((local_data&0x4000)<<1)) register_flags=(register_flags|0x0800); // Set O flag + Set_Flags_Word_SZP(local_data); + return local_data; +} + +// ------------------------------------------------------ +uint8_t SAR8(uint8_t local_data , uint8_t local_count) { + uint8_t old_msb, old_lsb; + + while (local_count != 0) { + register_flags=(register_flags&0xF7FE); // Zero C ,O Flags + old_msb = local_data&0x80; + old_lsb = local_data&0x01; + register_flags=(register_flags | old_lsb); // Set C flag + local_data = old_msb | (local_data >> 1); + local_count--; + clock_counter=clock_counter+4; // Add four clocks per bit + } + if ( (local_data&0x80) != ((local_data&0x40)<<1)) register_flags=(register_flags|0x0800); // Set O flag + Set_Flags_Byte_SZP(local_data); + return local_data; +} + + +// ------------------------------------------------------ +uint16_t SAR16(uint16_t local_data , uint8_t local_count) { + uint16_t old_msb, old_lsb; + + while (local_count != 0) { + register_flags=(register_flags&0xF7FE); // Zero C ,O Flags + old_msb = local_data&0x8000; + old_lsb = local_data&0x0001; + register_flags=(register_flags | old_lsb); // Set C flag + local_data = old_msb | (local_data >> 1); + local_count--; + clock_counter=clock_counter+4; // Add four clocks per bit + } + if ( (local_data&0x8000) != ((local_data&0x4000)<<1)) register_flags=(register_flags|0x0800); // Set O flag + Set_Flags_Word_SZP(local_data); + return local_data; +} + +// ------------------------------------------------------ +// 0xD0 Opcodes +// ------------------------------------------------------ +void opcode_0xD0() { + Calculate_EA(); + if (ea_is_a_register==1) clock_counter=clock_counter-2; else clock_counter=clock_counter+13; + switch (REG_field) { + case 0x0: Writeback_EA(ROL8(Fetch_EA(),0x1) ); break; // # 0xD0 REG[0] - ROL REG8/MEM8 , 1 + case 0x1: Writeback_EA(ROR8(Fetch_EA(),0x1) ); break; // # 0xD0 REG[1] - ROR REG8/MEM8 , 1 + case 0x2: Writeback_EA(RCL8(Fetch_EA(),0x1) ); break; // # 0xD0 REG[2] - RCL REG8/MEM8 , 1 + case 0x3: Writeback_EA(RCR8(Fetch_EA(),0x1) ); break; // # 0xD0 REG[3] - RCR REG8/MEM8 , 1 + case 0x4: Writeback_EA(SAL8(Fetch_EA(),0x1) ); break; // # 0xD0 REG[4] - SAL REG8/MEM8 , 1 + case 0x5: Writeback_EA(SHR8(Fetch_EA(),0x1) ); break; // # 0xD0 REG[5] - SHR REG8/MEM8 , 1 + case 0x6: Writeback_EA(0xFF); break; // # 0xD0 REG[6] - ** SETMO ** R3 + case 0x7: Writeback_EA(SAR8(Fetch_EA(),0x1) ); break; // # 0xD0 REG[7] - SAR REG8/MEM8 , 1 + } + return; +} + +// ------------------------------------------------------ +// 0xD1 Opcodes +// ------------------------------------------------------ +void opcode_0xD1() { + Calculate_EA(); + if (ea_is_a_register==1) clock_counter=clock_counter-2; else clock_counter=clock_counter+21; + switch (REG_field) { + case 0x0: Writeback_EA(ROL16(Fetch_EA(),0x1) ); break; // # 0xD1 REG[0] - ROL REG16/MEM16 , 1 + case 0x1: Writeback_EA(ROR16(Fetch_EA(),0x1) ); break; // # 0xD1 REG[1] - ROR REG16/MEM16 , 1 + case 0x2: Writeback_EA(RCL16(Fetch_EA(),0x1) ); break; // # 0xD1 REG[2] - RCL REG16/MEM16 , 1 + case 0x3: Writeback_EA(RCR16(Fetch_EA(),0x1) ); break; // # 0xD1 REG[3] - RCR REG16/MEM16 , 1 + case 0x4: Writeback_EA(SAL16(Fetch_EA(),0x1) ); break; // # 0xD1 REG[4] - SAL REG16/MEM16 , 1 + case 0x5: Writeback_EA(SHR16(Fetch_EA(),0x1) ); break; // # 0xD1 REG[5] - SHR REG16/MEM16 , 1 + case 0x6: Writeback_EA(0xFFFF); break; // # 0xD1 REG[6] - ** SETMO ** R3 + case 0x7: Writeback_EA(SAR16(Fetch_EA(),0x1) ); break; // # 0xD1 REG[7] - SAR REG16/MEM16 , 1 + } + return; +} + +// ------------------------------------------------------ +// 0xD2 Opcodes +// ------------------------------------------------------ +void opcode_0xD2() { + Calculate_EA(); + if (ea_is_a_register==1) clock_counter=clock_counter+8; else clock_counter=clock_counter+20; + switch (REG_field) { + case 0x0: Writeback_EA(ROL8(Fetch_EA(),(register_cx&0x00FF)) ); break; // # 0xD2 REG[0] - ROL REG8/MEM8 , CL + case 0x1: Writeback_EA(ROR8(Fetch_EA(),(register_cx&0x00FF)) ); break; // # 0xD2 REG[1] - ROR REG8/MEM8 , CL + case 0x2: Writeback_EA(RCL8(Fetch_EA(),(register_cx&0x00FF)) ); break; // # 0xD2 REG[2] - RCL REG8/MEM8 , CL + case 0x3: Writeback_EA(RCR8(Fetch_EA(),(register_cx&0x00FF)) ); break; // # 0xD2 REG[3] - RCR REG8/MEM8 , CL + case 0x4: Writeback_EA(SAL8(Fetch_EA(),(register_cx&0x00FF)) ); break; // # 0xD2 REG[4] - SAL REG8/MEM8 , CL + case 0x5: Writeback_EA(SHR8(Fetch_EA(),(register_cx&0x00FF)) ); break; // # 0xD2 REG[5] - SHR REG8/MEM8 , CL + case 0x6: Writeback_EA(0xFFFF); break; // # 0xD2 REG[6] - ** SETMO ** R3 + case 0x7: Writeback_EA(SAR8(Fetch_EA(),(register_cx&0x00FF)) ); break; // # 0xD2 REG[7] - SAR REG8/MEM8 , CL + } + return; +} + +// ------------------------------------------------------ +// 0xD3 Opcodes +// ------------------------------------------------------ +void opcode_0xD3() { + Calculate_EA(); + if (ea_is_a_register==1) clock_counter=clock_counter+8; else clock_counter=clock_counter+28; + switch (REG_field) { + case 0x0: Writeback_EA(ROL16(Fetch_EA(),(register_cx&0x00FF)) ); break; // # 0xD3 REG[0] - ROL REG16/MEM16 , CL + case 0x1: Writeback_EA(ROR16(Fetch_EA(),(register_cx&0x00FF)) ); break; // # 0xD3 REG[1] - ROR REG16/MEM16 , CL + case 0x2: Writeback_EA(RCL16(Fetch_EA(),(register_cx&0x00FF)) ); break; // # 0xD3 REG[2] - RCL REG16/MEM16 , CL + case 0x3: Writeback_EA(RCR16(Fetch_EA(),(register_cx&0x00FF)) ); break; // # 0xD3 REG[3] - RCR REG16/MEM16 , CL + case 0x4: Writeback_EA(SAL16(Fetch_EA(),(register_cx&0x00FF)) ); break; // # 0xD3 REG[4] - SAL REG16/MEM16 , CL + case 0x5: Writeback_EA(SHR16(Fetch_EA(),(register_cx&0x00FF)) ); break; // # 0xD3 REG[5] - SHR REG16/MEM16 , CL + case 0x6: Writeback_EA(0xFFFF); break; // # 0xD3 REG[6] - ** SETMO ** R3 + case 0x7: Writeback_EA(SAR16(Fetch_EA(),(register_cx&0x00FF)) ); break; // # 0xD3 REG[7] - SAR REG16/MEM16 , CL + } + return; +} + + +// ------------------------------------------------------ +// MOVE Opcodes +// ------------------------------------------------------ +void opcode_0x88() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+2; else clock_counter=clock_counter+9; Writeback_EA( Fetch_Register(REG_field_table)); return; } // # 0x88 - MOV REG8/MEM8,REG8 +void opcode_0x89() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+2; else clock_counter=clock_counter+13; Writeback_EA( Fetch_Register(REG_field_table)); return; } // # 0x89 - MOV REG16/MEM16,REG16 +void opcode_0x8A() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+2; else clock_counter=clock_counter+8; Write_Register(REG_field_table,Fetch_EA()); return; } // # 0x8A - MOV REG8,REG8/MEM8 +void opcode_0x8B() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+2; else clock_counter=clock_counter+12; Write_Register(REG_field_table,Fetch_EA()); return; } // # 0x8B - MOV REG16,REG16/MEM16 +void opcode_0x8C() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+2; else clock_counter=clock_counter+13; word_operation=1; RM_field_table=R_M_field|0x8; Writeback_EA( Fetch_SEG_Reg(REG_field)); return; } // # 0x8C - MOV REG16/MEM16 , SEGREG +void opcode_0x8E() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+2; else clock_counter=clock_counter+12; word_operation=1; RM_field_table=R_M_field|0x8; Write_SEG_Reg(REG_field , Fetch_EA()); return; } // # 0x8E - MOV SEGREG , REG16/MEM16 + +void opcode_0xA0() { clock_counter=clock_counter+10; Write_Register(REG_AL , Biu_Operation(MEM_READ_BYTE , SEGMENT_OVERRIDABLE_TRUE , SEGMENT_DS , pfq_fetch_word() , 0x00 ) ); return; } // # 0xA0 - MOV AL , MEM8 +void opcode_0xA1() { clock_counter=clock_counter+14; register_ax = Biu_Operation(MEM_READ_WORD , SEGMENT_OVERRIDABLE_TRUE , SEGMENT_DS , pfq_fetch_word() , 0x00 ); return; } // # 0xA1 - MOV AX , MEM16 +void opcode_0xA2() { clock_counter=clock_counter+10; Biu_Operation(MEM_WRITE_BYTE , SEGMENT_OVERRIDABLE_TRUE , SEGMENT_DS , pfq_fetch_word() , register_ax ); return; } // # 0xA2 - MOV MEM8 , AL +void opcode_0xA3() { clock_counter=clock_counter+14; Biu_Operation(MEM_WRITE_WORD , SEGMENT_OVERRIDABLE_TRUE , SEGMENT_DS , pfq_fetch_word() , register_ax ); return; } // # 0xA2 - MOV MEM16 , AX + +void opcode_0xC6() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+10; Writeback_EA(pfq_fetch_byte()); return; } // # 0xC6 - MOV MEM8 , IMM8 +void opcode_0xC7() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+14; Writeback_EA(pfq_fetch_word()); return; } // # 0xC7 - MOV MEM16 , IMM16 + + +// ------------------------------------------------------ +// String Opcodes +// ------------------------------------------------------ + +// ------------------------------------------------------ +// # 0xA4 - MOVSB - Move String - Byte +// ------------------------------------------------------ +void opcode_0xA4() { + uint8_t local_data; + uint8_t interrupt_pending=0; + + + if (prefix_rep==0) clock_counter=clock_counter+1; else clock_counter=clock_counter+9; // Add initial clock counts + + do { + if (prefix_rep==1) { if (register_cx==0) return; // Exit from loop if repeat prefix and CX=0 + if (interrupt_pending==1) { register_ip = register_ip - 2; return; } // Exit from loop to service interrupt - adjusting IP to address of prefix + register_cx--; + } + + clock_counter=clock_counter+17; // Add clocks per loop iteration + local_data = Biu_Operation(MEM_READ_BYTE , SEGMENT_OVERRIDABLE_TRUE , SEGMENT_DS , register_si , 0x00 ); // Read data from source + Biu_Operation(MEM_WRITE_BYTE , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_ES , register_di , local_data ); // Write data to destination - Interrupts sampled on last CLK edge + if ( (nmi_latched==1) || (direct_intr_raw!=0 && (flag_i)!=0) ) interrupt_pending=1; else interrupt_pending=0; + + if (flag_d==0) { register_si=register_si + 1; register_di=register_di + 1; } + else { register_si=register_si - 1; register_di=register_di - 1; } + + + } while (prefix_rep==1); + + return; +} + +// ------------------------------------------------------ +// # 0xA5 - MOVSW - Move String - Word +// ------------------------------------------------------ +void opcode_0xA5() { + uint16_t local_data; + uint8_t interrupt_pending=0; + + if (prefix_rep==0) clock_counter=clock_counter+1; else clock_counter=clock_counter+9; // Add initial clock counts + + do { + if (prefix_rep==1) { if (register_cx==0) return; // Exit from loop if repeat prefix and CX= + if (interrupt_pending==1) { register_ip = register_ip - 2; return; } // Exit from loop to service interrupt - adjusting IP to address of prefix + register_cx--; + } + + clock_counter=clock_counter+17; // Add clocks per loop iteration + local_data = Biu_Operation(MEM_READ_WORD , SEGMENT_OVERRIDABLE_TRUE , SEGMENT_DS , register_si , 0x00 ); // Read data from source + Biu_Operation(MEM_WRITE_WORD , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_ES , register_di , local_data ); // Write data to destination - Interrupts sampled on last CLK edge + if ( (nmi_latched==1) || (direct_intr_raw!=0 && (flag_i)!=0) ) interrupt_pending=1; else interrupt_pending=0; + + if (flag_d==0) { register_si=register_si + 2; register_di=register_di + 2; } + else { register_si=register_si - 2; register_di=register_di - 2; } + + + } while (prefix_rep==1); + + return; +} + +// ------------------------------------------------------ +// # 0xA6 - CMPSB - Compare String - Byte +// ------------------------------------------------------ +void opcode_0xA6() { + uint8_t local_data1; + uint8_t local_data2; + uint8_t interrupt_pending=0; + + + if ( (prefix_repz == 1) || (prefix_repnz == 1) ) clock_counter=clock_counter+1; else clock_counter=clock_counter+9; // Add initial clock counts + + do { + if ( (prefix_repz==1) || (prefix_repnz==1) ) { if (register_cx==0) return; // Exit from loop if repeat prefix and CX=0 + if (interrupt_pending==1) { register_ip = register_ip - 2; return; } // Exit from loop to service interrupt - adjusting IP to address of prefix + register_cx--; + } + + clock_counter=clock_counter+22; // Add clocks per loop iteration + local_data1 = Biu_Operation(MEM_READ_BYTE , SEGMENT_OVERRIDABLE_TRUE , SEGMENT_DS , register_si , 0x00 ); // Read data from source + local_data2 = Biu_Operation(MEM_READ_BYTE , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_ES , register_di , 0x00 ); // Read data from source + SUB_Bytes(local_data1 , local_data2 ); // Perform comparison which sets Flags + if ( (nmi_latched==1) || (direct_intr_raw!=0 && (flag_i)!=0) ) interrupt_pending=1; else interrupt_pending=0; + + if (flag_d==0) { register_si=register_si + 1; register_di=register_di + 1; } + else { register_si=register_si - 1; register_di=register_di - 1; } + + + } while ( (prefix_repz==1 && flag_z==1) || (prefix_repnz==1 && flag_z==0) ); + + return; +} + +// ------------------------------------------------------ +// # 0xA7 - CMPSW - Compare String - Word +// ------------------------------------------------------ +void opcode_0xA7() { + uint16_t local_data1; + uint16_t local_data2; + uint8_t interrupt_pending=0; + + + if ( (prefix_repz == 1) || (prefix_repnz == 1) ) clock_counter=clock_counter+1; else clock_counter=clock_counter+9; // Add initial clock counts + + do { + if ( (prefix_repz==1) || (prefix_repnz==1) ) { if (register_cx==0) return; // Exit from loop if repeat prefix and CX=0 + if (interrupt_pending==1) { register_ip = register_ip - 2; return; } // Exit from loop to service interrupt - adjusting IP to address of prefix + register_cx--; + } + + clock_counter=clock_counter+22; // Add clocks per loop iteration + local_data1 = Biu_Operation(MEM_READ_WORD , SEGMENT_OVERRIDABLE_TRUE , SEGMENT_DS , register_si , 0x00 ); // Read data from source + local_data2 = Biu_Operation(MEM_READ_WORD , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_ES , register_di , 0x00 ); // Read data from source + SUB_Words(local_data1 , local_data2 ); // Perform comparison which sets Flags + if ( (nmi_latched==1) || (direct_intr_raw!=0 && (flag_i)!=0) ) interrupt_pending=1; else interrupt_pending=0; + + if (flag_d==0) { register_si=register_si + 2; register_di=register_di + 2; } + else { register_si=register_si - 2; register_di=register_di - 2; } + + + } while ( (prefix_repz==1 && flag_z==1) || (prefix_repnz==1 && flag_z==0) ); + + return; +} + +// ------------------------------------------------------ +// # 0xAA - STOSB - Store AL to String - Byte +// ------------------------------------------------------ +// ------------------------------------------------------ +// # 0xAA - STOSB - Store AL to String - Byte +// ------------------------------------------------------ +void opcode_0xAA() { + uint8_t interrupt_pending=0; + + if (prefix_rep==0) clock_counter=clock_counter+1; else clock_counter=clock_counter+9; // Add initial clock counts + + do { + if (prefix_rep==1) { if (register_cx==0) return; // Exit from loop if repeat prefix and CX=0 + if (interrupt_pending==1) { register_ip = register_ip - 2; return; } // Exit from loop to service interrupt - adjusting IP to address of prefix + register_cx--; + } + + clock_counter=clock_counter+10; // Add clocks per loop iteration + Biu_Operation(MEM_WRITE_BYTE , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_ES , register_di , register_ax ); // Write AL data to the ES:DI Address + if ( (nmi_latched==1) || (direct_intr_raw!=0 && (flag_i)!=0) ) interrupt_pending=1; else interrupt_pending=0; + + if (flag_d==0) { register_di=register_di + 1; } + else { register_di=register_di - 1; } + + + } while (prefix_rep==1); + + return; +} + +// ------------------------------------------------------ +// # 0xAB - STOSW - Store AX to String - Word +// ------------------------------------------------------ +void opcode_0xAB() { + uint8_t interrupt_pending=0; + + if (prefix_rep==0) clock_counter=clock_counter+1; else clock_counter=clock_counter+9; // Add initial clock counts + + do { + if (prefix_rep==1) { if (register_cx==0) return; // Exit from loop if repeat prefix and CX=0 + if (interrupt_pending==1) { register_ip = register_ip - 2; return; } // Exit from loop to service interrupt - adjusting IP to address of prefix + register_cx--; + } + + clock_counter=clock_counter+10; // Add clocks per loop iteration + Biu_Operation(MEM_WRITE_WORD , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_ES , register_di , register_ax ); // Write AL data to the ES:DI Address + if ( (nmi_latched==1) || (direct_intr_raw!=0 && (flag_i)!=0) ) interrupt_pending=1; else interrupt_pending=0; + + if (flag_d==0) { register_di=register_di + 2; } + else { register_di=register_di - 2; } + + + } while (prefix_rep==1); + + return; +} + +// ------------------------------------------------------ +// # 0xAC - LODSB - Load String into AL - Byte +// ------------------------------------------------------ +void opcode_0xAC() { + uint8_t local_data; + uint8_t interrupt_pending=0; + + if (prefix_rep==0) clock_counter=clock_counter+0; else clock_counter=clock_counter+9; // Add initial clock counts + + do { + if (prefix_rep==1) { if (register_cx==0) return; // Exit from loop if repeat prefix and CX=0 + if (interrupt_pending==1) { register_ip = register_ip - 2; return; } // Exit from loop to service interrupt - adjusting IP to address of prefix + register_cx--; + } + + clock_counter=clock_counter+12; // Add clocks per loop iteration + local_data = Biu_Operation(MEM_READ_BYTE , SEGMENT_OVERRIDABLE_TRUE , SEGMENT_DS , register_si , 0x00 ); // Read data from source + Write_Register(REG_AL , local_data ); // Write data to AL + if ( (nmi_latched==1) || (direct_intr_raw!=0 && (flag_i)!=0) ) interrupt_pending=1; else interrupt_pending=0; + + if (flag_d==0) { register_si=register_si + 1; } + else { register_si=register_si - 1; } + + + } while (prefix_rep==1); + + return; +} + +// ------------------------------------------------------ +// # 0xAD - LODSW - Load String into AX - Word +// ------------------------------------------------------ +void opcode_0xAD() { + uint16_t local_data; + uint8_t interrupt_pending=0; + + if (prefix_rep==0) clock_counter=clock_counter+0; else clock_counter=clock_counter+9; // Add initial clock counts + + do { + if (prefix_rep==1) { if (register_cx==0) return; // Exit from loop if repeat prefix and CX=0 + if (interrupt_pending==1) { register_ip = register_ip - 2; return; } // Exit from loop to service interrupt - adjusting IP to address of prefix + register_cx--; + } + + clock_counter=clock_counter+12; // Add clocks per loop iteration + local_data = Biu_Operation(MEM_READ_WORD , SEGMENT_OVERRIDABLE_TRUE , SEGMENT_DS , register_si , 0x00 ); // Read data from source + register_ax = local_data; // Write data to AX + if ( (nmi_latched==1) || (direct_intr_raw!=0 && (flag_i)!=0) ) interrupt_pending=1; else interrupt_pending=0; + + if (flag_d==0) { register_si=register_si + 2; } + else { register_si=register_si - 2; } + + + } while (prefix_rep==1); + + return; +} + +// ------------------------------------------------------ +// # 0xAE - SCASB - Scan String - Byte +// ------------------------------------------------------ +void opcode_0xAE() { + uint8_t local_data; + uint8_t interrupt_pending=0; + + + if ( (prefix_repz == 1) || (prefix_repnz == 1) ) clock_counter=clock_counter+0; else clock_counter=clock_counter+9; // Add initial clock counts + + do { + if ( (prefix_repz==1) || (prefix_repnz==1) ) { if (register_cx==0) return; // Exit from loop if repeat prefix and CX=0 + if (interrupt_pending==1) { register_ip = register_ip - 2; return; } // Exit from loop to service interrupt - adjusting IP to address of prefix + register_cx--; + } + + clock_counter=clock_counter+15; // Add clocks per loop iteration + local_data = Biu_Operation(MEM_READ_BYTE , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_ES , register_di , 0x00 ); // Read data from source + SUB_Bytes(( register_ax&0x00FF) , local_data ); // Perform comparison which sets Flags + if ( (nmi_latched==1) || (direct_intr_raw!=0 && (flag_i)!=0) ) interrupt_pending=1; else interrupt_pending=0; + + if (flag_d==0) { register_di=register_di + 1; } + else { register_di=register_di - 1; } + + + } while ( (prefix_repz==1 && flag_z==1) || (prefix_repnz==1 && flag_z==0) ); + + return; +} + +// ------------------------------------------------------ +// # 0xAF - SCASW - Scan String - Word +// ------------------------------------------------------ +void opcode_0xAF() { + uint16_t local_data; + uint8_t interrupt_pending=0; + + + if ( (prefix_repz == 1) || (prefix_repnz == 1) ) clock_counter=clock_counter+0; else clock_counter=clock_counter+9; // Add initial clock counts + + do { + if ( (prefix_repz==1) || (prefix_repnz==1) ) { if (register_cx==0) return; // Exit from loop if repeat prefix and CX=0 + if (interrupt_pending==1) { register_ip = register_ip - 2; return; } // Exit from loop to service interrupt - adjusting IP to address of prefix + register_cx--; + } + + clock_counter=clock_counter+15; // Add clocks per loop iteration + local_data = Biu_Operation(MEM_READ_WORD , SEGMENT_OVERRIDABLE_FALSE , SEGMENT_ES , register_di , 0x00 ); // Read data from source + SUB_Words(register_ax , local_data ); + // Perform comparison which sets Flags + if ( (nmi_latched==1) || (direct_intr_raw!=0 && (flag_i)!=0) ) interrupt_pending=1; else interrupt_pending=0; + + if (flag_d==0) { register_di=register_di + 2; } + else { register_di=register_di - 2; } + + + } while ( (prefix_repz==1 && flag_z==1) || (prefix_repnz==1 && flag_z==0) ); + + return; +} + + +// ------------------------------------------------------ +// TEST Opcodes +// ------------------------------------------------------ +void opcode_0xA8() {clock_counter=clock_counter+4; word_operation=0; Boolean_AND(register_ax,pfq_fetch_byte() ); return; } // 0xA8 TEST - AL,IMM8 +void opcode_0xA9() {clock_counter=clock_counter+4; word_operation=1; Boolean_AND(register_ax,pfq_fetch_word() ); return; } // 0xA9 TEST - AX,IMM16 +void opcode_0x84() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+9;Boolean_AND(Fetch_EA(),Fetch_Register(REG_field_table)); return; } // 0x84 TEST - REG8/MEM8 , REG8 +void opcode_0x85() { Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+3; else clock_counter=clock_counter+13;Boolean_AND(Fetch_EA(),Fetch_Register(REG_field_table)); return; } // 0x85 TEST - REG16/MEM16,REG16 + + +// ------------------------------------------------------ +// XCHG Opcodes +// ------------------------------------------------------ +void opcode_0x86() {Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+17; temp8 =Fetch_EA(); Writeback_EA(Fetch_Register(REG_field_table)); Write_Register(REG_field_table,temp8); return; } // 0x86 XCHG - REG8 , REG8/MEM8 +void opcode_0x87() {Calculate_EA(); if (ea_is_a_register==1) clock_counter=clock_counter+4; else clock_counter=clock_counter+25; temp16=Fetch_EA(); Writeback_EA(Fetch_Register(REG_field_table)); Write_Register(REG_field_table,temp16); return; } // 0x87 XCHG - REG16 , REG16/MEM16 +void opcode_0x91() {clock_counter=clock_counter+3; temp16=register_ax; register_ax=register_cx; register_cx=temp16; return; } // 0x91 - XCHG - Exchange Accumulator and CX +void opcode_0x92() {clock_counter=clock_counter+3; temp16=register_ax; register_ax=register_dx; register_dx=temp16; return; } // 0x92 - XCHG - Exchange Accumulator and DX +void opcode_0x93() {clock_counter=clock_counter+3; temp16=register_ax; register_ax=register_bx; register_bx=temp16; return; } // 0x93 - XCHG - Exchange Accumulator and BX +void opcode_0x94() {clock_counter=clock_counter+3; temp16=register_ax; register_ax=register_sp; register_sp=temp16; return; } // 0x94 - XCHG - Exchange Accumulator and SP +void opcode_0x95() {clock_counter=clock_counter+3; temp16=register_ax; register_ax=register_bp; register_bp=temp16; return; } // 0x95 - XCHG - Exchange Accumulator and BP +void opcode_0x96() {clock_counter=clock_counter+3; temp16=register_ax; register_ax=register_si; register_si=temp16; return; } // 0x96 - XCHG - Exchange Accumulator and SI +void opcode_0x97() {clock_counter=clock_counter+3; temp16=register_ax; register_ax=register_di; register_di=temp16; return; } // 0x97 - XCHG - Exchange Accumulator and DI + + + +// ------------------------------------------------------ +// 0xF6 Opcodes R3 +// ------------------------------------------------------ +void opcode_0xF6() { + uint8_t local_divr; + uint16_t local_quo; + uint8_t local_rem; + int8_t signed_local_divr; + int16_t signed_local_quo; + int8_t signed_local_rem; + + Calculate_EA(); + switch (REG_field) { + case 0x0: clock_counter=clock_counter+11; Boolean_AND(Fetch_EA(),pfq_fetch_byte()); break; // # 0xF6 REG[0] - TEST REG8/MEM8,IMM8 + case 0x1: clock_counter=clock_counter+11; Boolean_AND(Fetch_EA(),pfq_fetch_byte()); break; // # 0xF6 REG[1] - TEST REG8/MEM8,IMM8 ** Duplicate ** + case 0x2: clock_counter=clock_counter+16; Writeback_EA( 0xFF ^ Fetch_EA() ); break; // # 0xF6 REG[2] - NOT REG8/MEM8 + case 0x3: clock_counter=clock_counter+16; Writeback_EA( SUB_Bytes(0x00 , Fetch_EA() )); break; // # 0xF6 REG[3] - NEG REG8/MEM8 + + case 0x4: if (ea_is_a_register==1) clock_counter=clock_counter+75; else clock_counter=clock_counter+79; // # 0xF6 REG[4] - MUL REG8/MEM8 + register_ax = Fetch_EA() * (register_ax&0x00FF); + if ( (register_ax&0xFF00) != 0) { register_flags=(register_flags|0x0801); } // Set O,C flags + else { register_flags=(register_flags&0xF7FE); } // Clear O,C flags + break; + case 0x5: if (ea_is_a_register==1) clock_counter=clock_counter+89; else clock_counter=clock_counter+95; // # 0xF6 REG[5] - IMUL REG8/MEM8 + register_ax = (int8_t)Fetch_EA() * (int8_t)(register_ax&0x00FF); + if ( ((register_ax&0xFF80)==0xFF80) || ((register_ax&0xFF80)==0x0000) ) { register_flags=(register_flags&0xF7FE); } // Clear O,C flags + else { register_flags=(register_flags|0x0801); } // Set O,C flags + break; + case 0x6: if (ea_is_a_register==1) clock_counter=clock_counter+85; else clock_counter=clock_counter+91; // # 0xF6 REG[6] - DIV REG8/MEM8 + local_divr=Fetch_EA(); + if (local_divr==0) DIV0_Handler(); + else { + local_quo = register_ax / local_divr; + local_rem = register_ax % local_divr; + if (local_quo> 0xFF) { DIV0_Handler(); } + register_ax = local_rem << 8; + Write_Register(REG_AL , local_quo); + } + break; + case 0x7: if (ea_is_a_register==1) clock_counter=clock_counter+107; else clock_counter=clock_counter+114; // # 0xF6 REG[7] - IDIV REG8/MEM8 + signed_local_divr=(int8_t)Fetch_EA(); + if (signed_local_divr==0) DIV0_Handler(); + else { + signed_local_quo = (int16_t)register_ax / signed_local_divr; + signed_local_rem = (int16_t)register_ax % signed_local_divr; + if ( (signed_local_quo<-128)||(signed_local_quo>127)) { DIV0_Handler(); } + register_ax = signed_local_rem << 8; + Write_Register(REG_AL , signed_local_quo); + } + break; + + + } + return; +} + + + + +// ------------------------------------------------------ +// 0xF7 Opcodes R3 +// ------------------------------------------------------ +void opcode_0xF7() { + uint32_t local_data; + uint32_t local_numr; + uint16_t local_divr; + int32_t signed_local_numr; + int16_t signed_local_divr; + uint64_t local_overflow_test; + int32_t local_overflow_test2; + + + Calculate_EA(); + switch (REG_field) { + case 0x0: clock_counter=clock_counter+11; Boolean_AND(Fetch_EA(),pfq_fetch_word()); break; // # 0xF7 REG[0] - TEST REG16/MEM16 , IMM16 + case 0x1: clock_counter=clock_counter+11; Boolean_AND(Fetch_EA(),pfq_fetch_word()); break; // # 0xF7 REG[1] - TEST REG16/MEM16 , IMM16 ** Duplicate ** + case 0x2: clock_counter=clock_counter+16; Writeback_EA( 0xFFFF ^ Fetch_EA() ); break; // # 0xF7 REG[2] - NOT REG16/MEM16 + case 0x3: clock_counter=clock_counter+16; Writeback_EA( SUB_Words(0x00 , Fetch_EA() )); break; // # 0xF7 REG[3] - NEG REG16/MEM16 + + case 0x4: if (ea_is_a_register==1) clock_counter=clock_counter+120; else clock_counter=clock_counter+131; // # 0xF7 REG[4] - MUL REG16/MEM16 + local_data = Fetch_EA() * register_ax; + register_dx = (local_data >> 16); + register_ax = (local_data&0x0000FFFF); + if (register_dx != 0) { register_flags=(register_flags|0x0801); } // Set O,C flags + else { register_flags=(register_flags&0xF7FE); } // Clear O,C flags + break; + case 0x5: if (ea_is_a_register==1) clock_counter=clock_counter+141; else clock_counter=clock_counter+147; // # 0xF7 REG[5] - IMUL REG16/MEM16 + local_data = (int16_t)Fetch_EA() * (int16_t)register_ax; + register_dx = (local_data >> 16); + register_ax = (local_data&0x0000FFFF); + if ( (register_dx==0xFFFF) && ((register_ax&0x8000)==0x8000)) { register_flags=(register_flags&0xF7FE); } // Clear O,C flags + else if ( (register_dx==0x0000) && ((register_ax&0x8000)==0x0000)) { register_flags=(register_flags&0xF7FE); } // Clear O,C flags + else { register_flags=(register_flags|0x0801); } // Set O,C flags + break; + case 0x6: if (ea_is_a_register==1) clock_counter=clock_counter+153; else clock_counter=clock_counter+167; // # 0xF7 REG[6] - DIV REG16/MEM16 + local_numr = (register_dx<<16) | register_ax; + local_divr=Fetch_EA(); + if (local_divr==0) DIV0_Handler(); + else { + local_overflow_test = local_numr / local_divr; + if (local_overflow_test> 0xFFFF) { DIV0_Handler(); } + register_ax = local_numr / local_divr; + register_dx = local_numr % local_divr; + + } + break; + case 0x7: if (ea_is_a_register==1) clock_counter=clock_counter+175; else clock_counter=clock_counter+181; // # 0xF7 REG[7] - IDIV REG16/MEM16 + signed_local_numr = (int32_t)(register_dx<<16) | (int32_t)register_ax; + signed_local_divr=(int16_t)Fetch_EA(); + if (signed_local_divr==0) DIV0_Handler(); + else { + local_overflow_test2 = signed_local_numr / signed_local_divr; + if ( (local_overflow_test2<-32768)||(local_overflow_test2>32767) ) { DIV0_Handler(); } + register_ax = signed_local_numr / signed_local_divr; + register_dx = signed_local_numr % signed_local_divr; + } + break; + } + return; +} + +// ------------------------------------------------------ +// 0x27 - DAA - Decimal Adjust for Addition +// ------------------------------------------------------ +void opcode_0x27() { + uint16_t local_al; + + clock_counter=clock_counter+4; + local_al = register_ax&0x00FF; + + if ( ((0x0F&local_al) > 0x09) || (flag_a==1) ) { local_al=local_al+0x06; register_flags=(register_flags|0x0010);} else register_flags=(register_flags&0xFFEF); // Set A Flag + if ( ((0xFF&local_al) > 0x9F) || (flag_c==1) ) { local_al=local_al+0x60; register_flags=(register_flags|0x0001);} else register_flags=(register_flags&0xFFFE); // Set C Flag + Write_Register(REG_AL, local_al); + Set_Flags_Byte_SZP(local_al); + return; +} + +// ------------------------------------------------------ +// 0x2F - DAS - Decimal Adjust for Subtraction +// ------------------------------------------------------ +void opcode_0x2F() { + uint16_t local_al; + + clock_counter=clock_counter+4; + local_al = register_ax&0x00FF; + + if ( ((0x0F&local_al) > 0x09) || (flag_a==1) ) { local_al=local_al-0x06; register_flags=(register_flags|0x0010);} else register_flags=(register_flags&0xFFEF); // Set A Flag + if ( ((0xFF&local_al) > 0x9F) || (flag_c==1) ) { local_al=local_al-0x60; register_flags=(register_flags|0x0001);} else register_flags=(register_flags&0xFFFE); // Set C Flag + Write_Register(REG_AL, local_al); + Set_Flags_Byte_SZP(local_al); + return; +} + +// ------------------------------------------------------ +// 0x37 - AAA - ASCII Adjust for Addition +// ------------------------------------------------------ +void opcode_0x37() { + uint16_t local_al; + uint8_t local_flag_a = flag_a; + + clock_counter=clock_counter+4; + local_al = register_ax&0x00FF; + + if ( ((0xF&local_al) > 0x09) || (local_flag_a==1) ) { + local_al = local_al + 0x06; // AL = AL + 0x06 + Write_Register(REG_AL, local_al); // Update AL + register_ax = register_ax + 0x0100; // AH = AH + 1 + register_flags = (register_flags | 0x0010); // Set A Flag + } + if (local_flag_a==1) register_flags = (register_flags | 0x0001); else register_flags=(register_flags & 0xFFFE); // CF = AF + register_ax = register_ax & 0xFF0F; // AL = AL & 0x0F + return; +} + +// ------------------------------------------------------ +// 0x3F - AAS - ASCII Adjust for Subtraction +// ------------------------------------------------------ +void opcode_0x3F() { + uint16_t local_al; + uint8_t local_flag_a = flag_a; + + clock_counter=clock_counter+4; + local_al = register_ax&0x00FF; + + if ( ((0xF&local_al) > 0x09) || (local_flag_a==1) ) { + local_al = local_al - 0x06; // AL = AL - 0x06 + register_ax = register_ax - 0x0100; // AH = AH - 1 + Write_Register(REG_AL, local_al); // Update AL + register_flags = (register_flags | 0x0010); // Set A Flag + } + if (local_flag_a==1) register_flags = (register_flags | 0x0001); else register_flags=(register_flags & 0xFFFE); // CF = AF + register_ax = register_ax & 0xFF0F; // AL = AL & 0x0F + return; +} + +// ------------------------------------------------------ +// [0xD4 0x0A] - AAM - ASCII Adjust for Multiply +// ------------------------------------------------------ +void opcode_0xD4() { + uint8_t local_al; + uint8_t local_ah; + uint8_t opcode_divisor; + + clock_counter=clock_counter+83; + opcode_divisor = pfq_fetch_byte(); + local_al = register_ax&0x00FF; + + local_ah = local_al / opcode_divisor; + local_al = local_al % opcode_divisor; + + Set_Flags_Byte_SZP(local_al); + register_ax = (local_ah<<8) | local_al; + return; +} + +// ------------------------------------------------------ +// [0xD5 0x0A] - AAD - ASCII Adjust for Division +// ------------------------------------------------------ +void opcode_0xD5() { + uint8_t local_al; + uint8_t local_ah; + uint8_t opcode_multiplier; + + clock_counter=clock_counter+60; + opcode_multiplier = pfq_fetch_byte(); + + local_ah = register_ax>>8; + local_al = register_ax&0x00FF; + + register_ax = (0x00FF & ((local_ah * opcode_multiplier) + local_al)); + + Set_Flags_Byte_SZP(register_ax); + return; +} + +// ------------------------------------------------------ +// 0xD7 - XLAT - Translate +// ------------------------------------------------------ +void opcode_0xD7() { + uint16_t local_al; + uint16_t local_address; + uint8_t local_data; + + clock_counter=clock_counter+11; + + local_al = register_ax&0x00FF; + local_address = register_bx + local_al; + + local_data = Biu_Operation(MEM_READ_BYTE , SEGMENT_OVERRIDABLE_TRUE , SEGMENT_DS , local_address , 0x00 ); // Read data from source + Write_Register(REG_AL, local_data); + + return; +} + +// ------------------------------------------------------ +// 0xD8 - 0xDF ESC +// ------------------------------------------------------ +void opcode_0xD8() { + Calculate_EA(); + if (ea_is_a_register==1) clock_counter=clock_counter+2; else clock_counter=clock_counter+8; + Fetch_EA(); + if ((opcode_first_byte&0x1)!=0) clock_counter=clock_counter+4; // For Word Operations + return; +} + +// ------------------------------------------------------ +// [0xE0 0xdd] - LOOPNZ - Loop While Not Zero +// ------------------------------------------------------ +void opcode_0xE0() { + + register_cx--; + if (flag_z==0 && register_cx!=0) { clock_counter=clock_counter+3; Jump_Taken8(); } + else { clock_counter=clock_counter+1; Jump_Not_Taken8(); } + + return; +} + +// ------------------------------------------------------ +// [0xE1 0xdd] - LOOPZ - Loop While Zero +// ------------------------------------------------------ +void opcode_0xE1() { + + register_cx--; + if (flag_z==1 && register_cx!=0) { clock_counter=clock_counter+2; Jump_Taken8(); } + else { clock_counter=clock_counter+2; Jump_Not_Taken8(); } + + return; +} + +// ------------------------------------------------------ +// [0xE2 0xdd] - LOOP +// ------------------------------------------------------ +void opcode_0xE2() { + + register_cx--; + if (register_cx!=0) { clock_counter=clock_counter+1; Jump_Taken8(); } + else { clock_counter=clock_counter+1; Jump_Not_Taken8(); } + + return; +} + +// ------------------------------------------------------ +// 0xF4 - HLT - Halt until Interrupt or Reset asserted +// ------------------------------------------------------ +void opcode_0xF4() { + Biu_Operation(SEND_HALT , 0x00 , 0x00 , 0x00 , 0x00 ); // Tell BIU to send HALT onto S Bits + + do { wait_for_CLK_falling_edge(); + wait_for_CLK_falling_edge(); + if (direct_intr_raw!=0 && (flag_i)==1) direct_intr=1; else direct_intr=0; + } while (direct_intr==0 && nmi_latched==0 && direct_reset_raw==0 ); + + GPIO6_DR = GPIO6_raw_data | 0x40003000; // Set S[2:0] back to "111" + wait_for_CLK_falling_edge(); + wait_for_CLK_falling_edge(); + + return; +} + +// ------------------------------------------------------ +// 0xD6 - SETALC +// ------------------------------------------------------ +void opcode_0xD6() { + clock_counter=clock_counter+2; + if (flag_c==0) register_ax=register_ax&0xFF00; else register_ax=register_ax|0x00FF; + return; +} + + +// ------------------------------------------------------ +// 0x9B - WAIT - Wait until TEST_n is asserted or Reset asserted ** No TEST_n pin support for now +// ------------------------------------------------------ +void opcode_0x9B() { + clock_counter=clock_counter+2; + do { wait_for_CLK_falling_edge(); + if (direct_intr_raw!=0 && (flag_i)==1) direct_intr=1; else direct_intr=0; + } while (direct_intr==0 && nmi_latched==0 && direct_reset_raw==0 ); + return; +} + + +void opcode_0x8D() { clock_counter=clock_counter+2; Calculate_EA(); Write_Register(REG_field_table, ea_address); return; } // 0x8D LEA - REG16 , MEM16 + + +// ------------------------------------------------------ +// 0xC4 - LES - REG16 , MEM16 +// ------------------------------------------------------ +void opcode_0xC4() { + clock_counter=clock_counter+24; + Calculate_EA(); + word_operation=1; + Write_Register( (0x08|REG_field), Fetch_EA() ); + ea_address = ea_address + 0x02; + register_es = Fetch_EA(); + return; +} +// ------------------------------------------------------ +// 0xC5 - LDS - REG16 , MEM16 +// ------------------------------------------------------ +void opcode_0xC5() { + clock_counter=clock_counter+24; + Calculate_EA(); + word_operation=1; + Write_Register( (0x08|REG_field), Fetch_EA() ); + ea_address = ea_address + 0x02; + register_ds = Fetch_EA(); + return; +} + + +// ------------------------------------------------------------------------------------------------------------ +// Decode the first byte of the opcode +// ------------------------------------------------------------------------------------------------------------ +void execute_new_instruction() { + + opcode_first_byte = pfq_fetch_byte(); + + switch (opcode_first_byte) { + + case 0x00: opcode_0x00(); break; + case 0x01: opcode_0x01(); break; + case 0x02: opcode_0x02(); break; + case 0x03: opcode_0x03(); break; + case 0x04: opcode_0x04(); break; + case 0x05: opcode_0x05(); break; + case 0x06: opcode_0x06(); break; + case 0x07: opcode_0x07(); break; + case 0x08: opcode_0x08(); break; + case 0x09: opcode_0x09(); break; + case 0x0A: opcode_0x0A(); break; + case 0x0B: opcode_0x0B(); break; + case 0x0C: opcode_0x0C(); break; + case 0x0D: opcode_0x0D(); break; + case 0x0E: opcode_0x0E(); break; + case 0x0F: opcode_0x0F(); break; + case 0x10: opcode_0x10(); break; + case 0x11: opcode_0x11(); break; + case 0x12: opcode_0x12(); break; + case 0x13: opcode_0x13(); break; + case 0x14: opcode_0x14(); break; + case 0x15: opcode_0x15(); break; + case 0x16: opcode_0x16(); break; + case 0x17: opcode_0x17(); break; + case 0x18: opcode_0x18(); break; + case 0x19: opcode_0x19(); break; + case 0x1A: opcode_0x1A(); break; + case 0x1B: opcode_0x1B(); break; + case 0x1C: opcode_0x1C(); break; + case 0x1D: opcode_0x1D(); break; + case 0x1E: opcode_0x1E(); break; + case 0x1F: opcode_0x1F(); break; + case 0x20: opcode_0x20(); break; + case 0x21: opcode_0x21(); break; + case 0x22: opcode_0x22(); break; + case 0x23: opcode_0x23(); break; + case 0x24: opcode_0x24(); break; + case 0x25: opcode_0x25(); break; + case 0x26: opcode_0x26(); break; + case 0x27: opcode_0x27(); break; + case 0x28: opcode_0x28(); break; + case 0x29: opcode_0x29(); break; + case 0x2A: opcode_0x2A(); break; + case 0x2B: opcode_0x2B(); break; + case 0x2C: opcode_0x2C(); break; + case 0x2D: opcode_0x2D(); break; + case 0x2E: opcode_0x2E(); break; + case 0x2F: opcode_0x2F(); break; + case 0x30: opcode_0x30(); break; + case 0x31: opcode_0x31(); break; + case 0x32: opcode_0x32(); break; + case 0x33: opcode_0x33(); break; + case 0x34: opcode_0x34(); break; + case 0x35: opcode_0x35(); break; + case 0x36: opcode_0x36(); break; + case 0x37: opcode_0x37(); break; + case 0x38: opcode_0x38(); break; + case 0x39: opcode_0x39(); break; + case 0x3A: opcode_0x3A(); break; + case 0x3B: opcode_0x3B(); break; + case 0x3C: opcode_0x3C(); break; + case 0x3D: opcode_0x3D(); break; + case 0x3E: opcode_0x3E(); break; + case 0x3F: opcode_0x3F(); break; + case 0x40: opcode_0x40(); break; + case 0x41: opcode_0x41(); break; + case 0x42: opcode_0x42(); break; + case 0x43: opcode_0x43(); break; + case 0x44: opcode_0x44(); break; + case 0x45: opcode_0x45(); break; + case 0x46: opcode_0x46(); break; + case 0x47: opcode_0x47(); break; + case 0x48: opcode_0x48(); break; + case 0x49: opcode_0x49(); break; + case 0x4A: opcode_0x4A(); break; + case 0x4B: opcode_0x4B(); break; + case 0x4C: opcode_0x4C(); break; + case 0x4D: opcode_0x4D(); break; + case 0x4E: opcode_0x4E(); break; + case 0x4F: opcode_0x4F(); break; + case 0x50: opcode_0x50(); break; + case 0x51: opcode_0x51(); break; + case 0x52: opcode_0x52(); break; + case 0x53: opcode_0x53(); break; + case 0x54: opcode_0x54(); break; + case 0x55: opcode_0x55(); break; + case 0x56: opcode_0x56(); break; + case 0x57: opcode_0x57(); break; + case 0x58: opcode_0x58(); break; + case 0x59: opcode_0x59(); break; + case 0x5A: opcode_0x5A(); break; + case 0x5B: opcode_0x5B(); break; + case 0x5C: opcode_0x5C(); break; + case 0x5D: opcode_0x5D(); break; + case 0x5E: opcode_0x5E(); break; + case 0x5F: opcode_0x5F(); break; + case 0x60: opcode_0x70(); break; + case 0x61: opcode_0x71(); break; + case 0x62: opcode_0x72(); break; + case 0x63: opcode_0x73(); break; + case 0x64: opcode_0x74(); break; + case 0x65: opcode_0x75(); break; + case 0x66: opcode_0x76(); break; + case 0x67: opcode_0x77(); break; + case 0x68: opcode_0x78(); break; + case 0x69: opcode_0x79(); break; + case 0x6A: opcode_0x7A(); break; + case 0x6B: opcode_0x7B(); break; + case 0x6C: opcode_0x7C(); break; + case 0x6D: opcode_0x7D(); break; + case 0x6E: opcode_0x7E(); break; + case 0x6F: opcode_0x7F(); break; + case 0x70: opcode_0x70(); break; + case 0x71: opcode_0x71(); break; + case 0x72: opcode_0x72(); break; + case 0x73: opcode_0x73(); break; + case 0x74: opcode_0x74(); break; + case 0x75: opcode_0x75(); break; + case 0x76: opcode_0x76(); break; + case 0x77: opcode_0x77(); break; + case 0x78: opcode_0x78(); break; + case 0x79: opcode_0x79(); break; + case 0x7A: opcode_0x7A(); break; + case 0x7B: opcode_0x7B(); break; + case 0x7C: opcode_0x7C(); break; + case 0x7D: opcode_0x7D(); break; + case 0x7E: opcode_0x7E(); break; + case 0x7F: opcode_0x7F(); break; + case 0x80: opcode_0x80(); break; + case 0x81: opcode_0x81(); break; + case 0x82: opcode_0x80(); break; + case 0x83: opcode_0x83(); break; + case 0x84: opcode_0x84(); break; + case 0x85: opcode_0x85(); break; + case 0x86: opcode_0x86(); break; + case 0x87: opcode_0x87(); break; + case 0x88: opcode_0x88(); break; + case 0x89: opcode_0x89(); break; + case 0x8A: opcode_0x8A(); break; + case 0x8B: opcode_0x8B(); break; + case 0x8C: opcode_0x8C(); break; + case 0x8D: opcode_0x8D(); break; + case 0x8E: opcode_0x8E(); break; + case 0x8F: opcode_0x8F(); break; + case 0x90: opcode_0x90(); break; + case 0x91: opcode_0x91(); break; + case 0x92: opcode_0x92(); break; + case 0x93: opcode_0x93(); break; + case 0x94: opcode_0x94(); break; + case 0x95: opcode_0x95(); break; + case 0x96: opcode_0x96(); break; + case 0x97: opcode_0x97(); break; + case 0x98: opcode_0x98(); break; + case 0x99: opcode_0x99(); break; + case 0x9A: opcode_0x9A(); break; + case 0x9B: opcode_0x9B(); break; + case 0x9C: opcode_0x9C(); break; + case 0x9D: opcode_0x9D(); break; + case 0x9E: opcode_0x9E(); break; + case 0x9F: opcode_0x9F(); break; + case 0xA0: opcode_0xA0(); break; + case 0xA1: opcode_0xA1(); break; + case 0xA2: opcode_0xA2(); break; + case 0xA3: opcode_0xA3(); break; + case 0xA4: opcode_0xA4(); break; + case 0xA5: opcode_0xA5(); break; + case 0xA6: opcode_0xA6(); break; + case 0xA7: opcode_0xA7(); break; + case 0xA8: opcode_0xA8(); break; + case 0xA9: opcode_0xA9(); break; + case 0xAA: opcode_0xAA(); break; + case 0xAB: opcode_0xAB(); break; + case 0xAC: opcode_0xAC(); break; + case 0xAD: opcode_0xAD(); break; + case 0xAE: opcode_0xAE(); break; + case 0xAF: opcode_0xAF(); break; + case 0xB0: opcode_0xB0(); break; + case 0xB1: opcode_0xB1(); break; + case 0xB2: opcode_0xB2(); break; + case 0xB3: opcode_0xB3(); break; + case 0xB4: opcode_0xB4(); break; + case 0xB5: opcode_0xB5(); break; + case 0xB6: opcode_0xB6(); break; + case 0xB7: opcode_0xB7(); break; + case 0xB8: opcode_0xB8(); break; + case 0xB9: opcode_0xB9(); break; + case 0xBA: opcode_0xBA(); break; + case 0xBB: opcode_0xBB(); break; + case 0xBC: opcode_0xBC(); break; + case 0xBD: opcode_0xBD(); break; + case 0xBE: opcode_0xBE(); break; + case 0xBF: opcode_0xBF(); break; + case 0xC0: opcode_0xC2(); break; + case 0xC1: opcode_0xC3(); break; + case 0xC2: opcode_0xC2(); break; + case 0xC3: opcode_0xC3(); break; + case 0xC4: opcode_0xC4(); break; + case 0xC5: opcode_0xC5(); break; + case 0xC6: opcode_0xC6(); break; + case 0xC7: opcode_0xC7(); break; + case 0xC8: opcode_0xCA(); break; + case 0xC9: opcode_0xCB(); break; + case 0xCA: opcode_0xCA(); break; + case 0xCB: opcode_0xCB(); break; + case 0xCC: opcode_0xCC(); break; + case 0xCD: opcode_0xCD(); break; + case 0xCE: opcode_0xCE(); break; + case 0xCF: opcode_0xCF(); break; + case 0xD0: opcode_0xD0(); break; + case 0xD1: opcode_0xD1(); break; + case 0xD2: opcode_0xD2(); break; + case 0xD3: opcode_0xD3(); break; + case 0xD4: opcode_0xD4(); break; + case 0xD5: opcode_0xD5(); break; + case 0xD6: opcode_0xD6(); break; + case 0xD7: opcode_0xD7(); break; + case 0xD8: opcode_0xD8(); break; + case 0xD9: opcode_0xD8(); break; + case 0xDA: opcode_0xD8(); break; + case 0xDB: opcode_0xD8(); break; + case 0xDC: opcode_0xD8(); break; + case 0xDD: opcode_0xD8(); break; + case 0xDE: opcode_0xD8(); break; + case 0xDF: opcode_0xD8(); break; + case 0xE0: opcode_0xE0(); break; + case 0xE1: opcode_0xE1(); break; + case 0xE2: opcode_0xE2(); break; + case 0xE3: opcode_0xE3(); break; + case 0xE4: opcode_0xE4(); break; + case 0xE5: opcode_0xE5(); break; + case 0xE6: opcode_0xE6(); break; + case 0xE7: opcode_0xE7(); break; + case 0xE8: opcode_0xE8(); break; + case 0xE9: opcode_0xE9(); break; + case 0xEA: opcode_0xEA(); break; + case 0xEB: opcode_0xEB(); break; + case 0xEC: opcode_0xEC(); break; + case 0xED: opcode_0xED(); break; + case 0xEE: opcode_0xEE(); break; + case 0xEF: opcode_0xEF(); break; + case 0xF0: opcode_0xF0(); break; + case 0xF1: opcode_0xF0(); break; + case 0xF2: opcode_0xF2(); break; + case 0xF3: opcode_0xF3(); break; + case 0xF4: opcode_0xF4(); break; + case 0xF5: opcode_0xF5(); break; + case 0xF6: opcode_0xF6(); break; + case 0xF7: opcode_0xF7(); break; + case 0xF8: opcode_0xF8(); break; + case 0xF9: opcode_0xF9(); break; + case 0xFA: opcode_0xFA(); break; + case 0xFB: opcode_0xFB(); break; + case 0xFC: opcode_0xFC(); break; + case 0xFD: opcode_0xFD(); break; + case 0xFE: opcode_0xFE(); break; + case 0xFF: opcode_0xFF(); break; + } +return; +} + + + +// ------------------------------------------------- +// +// Main loop +// +// ------------------------------------------------- + void loop() { + + uint16_t i=0; + + // Give Teensy 4.1 a moment + delay (1000); + + for (i=0 ; i<=33 ; i++) { wait_for_CLK_falling_edge(); } + + pfq_in_address = register_ip; + prefetch_queue_count=0; + + + reset_sequence(); + + + + while(1) { + + if (direct_reset_raw!=0) reset_sequence(); + + + // Wait for cycle counter to expire before processing traps or next instruction + // + while (clock_counter>0) { + pfq_add_byte(); + wait_for_CLK_falling_edge(); + } + + // Dont poll for interrupts between a Prefixes and instructions + // + if (clock_counter==0 && pause_interrupts==0){ + if (nmi_latched==1) { NMI_Handler(); } + else if (direct_intr_raw!=0 && (flag_i)!=0) { INTR_Handler(); } + else if (flag_t!=0) { TRAP_Handler(); } + } + + + // Process new instruction when previous instruction's cycle counter has expired + // Debounce prefixes after a non-prefix instruction is executed + // + if (clock_counter==0) { + last_instruction_set_a_prefix=0; + pause_interrupts=0; + execute_new_instruction(); + if (last_instruction_set_a_prefix==0) prefix_flags=0x00; + } + + if (acceleration_mode!=0) clock_counter=0; + + } + + } +